Tom Stellard
f4a180e50b
R600: Enable vector fpow.
...
The OpenCL specs say: "The vector versions of the math functions operate
component-wise. The description is per-component."
Patch by: Jan Vesely
Reviewed-by: Tom Stellard <thomas.stellard@amd.com>
Signed-off-by: Jan Vesely <jan.vesely@rutgers.edu>
llvm-svn: 200773
2014-02-04 17:18:37 +00:00
Vincent Lejeune
54d9c8726b
R600: Use function inputs to represent data stored in gpr
...
llvm-svn: 194425
2013-11-11 22:10:24 +00:00
Vincent Lejeune
4cef82fa31
R600: Support schedule and packetization of trans-only inst
...
llvm-svn: 185268
2013-06-29 19:32:43 +00:00
Vincent Lejeune
cc7d08e974
R600: Schedule copy from phys register at beginning of block
...
It allows regalloc pass to remove them by trivially assigning associated reg
llvm-svn: 183336
2013-06-05 20:27:35 +00:00
Vincent Lejeune
55871f8f8a
R600: use capital letter for PV channel
...
llvm-svn: 183107
2013-06-03 15:44:35 +00:00
Vincent Lejeune
5a2e018ab6
R600: Use bottom up scheduling algorithm
...
llvm-svn: 182129
2013-05-17 16:50:56 +00:00
Vincent Lejeune
62da1453e1
R600: Prettier asmPrint of Alu
...
llvm-svn: 180956
2013-05-02 21:52:30 +00:00
Michel Danzer
dee420c03f
R600: Fix up test/CodeGen/R600/llvm.pow.ll for r177730
...
llvm-svn: 177736
2013-03-22 15:24:16 +00:00
Tom Stellard
6f17e7033b
Add R600 backend
...
A new backend supporting AMD GPUs: Radeon HD2XXX - HD7XXX
llvm-svn: 169915
2012-12-11 21:25:42 +00:00
