Chris Lattner
2d12a0cb70
remove dead method
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llvm-svn: 31271
2006-10-28 18:21:29 +00:00
Chris Lattner
05159debc4
Turn conditions like x<Y|z==q into multiple blocks.
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This compiles Regression/CodeGen/X86/or-branch.ll into:
_foo:
subl $12, %esp
call L_bar$stub
movl 20(%esp), %eax
movl 16(%esp), %ecx
cmpl $5, %eax
jl LBB1_1 #cond_true
LBB1_3: #entry
testl %ecx, %ecx
jne LBB1_2 #UnifiedReturnBlock
LBB1_1: #cond_true
call L_bar$stub
addl $12, %esp
ret
LBB1_2: #UnifiedReturnBlock
addl $12, %esp
ret
instead of:
_foo:
subl $12, %esp
call L_bar$stub
movl 20(%esp), %eax
movl 16(%esp), %ecx
cmpl $4, %eax
setg %al
testl %ecx, %ecx
setne %cl
testb %cl, %al
jne LBB1_2 #UnifiedReturnBlock
LBB1_1: #cond_true
call L_bar$stub
addl $12, %esp
ret
LBB1_2: #UnifiedReturnBlock
addl $12, %esp
ret
And on ppc to:
cmpwi cr0, r29, 5
blt cr0, LBB1_1 ;cond_true
LBB1_3: ;entry
cmplwi cr0, r30, 0
bne cr0, LBB1_2 ;UnifiedReturnBlock
instead of:
cmpwi cr7, r4, 4
mfcr r2
addic r4, r3, -1
subfe r30, r4, r3
rlwinm r29, r2, 30, 31, 31
and r2, r29, r30
cmplwi cr0, r2, 0
bne cr0, LBB1_2 ;UnifiedReturnBlock
llvm-svn: 31230
2006-10-27 21:36:01 +00:00
Chris Lattner
79a1ca0a61
Generalize CaseBlock a bit more:
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Rename LHSBB/RHSBB to TrueBB/FalseBB. Allow the RHS value to be null,
in which case the LHS is treated as a bool.
llvm-svn: 31166
2006-10-24 17:57:59 +00:00
Chris Lattner
fc8e70297e
generalize 'CaseBlock'. It really allows any comparison to be inserted.
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llvm-svn: 31161
2006-10-24 17:03:35 +00:00
Evan Cheng
c8b9d15614
Start checking from the root of the matched sub-tree.
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llvm-svn: 30957
2006-10-14 08:30:53 +00:00
Chris Lattner
aa1741fc87
add two helper methods.
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llvm-svn: 30869
2006-10-11 03:58:02 +00:00
Chris Lattner
b512048344
refactor critical edge breaking out into the SplitCritEdgesForPHIConstants method.
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This is a baby step towards fixing PR925.
llvm-svn: 30643
2006-09-28 06:17:10 +00:00
Evan Cheng
a42653b7ae
Move DAGSize to SelectionDAGISel; it's used in tablegen'd isel code.
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llvm-svn: 29547
2006-08-07 22:16:08 +00:00
Jim Laskey
f9f462bc5e
Now that the ISel is available, it's possible to create a default instruction
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scheduler creator.
llvm-svn: 29452
2006-08-01 19:14:14 +00:00
Jim Laskey
f5e160063e
1. Change use of "Cache" to "Default".
...
2. Added argument to instruction scheduler creators so the creators can do
special things.
3. Repaired target hazard code.
4. Misc.
More to follow.
llvm-svn: 29450
2006-08-01 18:29:48 +00:00
Jim Laskey
b92b14f422
Introducing plugable register allocators and instruction schedulers.
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llvm-svn: 29434
2006-08-01 14:21:23 +00:00
Evan Cheng
5f0e94c299
Rename IsFoldableBy to CanBeFoldedleBy
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llvm-svn: 29376
2006-07-28 01:03:48 +00:00
Evan Cheng
1e640aeee8
Let each target specific isel provide routine to check if a chain producing node is foldable by another.
...
llvm-svn: 29335
2006-07-27 06:36:49 +00:00
Nate Begeman
c5a92246bc
Remove unncessary include
...
llvm-svn: 28160
2006-05-08 01:33:11 +00:00
Nate Begeman
60c4e49b4e
Somehow, I missed this part of the checkin a couple days ago
...
llvm-svn: 28116
2006-05-05 01:13:11 +00:00
Evan Cheng
9f21c2daf4
Remove the temporary option: -no-isel-fold-inflight
...
llvm-svn: 28012
2006-04-28 18:54:11 +00:00
Evan Cheng
ff5a88b62e
Added a temporary option -no-isel-fold-inflight to control whether a "inflight"
...
node can be folded.
llvm-svn: 28003
2006-04-28 02:09:19 +00:00
Nate Begeman
7bb910dbe7
Fix the updating of the machine CFG when a PHI node was in a successor of
...
the jump table's range check block. This re-enables 100% dense jump tables
by default on PPC & x86
llvm-svn: 27952
2006-04-23 06:26:20 +00:00
Nate Begeman
7ed816f900
JumpTable support! What this represents is working asm and jit support for
...
x86 and ppc for 100% dense switch statements when relocations are non-PIC.
This support will be extended and enhanced in the coming days to support
PIC, and less dense forms of jump tables.
llvm-svn: 27947
2006-04-22 18:53:45 +00:00
Nate Begeman
3d518334b9
SelectionDAGISel can now natively handle Switch instructions, in the same
...
manner that the LowerSwitch LLVM to LLVM pass does: emitting a binary
search tree of basic blocks. The new approach has several advantages:
it is faster, it generates significantly smaller code in many cases, and
it paves the way for implementing dense switch tables as a jump table by
handling switches directly in the instruction selector.
This functionality is currently only enabled on x86, but should be safe for
every target. In anticipation of making it the default, the cfg is now
properly updated in the x86, ppc, and sparc select lowering code.
llvm-svn: 27156
2006-03-27 01:32:24 +00:00
Chris Lattner
3f23d22d3f
Change the interface for getting a target HazardRecognizer to be more clean.
...
llvm-svn: 26608
2006-03-08 04:25:59 +00:00
Chris Lattner
a0769e790e
Hoist the HazardRecognizer out of the ScheduleDAGList.cpp file to where
...
targets can implement them. Make the top-down scheduler non-g5-specific.
llvm-svn: 26568
2006-03-06 00:20:29 +00:00
Chris Lattner
0f3130afc2
Add some hooks for selecting memory addresses.
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llvm-svn: 26347
2006-02-24 02:12:52 +00:00
Evan Cheng
4a57a7551f
Do some code refactoring on Jim's scheduler in preparation of the new list
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scheduler.
llvm-svn: 25493
2006-01-21 02:32:06 +00:00
Chris Lattner
2e3f21c27f
add a method
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llvm-svn: 22867
2005-08-18 18:44:33 +00:00
Chris Lattner
d3add16ed6
This was moved to the .cpp file
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llvm-svn: 22827
2005-08-17 06:46:50 +00:00
Chris Lattner
c79b6eeefd
add a new method
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llvm-svn: 21929
2005-05-13 07:23:03 +00:00
Misha Brukman
4ad5efd1a9
Remove trailing whitespace
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llvm-svn: 21409
2005-04-21 20:39:54 +00:00
Chris Lattner
e2fd07b43d
Make methods private, add a method.
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llvm-svn: 19634
2005-01-17 17:14:43 +00:00
Chris Lattner
000509e7b0
Add a new node type, add comments.
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llvm-svn: 19525
2005-01-13 17:58:35 +00:00
Chris Lattner
409c6158ad
Common base class for SelectionDAG-based instruction selectors.
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llvm-svn: 19326
2005-01-07 07:46:03 +00:00