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Commit Graph

30 Commits

Author SHA1 Message Date
Simon Atanasyan
5a9ddc59d3 [mips] Process numeric register name in the .set assignment directive
Now LLVM assembler cannot process the following code and generates an
error. GNU tools support .set assignment directive with numeric register
name.

```
.set r4, 4

test.s:1:11: error: invalid token in expression
  .set r4, $4
           ^
```

This patch teach assembler to handle such directives correctly.
Unfortunately a numeric register name cannot be represented as an
expression. That's why we have to maintain a separate `StringMap`
in the `MipsAsmParser` to keep mapping between aliases names and
register numbers.

Differential revision: https://reviews.llvm.org/D47464

llvm-svn: 333428
2018-05-29 15:58:06 +00:00
Petar Jovanovic
b4543f0948 [mips] implement .set dspr2 directive
Implement .set dspr2 directive with appropriate feature bits. This
directive is a counterpart of -mattr=dspr2 command line option with the
exception that it does not influence elf header flags.

Patch by Milos Stojanovic.

Differential Revision: https://reviews.llvm.org/D38537

llvm-svn: 314994
2017-10-05 17:40:32 +00:00
Daniel Sanders
be0ced1166 [mips] Use MipsMCExpr instead of MCSymbolRefExpr for all relocations.
Summary:
This is much closer to the way MIPS relocation expressions work
(%hi(foo + 2) rather than %hi(foo) + 2) and removes the need for the
various bodges in MipsAsmParser::evaluateRelocExpr().

Removing those bodges ensures that the constant stored in MCValue is the
full 32 or 64-bit (depending on ABI) offset from the symbol. This will be used
to correct the %hi/%lo matching needed to sort the relocation table correctly.

As part of this:
* Gave MCExpr::print() the ability to omit parenthesis when emitting a
  symbol reference inside a MipsMCExpr operator like %hi(X). Without this
  we print things like %lo(($L1)).
* %hi(%neg(%gprel(X))) is now three MipsMCExpr's instead of one. Most of
  the related special cases have been removed or moved to MipsMCExpr. We
  can remove the rest as we gain support for the less common relocations
  when they are not part of this specific combination.
* Renamed MipsMCExpr::VariantKind and the enum prefix ('VK_') to avoid confusion
  with MCSymbolRefExpr::VariantKind and its prefix (also 'VK_').
* fixup_Mips_GOT_Local and fixup_Mips_GOT_Global were found to be identical
  and merged into fixup_Mips_GOT.
* MO_GOT16 and MO_GOT turned out to be identical and have been merged into
  MO_GOT.
* VK_Mips_GOT and VK_Mips_GOT16 turned out to be the same thing so they
  have been merged into MEK_GOT

Reviewers: sdardis

Subscribers: dsanders, sdardis, llvm-commits

Differential Revision: http://reviews.llvm.org/D19716

llvm-svn: 268379
2016-05-03 13:35:44 +00:00
Toma Tabacu
e2238213f4 [mips] [IAS] Emit .set macro/nomacro.
Reviewers: dsanders

Reviewed By: dsanders

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D9563

llvm-svn: 237363
2015-05-14 13:42:10 +00:00
Daniel Sanders
0a46c1f632 [mips] Work around inconsistency in llvm-mc's placement of fixup markers
Summary:
Add a second fixup table to MipsAsmBackend::getFixupKindInfo() to correctly
position llvm-mc's fixup placeholders for big-endian.

See PR19836 for full details of the issue. To summarize, the fixup placeholders
do not account for endianness properly and the implementations of
getFixupKindInfo() for each target are measuring MCFixupKindInfo.TargetOffset
from different ends of the instruction encoding to compensate.

Reviewers: jkolek, zoran.jovanovic, vmedic

Reviewed By: vmedic

Differential Revision: http://reviews.llvm.org/D3889

llvm-svn: 209514
2014-05-23 13:35:24 +00:00
Matheus Almeida
1f3c772adf [mips] Add support to '.set mips64'.
The '.set mips64' directive enables the feature Mips:FeatureMips64
from assembly. Note that it doesn't modify the ELF header as opposed
to the use of -mips64 from the command-line. The reason for this
is that we want to be as compatible as possible with existing assemblers
like GAS.

llvm-svn: 204817
2014-03-26 15:14:32 +00:00
Matheus Almeida
00b627058b [mips] Add support to '.set mips64r2'.
The '.set mips64r2' directive enables the feature Mips:FeatureMips64r2
from assembly. Note that it doesn't modify the ELF header as opposed
to the use of -mips64r2 from the command-line. The reason for this
is that we want to be as compatible as possible with existing assemblers
like GAS.

llvm-svn: 204815
2014-03-26 14:52:22 +00:00
Matheus Almeida
78b2682fd9 [mips] Making sure that a '.set noreorder' directive is correctly parsed
and emitted and that no NOPs are emitted in a 'noreorder section'.

llvm-svn: 204250
2014-03-19 16:20:19 +00:00
Matheus Almeida
4fff721d3a [mips] Assembly parser must invoke the target streamer to handle .set reorder macro.
llvm-svn: 203459
2014-03-10 13:21:10 +00:00
Vladimir Medic
5c28631a7b This patch implements .set dsp directive and sets appropriate feature bits.This directive is a counterpart of -mattr=dsp command line option with the exception that it does not influence elf header flags. The usage example is gives in test file.
llvm-svn: 202966
2014-03-05 11:05:09 +00:00
Vladimir Medic
8272ae6789 This patch implements .set mips32r2 directive and sets appropriate feature bits. It also introduces helper functions that are used to set and clear feature bits as necessary. This directive is a counterpart of -mips32r2 command line options with the exception that it does not influence elf header flags. The usage example is gives in test file.
llvm-svn: 202807
2014-03-04 09:54:09 +00:00
Jack Carter
4a5987eef3 [Mips] TargetStreamer Support for .abicalls and .set pic0.
This patch adds .abicalls and .set pic0 support which
affects the ELF ABI and its flags. In addition the patch uses
a common interface for both the MipsTargetSteamer and
MipsObjectStreamer that both the integrated and standalone
assemblers will use for the output for these directives.

llvm-svn: 198646
2014-01-06 23:27:31 +00:00
Vladimir Medic
4d40c9969e Method parseSetAssignment treats every operand with '$' sign as register and the parsing is directed to set alias for register. This will result in errors reported when expressions containing label references are parsed(for example long jumps)
As we can't make a complete solution now it has been decided to enable .set directive to handle long jump expressions. This will cause parser to report errors when parsing integer based register assignments, for example:
   .set r3, will be reported as error. Still, the need for expressions is higher priority as the integer based register assignments are Mips specific and can be avoided using register names.

llvm-svn: 196773
2013-12-09 11:03:25 +00:00
Vladimir Medic
97a94dc2fb Fix bug in .gpword directive parsing.
llvm-svn: 194570
2013-11-13 13:18:04 +00:00
Vladimir Medic
fac4b6d8bf Implement gpword directive for mips, test case added. Stype changes using clang-format are also included.
llvm-svn: 194145
2013-11-06 11:27:05 +00:00
Jack Carter
6dc369450f reverting per request
llvm-svn: 191992
2013-10-04 22:52:31 +00:00
Jack Carter
70c25749d2 [MC][AsmParser] Hook for post assembly file processing
This patch handles LLVM standalone assembler (llvm-mc) ELF flag setting based on input file
directive processing.

Mips assembly requires processing inline directives that directly and
indirectly affect the output ELF header flags. This patch handles one
".abicalls".

To process these directives we are following the model the code generator
uses by storing state in a container as we go through processing and when
we detect the end of input file processing, AsmParser is notified and we
update the ELF header flags through a MipsELFStreamer method with a call from
MCTargetAsmParser::emitEndOfAsmFile(MCStreamer &OutStreamer).

This patch will allow other targets the same functionality.

Jack

llvm-svn: 191982
2013-10-04 21:26:15 +00:00
Vladimir Medic
d22167f3e0 Implement eret and deret(return from exception) instructions for Mips. Test examples are given.
llvm-svn: 186507
2013-07-17 14:05:19 +00:00
Vladimir Medic
8e12e22a4d Add support for Mips break and syscall insructions. The corresponding test cases are added.
llvm-svn: 186151
2013-07-12 09:25:35 +00:00
Vladimir Medic
cbe40f5bcd Reverting commit r185999 due to buildboot failure.
llvm-svn: 186001
2013-07-10 12:27:25 +00:00
Vladimir Medic
408af148a4 Add support for Mips break and syscall insructions. The corresponding test cases are added.
llvm-svn: 185999
2013-07-10 10:18:10 +00:00
Vladimir Medic
af5979fc83 Optimize register parsing for MipsAsmParser. Allow symbolic aliases for FPU registers.
llvm-svn: 184411
2013-06-20 11:21:49 +00:00
Jack Carter
81964ccca4 Mips assembler: Improve set register alias handling
This patch solves the problem of numeric register values not being accepted:

../set_alias.s:1:11: error: expected valid expression after comma
        .set    r4,$4
                    ^
The parsing of .set directive is changed and handling of symbols in code 
as well to enable this feature. 

The test example is added.

Patch by Vladimir Medic

llvm-svn: 182807
2013-05-28 22:21:05 +00:00
Jack Carter
02ade2a6d8 Mips assembler: .set reorder support
Mips have delayslots for certain instructions 
like jumps and branches. These are instructions 
that follow the branch or jump and are executed
before the jump or branch is completed.

Early Mips compilers could not cope with delayslots
and left them up to the assembler. The assembler would
fill the delayslots with the appropriate instruction,
usually just a nop to allow correct runtime behavior.

The default behavior for this is set with .set reorder.
To tell the assembler that you don't want it to mess with
the delayslot one used .set noreorder.

For backwards compatibility we need to support
.set reorder and have it be the default behavior in the 
assembler.

Our support for it is to insert a NOP directly after an
instruction with a delayslot when in .set reorder mode.

Contributer: Vladimir Medic
llvm-svn: 180584
2013-04-25 23:31:35 +00:00
Jack Carter
9e089b8c4f This patch enables the Mips .set directive to define aliases
The .set directive in the Mips the assembler can be 
used to set the value of a symbol to an expression. 
This changes the symbol's value and type to conform 
to the expression's.

Syntax: .set symbol, expression

This patch implements the parsing of the above syntax 
and enables the parser to use defined symbols when 
parsing operands.

Contributor: Vladimir Medic
llvm-svn: 177667
2013-03-21 21:44:16 +00:00
Jack Carter
0f776a392d Mips specific standalone assembler addressing mode %hi and %lo.
The constructs %hi() and %lo() represent the high and low 16 
bits of the address. 
Because the 16 bit offset field of an LW instruction is 
interpreted as signed, if bit 15 of the low part is 1 then the 
low part will act as a negative and 1 needs to be added to the 
high part.

Contributer: Vladimir Medic
llvm-svn: 175707
2013-02-21 02:09:31 +00:00
Jack Carter
aeecb81472 ELF symbol table field st_other support,
excluding visibility bits.

Mips specific standalone assembler directive "set at".

This directive changes the general purpose register
that the assembler will use when given the symbolic
register name $at.

This does not include negative testing. That will come
in a future patch.

A side affect of this patch recognizes the different 
GPR register names for temporaries between old abi
and new abi so a test case for that is included.

Contributer: Vladimir Medic
llvm-svn: 175686
2013-02-20 23:11:17 +00:00
Jack Carter
26eec3af74 This patch implements parsing the .word
directive for the Mips assembler.

Contributer: Vladimir Medic
 
llvm-svn: 173407
2013-01-25 01:31:34 +00:00
Jack Carter
f160360b70 This patch is a partial implementation of mips .set assembler directive. Directive is defined as follows:
.set option
The patch implements following options

    at - lets the assembler use the $at register for macros,
         but generates warnings if the source program uses $at

    noat - let source programs use $at without issuingwarnings.

    noreorder - prevents the assembler from reordering machine 
                language instructions.
    nomacro - causes the assembler to print a warning whenever 
              an assembler operation generates more than one 
              machine language instruction.
    macro - lets the assembler generate multiple machine instructions 
            from a single assembler instruction
    reorder - lets the assembler reorder machine language 
               instructions to improve performance

The above variants are parsed and their boolean values set or unset.
The code to actually use them will come later.

Following options are not implemented yet:

nomips16
nomicromips
move
nomove

Contributer: Vladimir Medic
llvm-svn: 165194
2012-10-04 02:29:46 +00:00
Jack Carter
d4ab2f65df The Mips standalone assembler intial directive support.
Actually these are just stubs for parsing the directives.
Semantic support will come later.

Test cases included

Contributer: Vladimir Medic
llvm-svn: 163364
2012-09-07 00:48:02 +00:00