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Commit Graph

17502 Commits

Author SHA1 Message Date
Meador Inge
bf03751391 instcombine: Migrate memcpy optimizations
This patch migrates the memcpy optimizations from the simplify-libcalls
pass into the instcombine library call simplifier.

llvm-svn: 167686
2012-11-11 05:54:34 +00:00
Meador Inge
13e6be2fd6 instcombine: Migrate memcmp optimizations
This patch migrates the memcmp optimizations from the simplify-libcalls
pass into the instcombine library call simplifier.

llvm-svn: 167683
2012-11-11 05:11:20 +00:00
Meador Inge
a062b17960 instcombine: Migrate strstr optimizations
This patch migrates the strstr optimizations from the simplify-libcalls
pass into the instcombine library call simplifier.

llvm-svn: 167682
2012-11-11 03:51:48 +00:00
Meador Inge
a202e0c179 instcombine: Migrate strcspn optimizations
This patch migrates the strcspn optimizations from the simplify-libcalls
pass into the instcombine library call simplifier.

llvm-svn: 167675
2012-11-10 15:16:48 +00:00
Evan Cheng
2599006e46 Convert an improper CodeGen test to a MC test.
llvm-svn: 167663
2012-11-10 04:30:40 +00:00
Meador Inge
9b62fb8d77 instcombine: Query target library information to gate libcall simplifications
Several of the simplifiers migrated from the simplify-libcalls pass to
the instcombine pass were not correctly checking the target library
information to gate the simplifications.  This patch ensures that the
check is made.

llvm-svn: 167660
2012-11-10 03:11:10 +00:00
Evan Cheng
6ed26ba70c xfail a bad test. This is a MC test but it's dependent on a codegen optimization which is now disabled.
llvm-svn: 167658
2012-11-10 02:34:36 +00:00
Evan Cheng
ebe241fb9d Disable the Thumb no-return call optimization:
mov lr, pc
b.w _foo

The "mov" instruction doesn't set bit zero to one, it's putting incorrect
value in lr. It messes up backtraces.

rdar://12663632

llvm-svn: 167657
2012-11-10 02:09:05 +00:00
Craig Topper
f424da6ff9 Cleanup pcmp(e/i)str(m/i) instruction definitions and load folding support.
llvm-svn: 167652
2012-11-10 01:23:36 +00:00
Justin Holewinski
be8faeed70 [NVPTX] Use ABI alignment for parameters when alignment is not specified.
Affects SM 2.0+.  Fixes bug 13324.

llvm-svn: 167646
2012-11-09 23:50:24 +00:00
Jakob Stoklund Olesen
887571e652 Fix assertions in updateRegMaskSlots().
The RegMaskSlots contains 'r' slots while NewIdx and OldIdx are 'B'
slots. This broke the checks in the assertions.

This fixes PR14302.

llvm-svn: 167625
2012-11-09 19:18:49 +00:00
Dmitry Vyukov
fab21a5c47 tsan: switch to new memory_order constants (ABI compatible)
llvm-svn: 167615
2012-11-09 14:12:16 +00:00
Dmitry Vyukov
62df6da6a6 tsan: instrument all atomics (including fetch_add, exchange, cas, etc)
llvm-svn: 167612
2012-11-09 12:55:36 +00:00
Nadav Rotem
ee232d62d1 Add support for memory runtime check. When we can, we calculate array bounds.
If the arrays are found to be disjoint then we run the vectorized version of
the loop. If they are not, we run the scalar code.

llvm-svn: 167608
2012-11-09 07:09:44 +00:00
NAKAMURA Takumi
cda12da6b9 llvm/ConstantFolding.cpp: Make ReadDataFromGlobal() and FoldReinterpretLoadFromConstPtr() Big-endian-aware.
llvm-svn: 167595
2012-11-08 20:34:25 +00:00
Amara Emerson
f7a46cedbc Recommit modified r167540.
Improve ARM build attribute emission for architectures types.
This also changes the default architecture emitted for a generic CPU to "v7".

llvm-svn: 167574
2012-11-08 09:51:45 +00:00
Michael Liao
59114df23b Add support of RTM from TSX extension
- Add RTM code generation support throught 3 X86 intrinsics:
  xbegin()/xend() to start/end a transaction region, and xabort() to abort a
  tranaction region

llvm-svn: 167573
2012-11-08 07:28:54 +00:00
Meador Inge
28cefe8802 instcombine: Migrate strspn optimizations
This patch migrates the strspn optimizations from the simplify-libcalls
pass into the instcombine library call simplifier.

llvm-svn: 167568
2012-11-08 01:33:50 +00:00
Eric Christopher
b34bece6a8 Add a relocation visitor to lib object. This works via caching relocated
values in a map that can be passed to consumers. Add a testcase that
ensures this works for llvm-dwarfdump.

llvm-svn: 167558
2012-11-07 23:22:07 +00:00
Hans Wennborg
d166484584 Only do switch-to-lookup table transformation when TargetTransformInfo
is available.

llvm-svn: 167552
2012-11-07 21:35:12 +00:00
Akira Hatanaka
b8f5a8ab0b [mips] Custom-lower ISD::FRAME_TO_ARGS_OFFSET node.
Patch by Sasa Stankovic.

llvm-svn: 167548
2012-11-07 19:10:58 +00:00
Hans Wennborg
7dd7657cec Fix bad test IR in switch_to_lookup_table.ll
llvm-svn: 167543
2012-11-07 18:38:24 +00:00
Andrew Trick
8b72906a53 misched: Heuristics based on the machine model.
misched is disabled by default. With -enable-misched, these heuristics
balance the schedule to simultaneously avoid saturating processor
resources, expose ILP, and minimize register pressure. I've been
analyzing the performance of these heuristics on everything in the
llvm test suite in addition to a few other benchmarks. I would like
each heuristic check to be verified by a unit test, but I'm still
trying to figure out the best way to do that. The heuristics are still
in considerable flux, but as they are refined we should be rigorous
about unit testing the improvements.

llvm-svn: 167527
2012-11-07 07:05:09 +00:00
Nadav Rotem
dce9a7a599 CostModel: add another known vector trunc optimization.
llvm-svn: 167488
2012-11-06 21:17:17 +00:00
Nadav Rotem
2fb5dc3a15 Cost Model: add tables for some avx type-conversion hacks.
llvm-svn: 167480
2012-11-06 19:33:53 +00:00
Nadav Rotem
890d7c7f8e CostModel: Add tables for the common x86 compares.
llvm-svn: 167421
2012-11-05 23:48:20 +00:00
Nadav Rotem
8ddfd47801 Code Model: Improve the accuracy of the zext/sext/trunc vector cost estimation.
llvm-svn: 167412
2012-11-05 22:20:53 +00:00
Kevin Enderby
d988c6daf6 Fix for PR14264 cause by commit r167237 which did not take into account a
possible buffer change with a .macro directive.

rdar://12637628

llvm-svn: 167408
2012-11-05 21:55:41 +00:00
Nadav Rotem
04d64771f6 Cost Model: Normalize the insert/extract index when splitting types
llvm-svn: 167402
2012-11-05 21:12:13 +00:00
Nadav Rotem
a504aa057e Cost Model: teach the cost model about expanding integers.
llvm-svn: 167401
2012-11-05 21:11:10 +00:00
Ulrich Weigand
5e496676d0 On PowerPC64, integer return values (as well as arguments) are supposed
to be extended to a full register.   This is modeled in the IR by marking
the return value (or argument) with a signext or zeroext attribute.

However, while these attributes are respected for function arguments,
they are currently ignored for function return values by the PowerPC
back-end.  This patch updates PPCCallingConv.td to ask for the promotion
to i64, and fixes LowerReturn and LowerCallResult to implement it.

The new test case verifies that both arguments and return values are
properly extended when passing them; and also that the optimizers
understand incoming argument and return values are in fact guaranteed
by the ABI to be extended.

The patch caused a spurious breakage in CodeGen/PowerPC/coalesce-ext.ll,
since the test case used a "ret" instruction to create a use of an i32
value at the end of the function (to set up data flow as required for
what the test is intended to test).  Since there's now an implicit
promotion to i64, that data flow no longer works as expected.  To fix
this, this patch now adds an extra "add" to ensure we have an appropriate
use of the i32 value.

llvm-svn: 167396
2012-11-05 19:39:45 +00:00
Nadav Rotem
4def3aace5 Implement the cost of abnormal x86 instruction lowering as a table.
llvm-svn: 167395
2012-11-05 19:32:46 +00:00
Hal Finkel
a82b79fc22 Add support for the PowerPC-specific inline asm Z constraint and y modifier.
The Z constraint specifies an r+r memory address, and the y modifier expands
to the "r, r" in the asm string. For this initial implementation, the base
register is forced to r0 (which has the special meaning of 0 for r+r addressing
on PowerPC) and the full address is taken in the second register. In the
future, this should be improved.

llvm-svn: 167388
2012-11-05 18:18:42 +00:00
Adhemerval Zanella
382ede5fd4 [PATCH] PowerPC: Expand load extend vector operations
This patch expands the SEXTLOAD, ZEXTLOAD, and EXTLOAD operations for
vector types when altivec is enabled.

llvm-svn: 167386
2012-11-05 17:15:56 +00:00
Richard Osborne
258e3e70bb Don't infer whether a value is captured in the current function from the
'nocapture' attribute.

The nocapture attribute only specifies that no copies are made that
outlive the function. This isn't the same as there being no copies at all.
This fixes PR14045.

llvm-svn: 167381
2012-11-05 10:48:24 +00:00
Duncan Sands
626552af21 Generalize the transform that boosts GEP indices to the size of a pointer to
also do it for vectors of pointers.

llvm-svn: 167354
2012-11-03 11:44:17 +00:00
Akira Hatanaka
1bfa522bfe [mips] Set flag neverHasSideEffects flag on floating point conversion
instructions.

llvm-svn: 167348
2012-11-03 00:53:12 +00:00
Nadav Rotem
c9bbabd5e9 X86 CostModel: Add support for a some of the common arithmetic instructions for SSE4, AVX and AVX2.
llvm-svn: 167347
2012-11-03 00:39:56 +00:00
Akira Hatanaka
61434a3632 [mips] Set flag isAsCheapAsAMove flag on instruction LUi.
llvm-svn: 167345
2012-11-03 00:26:02 +00:00
Akira Hatanaka
06b2c52edc [mips] Stop reserving register AT and use register scavenger when a scratch
register is needed.

llvm-svn: 167341
2012-11-03 00:05:43 +00:00
Nadav Rotem
6f0c234b7f Add a stub for the x86 cost model impl. Implement a basic cost rule for inserting/extracting from XMM registers.
llvm-svn: 167333
2012-11-02 23:27:16 +00:00
Nadav Rotem
6edee82efa CostModel: add support for Vector Insert and Extract.
llvm-svn: 167329
2012-11-02 22:31:56 +00:00
Akira Hatanaka
109078895c [mips] Fix disassembler test cases.
llvm-svn: 167326
2012-11-02 22:20:10 +00:00
Nadav Rotem
ce21a69b9d Add a cost model analysis that allows us to estimate the cost of IR-level instructions.
llvm-svn: 167324
2012-11-02 21:48:17 +00:00
Akira Hatanaka
5a2c763cb0 [mips] Fix bug in test case. Disable machine LICM to prevent instruction from
being moved out of a basic block.

llvm-svn: 167322
2012-11-02 21:46:42 +00:00
Quentin Colombet
522698f693 Vext Lowering was missing opportunities
llvm-svn: 167318
2012-11-02 21:32:17 +00:00
Akira Hatanaka
25aba90c6b [mips] Use register number instead of name to print register $AT.
llvm-svn: 167315
2012-11-02 21:26:03 +00:00
Akira Hatanaka
ba57d98a50 [mips] Delete MipsFunctionInfo::EmitNOAT. Unconditionally print directive
"set .noat" so that the assembler doesn't issue warnings when register $AT is
used.

llvm-svn: 167310
2012-11-02 20:56:25 +00:00
Chandler Carruth
ca6ce473f5 Add a testcase to loop-idiom to cover PR14241 when we start handling
strided loops again.

llvm-svn: 167287
2012-11-02 08:40:24 +00:00
Chandler Carruth
1fc186f3bd Revert the switch of loop-idiom to use the new dependence analysis.
The new analysis is not yet ready for prime time. It has a *critical*
flawed assumption, and some troubling shortages of testing. Until it's
been hammered into better shape, let's stick with the working code. This
should be easy to revert itself when the analysis is ready.

Fixes PR14241, a miscompile of any memcpy-able loop which uses a pointer
as the induction mechanism. If you have been seeing miscompiles in this
revision range, you really want to test with this backed out. The
results of this miscompile are a bit subtle as they can lead to
downstream passes concluding things are impossible which are in fact
possible.

Thanks to David Blaikie for the majority of the reduction of this
miscompile. I'll be checking in the test case in a non-revert commit.

Revesions reverted here:

r167045: LoopIdiom: Fix a serious missed optimization: we only turned
         top-level loops into memmove.
r166877: LoopIdiom: Add checks to avoid turning memmove into an infinite
         loop.
r166875: LoopIdiom: Recognize memmove loops.
r166874: LoopIdiom: Replace custom dependence analysis with
         DependenceAnalysis.
llvm-svn: 167286
2012-11-02 08:33:25 +00:00