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198403 Commits

Author SHA1 Message Date
Craig Topper
ad5ef9999a [X86] Add a 32-bit version of mixed-ptr-sizes.ll to make sure we get code coverage on the ADDRSPACECAST handling in ReplaceNodeResults. NFC 2020-06-10 14:38:34 -07:00
Stanislav Mekhanoshin
3968e13431 AMDGPU/GlobalISel: cmp/select method for insert element
Differential Revision: https://reviews.llvm.org/D80754
2020-06-10 13:12:54 -07:00
Craig Topper
eecd3ebbe0 [X86] Enable masked GPR broadcasts to be formed even if the broadcast has more than one use.
This is a cheap instruction. It's better to repeat it than to do
two separate operations.

There are probably more cases like this, but this one was reported
as a regression in our internal benchmarking.
2020-06-10 12:42:44 -07:00
romanova-ekaterina
7e98b6c7a5 Fixed false ThinLTO cache misses problem (PR 45819).
We relied on the fact that the iterators walks through the elements of a
DenseSet in a deterministic order (which is not true). This caused
ThinLTO cache misses. This patch addresses this problem.
See PR 45819 for additional information
https://bugs.llvm.org/show_bug.cgi?id=45819

Differential Revision: https://reviews.llvm.org/D79772
2020-06-10 12:41:41 -07:00
serge-sans-paille
e80c60485c Fix dynamic probing scheme
If we probe *after* each static stack allocation, we need to probe *before* each
dynamic stack allocation. Provide a scheme to describe the possible scenario.

Thanks a lot to @jonpa for motivating this fix.

Differential Revision: https://reviews.llvm.org/D81067
2020-06-10 21:37:09 +02:00
Matt Arsenault
638274c376 RegAllocFast: Avoid unused method warning in release builds 2020-06-10 15:23:56 -04:00
Ayke van Laethem
24ba078dcd [AVR] Implement disassembly support for I/O instructions
The in, out, and sbi/cbi family of instructions seem to require a custom
decoder. I'm not exactly sure why and would prefer to convince TableGen
to provide the correct decoders for these, but I can't seem to convince
it to do so. They simply disassemble without any operands.

Differential Revision: https://reviews.llvm.org/D74049
2020-06-10 20:55:47 +02:00
Stanislav Mekhanoshin
514c813e5c [AMDGPU] Fixed promote alloca with ptr/int casts
There is an invalid cast produced when a pointee is a pointer
and the alloca type is cast to a pointer to int.

Differential Revision: https://reviews.llvm.org/D81606
2020-06-10 11:46:57 -07:00
Leonard Chan
d0ab705b24 [llvm][ELF][AArch64] Handle R_AARCH64_PLT32 relocation
This patch allows for usage of the @PLT modifier in AArch64 assembly which
lowers to an R_AARCH64_PLT32 relocation. See D81184 for handling this
relocation in lld.

Differential Revision: https://reviews.llvm.org/D81446
2020-06-10 11:34:16 -07:00
Craig Topper
c1ffbce7ed [X86] Split imm handling out of selectMOV64Imm32 and add a separate isel pattern.
This makes the pattern available to global isel.
2020-06-10 11:12:36 -07:00
Saiyedul Islam
7246ade333 [OpenMP][AMDGCN] Support OpenMP offloading for AMDGCN architecture - Part 2
Summary:
New file include to support platform dependent grid constants. It will be
used by clang, libomptarget plugins, and deviceRTLs to access constant
values consistently and with fast access in the deviceRTLs.

Originally authored by Greg Rodgers (@gregrodgers).

Reviewers: arsenm, sameerds, jdoerfert, yaxunl, b-sumner, scchan, JonChesterfield

Reviewed By: arsenm

Subscribers: llvm-commits, pdhaliwal, jholewinski, jvesely, wdng, nhaehnle, guansong, kerbowa, sstefan1, cfe-commits, ronlieb, gregrodgers

Tags: #clang, #llvm

Differential Revision: https://reviews.llvm.org/D80917
2020-06-10 18:09:59 +00:00
Matt Arsenault
510fa460fb AMDGPU: Stop using getSelectCC in division lowering
This was promoting booleans to i32 to perform a comparison against
them to feed to a select condition. Just use the booleans
directly. This produces the same final code, since the combiner is
unable to undo the mess this creates. I untangled this logic when I
ported this code to GlobalISel, so port the cleanups back.
2020-06-10 13:56:53 -04:00
Matt Arsenault
d31b214b3c GlobalISel: Move LegalizerHelper members around
MIRBuilder was in the middle of of a bunch of methods and not group
with the other member variables, which made it harder to see what
state this carries around. Move these to the top as is the usual
convention.
2020-06-10 13:56:53 -04:00
Heejin Ahn
43887e2d29 [WebAssembly] Fix a warning for an unused variable
`ErasedUncondBr` is used only in an `assert`, so it triggers a warning
on builds without assertions. Fixed.
2020-06-10 10:06:28 -07:00
Christopher Tetreault
ed20bdbcfc [SVE] Eliminate calls to default-false VectorType::get() from X86
Reviewers: efriedma, craig.topper, RKSimon, samparker, kmclaughlin, david-arm

Reviewed By: david-arm

Subscribers: tschuett, hiraditya, rkruppe, psnobl, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D81520
2020-06-10 09:56:00 -07:00
David Green
cfbc537de8 [ARM] Update fp16-insert-extract.ll test checks. NFC 2020-06-10 17:50:27 +01:00
Joel E. Denny
3252abfb38 [FileCheck] Add missing %ProtectFileCheckOutput to FileCheck tests
This is a continuation of D65121 (committed at f471eb8e99b5).
2020-06-10 12:40:35 -04:00
Simon Pilgrim
7a87b12d4f [X86][SSE] Cleanup tests based on feedback from D81547
Simplify tests to return i1 bool, removing superfluous function calls.

Use nounwind to remove cfi
2020-06-10 16:38:33 +01:00
Matt Arsenault
4211eac508 GlobalISel: Make default implementation of legalizeCustom unreachable
If the target explicitly requested custom legalization, it should be
required to implement this. Also move default legalizeIntrinsic
implementation into the header so it's next to the related
legalizeCustom.
2020-06-10 11:05:59 -04:00
Matt Arsenault
ed46a6a89e AMDGPU/GlobalISel: Make G_IMPLICIT_DEF legality more consistent
Makes <6 x s16> legal, <4 x s8> illegal, and clamps the maximum size
to 1024.
2020-06-10 11:05:59 -04:00
Thomas Preud'homme
a5f3d35feb FileCheck [11/12]: Add matching constraint specification
This patch is part of a patch series to add support for FileCheck
numeric expressions. This specific patch adds support for specifying the
matching constraint for a numeric expression, ie. how the value being
matched should relate to the numeric expression.

This commit only adds the equality constraint where the numeric value
matched must be equal to the numeric expression. It is the default
matching constraint used when not specified. It is added to provision
other matching constraint (e.g. inequality relations).

Copyright:
    - Linaro (changes up to diff 183612 of revision D55940)
    - GraphCore (changes in later versions of revision D55940 and
                 in new revision created off D55940)

Reviewed By: jhenderson

Differential Revision: https://reviews.llvm.org/D60391
2020-06-10 15:56:10 +01:00
serge-sans-paille
6e187aff39 Correctly update Changed status for SimplifyCFG
Interestingly, this leads to better output in one of the test case.

Differential Revision: https://reviews.llvm.org/D81237
2020-06-10 16:54:15 +02:00
Raphael Isemann
3637aff1ea ADT: Fix that APSInt's string constructor claims it requires 5 bits to store a zero
Summary:

When constructing an APSInt from a string, the constructor doesn't correctly
truncate the bit width of the result if the passed in string was "0" (or any
alternative way to express 0 like "-0" or "000"). Instead of 1 (which is the
smallest allowed bit width) it returns an APSInt with a bit width of 5.

The reason is that the constructor checks that it never truncates the result to
the invalid bit width of 0, so when it calculates that storing a "0" doesn't
require any bits it just keeps the original overestimated bit width (which
happens to be 5).

This patch just sets the bit width of the result to 1 if the required bit width
is 0.

Reviewers: arphaman, dexonsmith

Reviewed By: dexonsmith

Subscribers: hiraditya, dexonsmith, JDevlieghere, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D81329
2020-06-10 16:36:33 +02:00
Simon Pilgrim
6500863ada [CostModel][X86] Add broadcast costs for vXi1 bool vectors
Doesn't mean much on non-AVX512 targets but better to keep with the other shuffles
2020-06-10 15:27:15 +01:00
Pavel Labath
87448dfa0c [DWARFDebugLine] Use truncating data extractors for prologue parsing
Summary:
This makes the code easier to reason about, as it will behave the same
way regardless of whether there is any more data coming after the
presumed end of the prologue.

Reviewers: jhenderson, dblaikie, probinson, ikudrin

Subscribers: hiraditya, MaskRay, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D77557
2020-06-10 16:12:53 +02:00
Kuter Dinel
8fa5621950 Reland: [Attributor] Split the Attributor::run() into multiple functions.
Summary:
This patch splits the Attributor::run() function into multiple
functions.

Simple Logic changes to make this possible:
  # Moved iteration count verification earlier.
  # NumFinalAAs get set a little bit later.

Reviewers: jdoerfert, sstefan1, uenoku

Reviewed By: jdoerfert

Subscribers: hiraditya, uenoku, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D81022
2020-06-10 13:21:22 +00:00
Peter Smith
364d6a7c2d [ELF][AArch64] Correct relocation codes for R_<CLS>_PLT32
The relocation codes for R_<CLS>_PLT32 are incorrectly in the dynamic
relocation range that starts at 1024 for AArch64 and 180 for AArch64_32.

Correct these so that they start at the next available static relocation
code in the non-TLS range. The R_<CLS>_PLT32 description is currently in
unpublished so this change corrects LLVM to match the values that will
appear in the final ELF for the 64-bit Arm Architecture document.

Differential Revision: https://reviews.llvm.org/D81410
2020-06-10 14:16:41 +01:00
Marco Elver
84b64ccdba [KernelAddressSanitizer] Make globals constructors compatible with kernel [v2]
[ v1 was reverted by c6ec352a6bde1995794c523adc2ebab802ccdf0a due to
  modpost failing; v2 fixes this. More info:
  https://github.com/ClangBuiltLinux/linux/issues/1045#issuecomment-640381783 ]

This makes -fsanitize=kernel-address emit the correct globals
constructors for the kernel. We had to do the following:

* Disable generation of constructors that rely on linker features such
  as dead-global elimination.

* Only instrument globals *not* in explicit sections. The kernel uses
  sections for special globals, which we should not touch.

* Do not instrument globals that are prefixed with "__" nor that are
  aliased by a symbol that is prefixed with "__". For example, modpost
  relies on specially named aliases to find globals and checks their
  contents. Unfortunately modpost relies on size stored as ELF debug info
  and any padding of globals currently causes the debug info to cause size
  reported to be *with* redzone which throws modpost off.

Bugzilla: https://bugzilla.kernel.org/show_bug.cgi?id=203493

Tested:
* With 'clang/test/CodeGen/asan-globals.cpp'.

* With test_kasan.ko, we can see:

  	BUG: KASAN: global-out-of-bounds in kasan_global_oob+0xb3/0xba [test_kasan]

* allyesconfig, allmodconfig (x86_64)

Reviewed By: glider

Tags: #clang, #llvm

Differential Revision: https://reviews.llvm.org/D81390
2020-06-10 15:08:42 +02:00
Sander de Smalen
06cf56579b [AArch64][SVE] Change pointer type of struct load/store intrinsics.
Instead of loading from e.g. `<vscale x 16 x i8>*`, load from element
pointer `i8*`. This is more in line with the other load/store
intrinsics for SVE.

Reviewers: fpetrogalli, c-rhodes, rengolin, efriedma

Reviewed By: efriedma

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D81458
2020-06-10 14:02:35 +01:00
Georgii Rymar
ed47bccbaf [yaml2obj] - Introduce a 10 Mb limit of the output by default and a --max-size option.
Multiple times we faced an issue of huge outputs due to unexpected behavior
or incorrect test cases. The last one was https://reviews.llvm.org/D80629#2073066.

This patch limits the output to 10 Mb for ELF and introduces the --max-size to change this
limit.

I've tried to keep the implementation non-intrusive.

The current logic we have is that we prepare section content in a buffer first and write
it to the output later. This patch checks the available limit on each writing attempt to this buffer
and stops writing when the limit is reached and raises the internal error flag.
Later, this flag is is checked before the actual writing to a file happens and
an error is reported.

Differential revision: https://reviews.llvm.org/D81258
2020-06-10 15:23:59 +03:00
Kazushi (Jam) Marukawa
1ac9e25624 [VE] Support convert instructions in MC layer
Summary:
Add CVTSQ/CVTDQ/CVTQD/CVTQS instructions.  Add regression tests for
them and other convert instructions of asmparser, mccodeemitter, and
disassembler.  In order to add those instructions, support RD operands
in asmparser, mccodeemitter, and disassembler.

Differential Revision: https://reviews.llvm.org/D81536
2020-06-10 12:22:33 +02:00
David Green
893fe9fa29 [ARM] MVE vectorizer reduction tests for each reduction type. NFC 2020-06-10 11:18:24 +01:00
sstefan1
73a99e6115 Revert "[Attributor] Split the Attributor::run() into multiple functions."
This reverts commit 0ee47cc92f510e4f21b584dc265105f4d51776a0.
2020-06-10 10:10:49 +00:00
stefan
9f2452c3d9 [Attributor] Split the Attributor::run() into multiple functions.
Summary:
This patch splits the Attributor::run() function into multiple functions.

Simple Logic changes to make this possible:
  # Moved iteration count verification earlier.
  # NumFinalAAs get set a little bit later.

Reviewers: jdoerfert, sstefan1, uenoku

Reviewed By: jdoerfert

Subscribers: hiraditya, uenoku, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D81022
2020-06-10 09:48:58 +00:00
Vitaly Buka
63df17ad8b [StackSafety] Add info into function summary
Summary:
This patch adds optional field into function summary,
implements asm and bitcode serialization. YAML
serialization is omitted and can be added later if
needed.

This patch includes this information into summary only
if module contains at least one sanitize_memtag function.
In a near future MTE is the user of the analysis.
Later if needed we can provede more direct control
on when information is included into summary.

Reviewers: eugenis

Subscribers: hiraditya, steven_wu, dexonsmith, arphaman, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D80908
2020-06-10 02:43:28 -07:00
Paul Walker
a8c59c6124 [FileCheck] Add function call support to numerical expressions.
This patch extends numerical expressions to allow calls to
predefined functions. These calls can be combined with the
existing numerical operators, which includes nesting calls.

The call syntax is:

  <func>(<args>)

Where <func> is a predefined string literal, currently limited to
one of add, max, min and sub. <arg> is a comma seperated list of
numerical expressions.

Subscribers: arichardson, hiraditya, thopre, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D79936
2020-06-10 09:42:00 +00:00
Florian Hahn
612fb0f532 [DSE,MSSA] Relax post-dom restriction for objs visible after return.
This patch relaxes the post-dominance requirement for accesses to
objects visible after the function returns.

Instead of requiring the killing def to post-dominate the access to
eliminate, the set of 'killing blocks' (= blocks that completely
overwrite the original access) is collected.

If all paths from the access to eliminate and an exit block go through a
killing block, the access can be removed.

To check this property, we first get the common post-dominator block for
the killing blocks. If this block does not post-dominate the access
block, there may be a path from DomAccess to an exit block not involving
any killing block.

Otherwise we have to check if there is a path from the DomAccess to the
common post-dominator, that does not contain a killing block. If there
is no such path, we can remove DomAccess. For this check, we start at
the common post-dominator and then traverse the CFG backwards. Paths are
terminated when we hit a killing block or a block that is not executed
between DomAccess and a killing block according to the post-order
numbering (if the post order number of a block is greater than the one
of DomAccess, the block cannot be in in a path starting at DomAccess).

This gives the following improvements on the total number of stores
after DSE for MultiSource, SPEC2K, SPEC2006:

Tests: 237
Same hash: 206 (filtered out)
Remaining: 31
Metric: dse.NumRemainingStores

Program                                        base      new100    diff
 test-suite...CFP2000/188.ammp/188.ammp.test   3624.00   3544.00   -2.2%
 test-suite...ch/g721/g721encode/encode.test   128.00    126.00    -1.6%
 test-suite.../Benchmarks/Olden/mst/mst.test    73.00     72.00    -1.4%
 test-suite...CFP2006/433.milc/433.milc.test   3202.00   3163.00   -1.2%
 test-suite...000/186.crafty/186.crafty.test   5062.00   5010.00   -1.0%
 test-suite...-typeset/consumer-typeset.test   40460.00  40248.00  -0.5%
 test-suite...Source/Benchmarks/sim/sim.test   642.00    639.00    -0.5%
 test-suite...nchmarks/McCat/09-vor/vor.test   642.00    644.00     0.3%
 test-suite...lications/sqlite3/sqlite3.test   35664.00  35563.00  -0.3%
 test-suite...T2000/300.twolf/300.twolf.test   7202.00   7184.00   -0.2%
 test-suite...lications/ClamAV/clamscan.test   19475.00  19444.00  -0.2%
 test-suite...INT2000/164.gzip/164.gzip.test   2199.00   2196.00   -0.1%
 test-suite...peg2/mpeg2dec/mpeg2decode.test   2380.00   2378.00   -0.1%
 test-suite.../Benchmarks/Bullet/bullet.test   39335.00  39309.00  -0.1%
 test-suite...:: External/Povray/povray.test   36951.00  36927.00  -0.1%
 test-suite...marks/7zip/7zip-benchmark.test   67396.00  67356.00  -0.1%
 test-suite...6/464.h264ref/464.h264ref.test   31497.00  31481.00  -0.1%
 test-suite...006/453.povray/453.povray.test   51441.00  51416.00  -0.0%
 test-suite...T2006/401.bzip2/401.bzip2.test   4450.00   4448.00   -0.0%
 test-suite...Applications/kimwitu++/kc.test   23481.00  23471.00  -0.0%
 test-suite...chmarks/MallocBench/gs/gs.test   6286.00   6284.00   -0.0%
 test-suite.../CINT2000/254.gap/254.gap.test   13719.00  13715.00  -0.0%
 test-suite.../Applications/SPASS/SPASS.test   30345.00  30338.00  -0.0%
 test-suite...006/450.soplex/450.soplex.test   15018.00  15016.00  -0.0%
 test-suite...ications/JM/lencod/lencod.test   27780.00  27777.00  -0.0%
 test-suite.../CINT2006/403.gcc/403.gcc.test   105285.00 105276.00 -0.0%

There might be potential to pre-compute some of the information of which
blocks are on the path to an exit for each block, but the overall
benefit might be comparatively small.

On the set of benchmarks, 15738 times out of 20322 we reach the
CFG check, the CFG check is successful. The total number of iterations
in the CFG check is 187810, so on average we need less than 10 steps in
the check loop. Bumping the threshold in the loop from 50 to 150 gives a
few small improvements, but I don't think they warrant such a big bump
at the moment. This is all pending further tuning in the future.

Reviewers: dmgreen, bryant, asbirlea, Tyker, efriedma, george.burgess.iv

Reviewed By: george.burgess.iv

Differential Revision: https://reviews.llvm.org/D78932
2020-06-10 10:39:25 +01:00
Vitaly Buka
41070823f2 Revert "[InstrProfiling] Use !associated metadata for counters, data and values"
This reverts commit 69c5ff4668cd4d1bfb6b45d71e15c12e3a23ae05.
This reverts commit 603d58b5e49c76e4a2e5bf1450b71b100a3396ba.
This reverts commit ba10bedf5631eda3a17df428c88451c754633d23.
This reverts commit 39b3c41b65302a969fa5507402976a255a07c158.
2020-06-10 02:32:50 -07:00
Alex Bradbury
2d4af7995c [RISCV] Make visibility of overridden methods in RISCVISelLowering match the parent
Currently, some fairly arbitrary subset of overriden methods in
RISCVISelLowering are private rather than public (which is the
visibility they have in TargetLowering). I suspect this is a holdover
from too closely copying another backend.

D78545 pointed out this can be difficult for some downstream patches,
and nobody has come forward to suggest a reason for keeping the
visibility as-is.

This commit simply makes all overridden methods match the public
visiblity of the parent.

Differential Revision: https://reviews.llvm.org/D79928
2020-06-10 09:16:09 +01:00
Sam Parker
8ae1625e78 [CostModel] Unify Shuffle and InsertElement Costs
Extract the existing code from getInstructionThroughput into
TTImpl::getUserCost. The duplicated code in the AMDGPU backend has
also been removed.

Differential Revision: https://reviews.llvm.org/D81448
2020-06-10 09:13:34 +01:00
Sam Parker
6ffd0e23b3 [CostModel] Unify getArithmeticInstrCost
Add the remaining arithmetic opcodes into the generic implementation
of getUserCost and then call this from getInstructionThroughput. Most
of the backends have been modified to return the base implementation
for cost kinds other RecipThroughput. The outlier here is AMDGPU
which already uses getArithmeticInstrCost for all the cost kinds.
This change means that most of the opcodes can be removed from that
backends implementation of getUserCost.

Differential Revision: https://reviews.llvm.org/D80992
2020-06-10 09:08:45 +01:00
Kazushi (Jam) Marukawa
3a6b6c93cc [VE] Support host memory access instructions in MC layer
Summary:
Add LHM/SHM instructions.  Add regression tests for them of asmparser,
mccodeemitter, and disassembler.  In order to add those instructions,
add new decode functions to disassembler, and add new print functions
to instprinter.

Differential Revision: https://reviews.llvm.org/D81535
2020-06-10 10:02:14 +02:00
Wang, Pengfei
70c7e49d44 [MS] Copy the symbols assigned to the former instruction when memory folding.
The memory folding raplaced the old instruction without copying the symbols assigned. Which will resulted in built fail due to the lost symbols.

Reviewed by craig.topper

Differential Revision: https://reviews.llvm.org/D78471
2020-06-10 15:38:32 +08:00
Eli Friedman
9d2e484903 Revert "[SPARC] Lower fp16 ops to libcalls"
This reverts commit 28415e588f1c501967a9b596e6651787996f93ff.  It's
causing buildbot failures. (Probably just need to fix the triple for the
test, but I'll look more tomorrow.)
2020-06-10 00:27:29 -07:00
LLVM GN Syncbot
1d0da227ec [gn build] Port 4f03c0b8066 2020-06-10 06:34:38 +00:00
LLVM GN Syncbot
62d46c5cd3 [gn build] Port 075890ca551 2020-06-10 06:34:37 +00:00
Amara Emerson
ac8b5a568d [AArch64] Move RegisterBankInfo.cpp/h to GISel.
Missed this file in the recent reorg.
2020-06-09 23:26:25 -07:00
Shawn Landden
733c4b788c [AArch64] custom lowering for i128 popcount
halves the number of CNT instructions generated
2020-06-10 09:44:16 +04:00
LemonBoy
ce45ca3d8a [SPARC] Lower fp16 ops to libcalls
The fp16 ops are legalized by extending/chopping them as needed.
The tests are shamelessly stolen from the RISC-V backend.

Differential Revision: https://reviews.llvm.org/D77569
2020-06-09 19:29:42 -07:00
Fangrui Song
be2cb93ae5 [Support][unittest] Fix asan failure after D81156 2020-06-09 17:48:00 -07:00