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Commit Graph

42182 Commits

Author SHA1 Message Date
Eric Christopher
cac7b248c7 Make sure that the call stack adjustments have default operands. Also
leave custom lowerings for later.

Fixes some nightly tests.

llvm-svn: 116232
2010-10-11 21:20:02 +00:00
Jakob Stoklund Olesen
a0a5015a35 PowerPC varargs functions store live-in registers on the stack. Make sure we use
virtual registers for those stores since RegAllocFast requires that each live
physreg only be used once.

This fixes PR8357.

llvm-svn: 116222
2010-10-11 20:43:09 +00:00
Eric Christopher
fa961e31b1 Found a bug turning this on by default. Disable again for now.
llvm-svn: 116220
2010-10-11 20:26:21 +00:00
Eric Christopher
ff35a1f090 Fix help text.
llvm-svn: 116218
2010-10-11 20:15:02 +00:00
Eric Christopher
b1a93706f7 Change flag from Enable to Disable since we're enabled by default.
Also don't use fast-isel on non-darwin since it's untested.

llvm-svn: 116217
2010-10-11 20:05:22 +00:00
Andrew Trick
5704a15e36 Fixes bug 8297: i386 cmpxchg8b, missing MachineMemOperand
llvm-svn: 116214
2010-10-11 19:02:04 +00:00
Jim Grosbach
a697e32f36 More binary encoding stuff, taking advantage of the new "by name" operand
matching in tblgen to do the predicate operand.

llvm-svn: 116213
2010-10-11 18:51:51 +00:00
Eric Christopher
52c102fef0 Turn on arm fast isel by default.
llvm-svn: 116212
2010-10-11 18:48:18 +00:00
Jakob Stoklund Olesen
ecf3e62010 Properly handle reloading and spilling around partial redefines in
LocalRewriter.

This is a bit of a hack that adds an implicit use operand to model the
read-modify-write nature of a partial redef. Uses and defs are rewritten in
separate passes, and a single operand would never be processed twice.

<rdar://problem/8518892>

llvm-svn: 116210
2010-10-11 18:10:36 +00:00
Francois Pichet
80ec466cf5 MSVC hangs on compilation of ARMDisassembler.cpp. PR6866 applied to ARM target.
llvm-svn: 116201
2010-10-11 11:36:19 +00:00
Eric Christopher
019eeb9c55 Copy and pasteo.
llvm-svn: 116198
2010-10-11 08:40:05 +00:00
Eric Christopher
a412d25090 Whitespace cleanup in ARM fast isel.
llvm-svn: 116197
2010-10-11 08:38:55 +00:00
Eric Christopher
c100a052eb Add srem libcall support to ARM fast isel.
llvm-svn: 116196
2010-10-11 08:37:26 +00:00
Eric Christopher
af5baa8a0f Add i8 sdiv support for ARM fast isel.
llvm-svn: 116195
2010-10-11 08:31:54 +00:00
Eric Christopher
6f65f8a4d3 Implement select handling for ARM fast-isel.
llvm-svn: 116194
2010-10-11 08:27:59 +00:00
Chris Lattner
c9709f154d Per discussion with Sanjiv, remove the PIC16 target from mainline. When/if
it comes back, it will be largely a rewrite, so keeping the old codebase
in tree isn't helping anyone.

llvm-svn: 116190
2010-10-11 05:44:40 +00:00
Michael J. Spencer
08b96a9209 X86: Call ulldiv and ftol2 on Windows instead of their libgcc eqivilents.
llvm-svn: 116188
2010-10-11 05:29:15 +00:00
Michael J. Spencer
8f7251a0e9 X86: MinGW should always use libgcc on Windows.
llvm-svn: 116177
2010-10-10 23:11:06 +00:00
Michael J. Spencer
b13cb4dd72 X86: Call _alldiv instead of __divdi3 on Windows (excluding cygwin).
llvm-svn: 116174
2010-10-10 22:04:34 +00:00
Michael J. Spencer
ae56350c76 Fix Whitespace.
llvm-svn: 116173
2010-10-10 22:04:20 +00:00
Chris Lattner
b63869a25b fix the default va_arg expansion (in the realignment case) to not implicitly
truncate the stack pointer to 32-bits on a 64-bit machine.

llvm-svn: 116169
2010-10-10 18:36:26 +00:00
Chris Lattner
2b428a0ab8 fix the expansion of va_arg instruction on PPC to know the arg
alignment for PPC32/64, avoiding some masking operations.

llvm-gcc expands vaarg inline instead of using the instruction
so it has never hit this.

llvm-svn: 116168
2010-10-10 18:34:00 +00:00
Kenneth Uildriks
e9771f15f7 Now using a variant of the existing inlining heuristics to decide whether to create a given specialization of a function in PartialSpecialization. If the total performance bonus across all callsites passing the same constant exceeds the specialization cost, we create the specialization.
llvm-svn: 116158
2010-10-09 22:06:36 +00:00
Benjamin Kramer
e2a5f1be3b Silence compiler warning.
llvm-svn: 116156
2010-10-09 16:36:44 +00:00
Michael J. Spencer
56d81e7eae MC-COFF: Fix .bss section size. Fixes PR8335. Patch by NAKAMUTA Takumi!
llvm-svn: 116155
2010-10-09 16:04:45 +00:00
Michael J. Spencer
4dc462314c MC-COFF: Implement InitSections. Fixes PR8335.
llvm-svn: 116151
2010-10-09 15:44:27 +00:00
Michael J. Spencer
9e8793d7d6 MC-COFF: Add COFFAsmParser. Completes PR8343.
llvm-svn: 116150
2010-10-09 11:01:07 +00:00
Michael J. Spencer
1c60bd155b Fix Whitespace.
llvm-svn: 116149
2010-10-09 11:00:50 +00:00
Michael J. Spencer
3066a09189 MC-COFF: Assert on non-coff sections.
llvm-svn: 116148
2010-10-09 11:00:37 +00:00
Evan Cheng
8c17a06411 Add VLD4 scheduling itineraries.
llvm-svn: 116143
2010-10-09 04:07:58 +00:00
Michael J. Spencer
a2f33dfddc MC: Move ParseDirectiveELFType into ELFAsmParser. COFF uses .type for something else.
llvm-svn: 116142
2010-10-09 03:47:55 +00:00
Evan Cheng
df7f5672ee Finish vld3 and vld4.
llvm-svn: 116140
2010-10-09 01:45:34 +00:00
Evan Cheng
bf6307d869 Complete vld2 instruction itineries.
llvm-svn: 116136
2010-10-09 01:26:12 +00:00
Evan Cheng
c0933d5ec1 Multiply instructions are issued on pipeline 0. They do not need to reserve pipeline 1.
llvm-svn: 116135
2010-10-09 01:15:04 +00:00
Evan Cheng
15fc769cf2 Correct some load / store instruction itinerary mistakes:
1. Cortex-A8 load / store multiplies can only issue on ALU0.
2. Eliminate A8_Issue, A8_LSPipe will correctly limit the load / store issues.
3. Correctly model all vld1 and vld2 variants.

llvm-svn: 116134
2010-10-09 01:03:04 +00:00
Bill Wendling
ba58fb0f42 Check to make sure that the iterator isn't at the beginning of the basic block
before decrementing. <rdar://problem/8529919>

llvm-svn: 116126
2010-10-09 00:03:48 +00:00
Chris Lattner
68ff81a2e6 add jit support for the new psuedo instructions I added for
the add/or xform.  The JIT isn't mcized yet, boo.

This fixes Olden/voronoi, bh and a ton of other stuff that
uses the jit.

llvm-svn: 116125
2010-10-08 23:59:27 +00:00
Chris Lattner
2176ca6377 machine a mutable machineinstr down into emitInstruction.
llvm-svn: 116124
2010-10-08 23:54:01 +00:00
Eric Christopher
a1d180e00e Fix the store part of this as well. Fixes smg2000.
llvm-svn: 116123
2010-10-08 23:52:16 +00:00
Jakob Stoklund Olesen
8c2e951b2b Rename SplitEditor::rewrite to finish() and break it out into a couple of new
functions: computeRemainder and rewrite.

When the remainder breaks up into multiple components, remember to rewrite those
uses as well.

llvm-svn: 116121
2010-10-08 23:42:21 +00:00
Evan Cheng
7904166763 Avoid compiler warning: comparison between signed and unsigned integer.
llvm-svn: 116119
2010-10-08 23:01:57 +00:00
Jakob Stoklund Olesen
c14c1d2e21 Extract method ProcessUses from LocalRewriter::RewriteMBB. Both parent and child
are still way too long, but it's a start.

No functional change intended.

llvm-svn: 116116
2010-10-08 22:14:41 +00:00
Anton Korobeynikov
c425302670 Do not check that the bodies of two defs of same linkonce global are the same.
Such a check does not make any sense in presense of inlining and other compiler-dependent stuff.
This should fix bunch of warnings on mingw32.

llvm-svn: 116113
2010-10-08 21:50:04 +00:00
Jim Grosbach
3075d28c15 Implement a few more binary encoding bits. Still very early stage proof-of-
concept level stuff at this point, but it is generally working for those
instructions that know how to map the operands.

This patch fills in the register operands for add/sub/or/etc instructions
and adds the conditional execution predicate encoding.

llvm-svn: 116112
2010-10-08 21:45:55 +00:00
Jakob Stoklund Olesen
9d127e625c Classify value numbers into connected components in linear time.
llvm-svn: 116105
2010-10-08 21:19:28 +00:00
Rafael Espindola
bfd3c31acf Call InitSections in llc and clang so that the binaries produced by them
are easier to diff with those produced by llvm-mc.

llvm-svn: 116095
2010-10-08 19:37:38 +00:00
Dan Gohman
d64a33ade4 Filter out illegal formulae after updating offsets, not before, so that
formulae which become illegal as a result of the offset updating don't
escape.

This is for rdar://8529692. No testcase yet, because the given cases
hit use-list ordering differences.

llvm-svn: 116093
2010-10-08 19:33:26 +00:00
Cameron Esfahani
664317d6cd Recommit 116056, now with the missing file...
llvm-svn: 116083
2010-10-08 19:24:18 +00:00
Evan Cheng
8833658eb0 Don't waste time unfolding simple loads. The unfolded copy won't be hoisted.
llvm-svn: 116081
2010-10-08 18:59:19 +00:00
Evan Cheng
b6cde7cdf4 Fix operand latency computation in cases where the definition operand is
implicit. e.g.
%D6<def>, %D7<def> = VLD1q16 %R2<kill>, 0, ..., %Q3<imp-def>                                                                                                                                                                              
%Q1<def> = VMULv8i16 %Q1<kill>, %Q3<kill>, ...

The real definition indices are 0,1.

llvm-svn: 116080
2010-10-08 18:42:25 +00:00