RPCS3/llvm-mirror
1
0
Fork 0
mirror of https://github.com/RPCS3/llvm-mirror.git synced 2024-11-25 04:02:41 +01:00
Code Issues Projects Releases Wiki Activity
33,496 Commits 4 Branches 5 Tags 704 MiB
c157b172c1
Commit Graph

682 Commits

Author SHA1 Message Date
Evan Cheng
3c78aadb70 No need for noResults anymore. 
llvm-svn: 40075
 2007-07-20 00:21:23 +00:00
Evan Cheng
8312ed6f77 Change instruction description to split OperandList into OutOperandList and 
InOperandList. This gives one piece of important information: # of results
produced by an instruction.
An example of the change:
def ADD32rr  : I<0x01, MRMDestReg, (ops GR32:$dst, GR32:$src1, GR32:$src2),
                 "add{l} {$src2, $dst|$dst, $src2}",
                 [(set GR32:$dst, (add GR32:$src1, GR32:$src2))]>;
=>
def ADD32rr  : I<0x01, MRMDestReg, (outs GR32:$dst), (ins GR32:$src1, GR32:$src2),
                 "add{l} {$src2, $dst|$dst, $src2}",
                 [(set GR32:$dst, (add GR32:$src1, GR32:$src2))]>;

llvm-svn: 40033
 2007-07-19 01:14:50 +00:00
Chris Lattner
fe26fdfeaf Work around a bogus gcc 4.2 warning. 
llvm-svn: 39993
 2007-07-18 04:51:57 +00:00
Dan Gohman
48b2f7992b Eliminate an unused parameter. 
llvm-svn: 39828
 2007-07-13 20:16:50 +00:00
Evan Cheng
974bb09390 Try committing again. Add OptionalDefOperand. Remove clobbersPred. 
llvm-svn: 38498
 2007-07-10 18:05:01 +00:00
Evan Cheng
2ecd061c78 ImmutablePredicateOperand is no more. 
llvm-svn: 37963
 2007-07-06 23:23:38 +00:00
Rafael Espindola
7b3de98989 Add the byval attribute 
llvm-svn: 37940
 2007-07-06 10:57:03 +00:00
Evan Cheng
9593d4ed73 Refactor code to add initial support for OptionalDefOperand. 
llvm-svn: 37933
 2007-07-06 01:05:26 +00:00
Evan Cheng
2ce6ccab6d Teach DAGISelEmitter about zero_reg. 
llvm-svn: 37900
 2007-07-05 07:19:45 +00:00
Evan Cheng
2a4b3f341b Instructions with ImmutablePredicateOperand aren't really predicable since their predicates are fixed at isel time. 
llvm-svn: 37899
 2007-07-05 07:19:29 +00:00
John Criswell
57e5ed4b5a Convert .cvsignore files 
llvm-svn: 37801
 2007-06-29 16:35:07 +00:00
Evan Cheng
c8b17dd965 One additional field in TargetRegisterDesc. 
llvm-svn: 37760
 2007-06-27 17:09:34 +00:00
Evan Cheng
ac10d44736 Add immediate sub-registers. 
llvm-svn: 37738
 2007-06-26 20:59:16 +00:00
Dan Gohman
9cbc3fb1ab Revert the earlier change that removed the M_REMATERIALIZABLE machine 
instruction flag, and use the flag along with a virtual member function
hook for targets to override if there are instructions that are only
trivially rematerializable with specific operands (i.e. constant pool
loads).

llvm-svn: 37728
 2007-06-26 00:48:07 +00:00
Dan Gohman
550ec9362b Fix a typo in a comment. 
llvm-svn: 37727
 2007-06-26 00:43:18 +00:00
Chris Lattner
efa46b445c silence warning when assertions are disabled. 
llvm-svn: 37654
 2007-06-19 06:40:46 +00:00
Dan Gohman
b60d8a92c9 Replace M_REMATERIALIZIBLE and the newly-added isOtherReMaterializableLoad 
with a general target hook to identify rematerializable instructions. Some
instructions are only rematerializable with specific operands, such as loads
from constant pools, while others are always rematerializable. This hook
allows both to be identified as being rematerializable with the same
mechanism.

llvm-svn: 37644
 2007-06-19 01:48:05 +00:00
Evan Cheng
12b3002673 Replace TargetInstrInfo::CanBeDuplicated() with a M_NOT_DUPLICABLE bit. 
llvm-svn: 37643
 2007-06-19 01:26:51 +00:00
Christopher Lamb
68017d151b Add support to tablegen for specifying subregister classes on a per register class basis. 
llvm-svn: 37572
 2007-06-13 22:20:15 +00:00
Evan Cheng
1be50b2f54 Add clobbersPred - instruction that clobbers condition code / register which are used to predicate instructions. 
llvm-svn: 37465
 2007-06-06 10:14:55 +00:00
Bill Wendling
d2b1274d1b Patches by Chuck Rose to unbreak V Studio builds. 
Thanks Chuck!

llvm-svn: 37428
 2007-06-04 23:52:59 +00:00
Dan Gohman
4ea79a66c2 Remove the operator<< for MVT::ValueType in preparation for MVT::ValueType 
being changed from an enum to an integer type, which can't have a custom
operator<< overload.

llvm-svn: 37412
 2007-06-04 16:11:03 +00:00
Reid Spencer
31622dd4a9 The Intrinsic::getDeclaration function's Tys parameter only contains the 
types of the iAny types involved in the overloaded intrinsic. Thus, we
can't use the argument number as the index but have to count them separately
in order to index Tys correctly. This patch rectifies this situation.

llvm-svn: 37296
 2007-05-22 19:30:31 +00:00
Evan Cheng
ecb8e3dc44 Rename M_PREDICATED to M_PREDICABLE; opcode can be specified isPredicable without having a PredicateOperand. 
llvm-svn: 37116
 2007-05-16 20:45:24 +00:00
Chris Lattner
39d713e4a5 Fix CodeGen/PowerPC/2007-05-14-InlineAsmSelectCrash.ll, the other recent 
patches are also needed.

llvm-svn: 37070
 2007-05-15 01:36:44 +00:00
Evan Cheng
f96cf9eab6 Added \!con(a,b) syntax to concatnate two dag fragments. 
llvm-svn: 37063
 2007-05-15 01:23:24 +00:00
Evan Cheng
34ce8e7297 Mark all (not just the first) predicate operand M_PREDICATE_OPERAND. 
llvm-svn: 37061
 2007-05-15 01:20:36 +00:00
Evan Cheng
0afaeec496 PredicateOperand related bug fix. 
llvm-svn: 37060
 2007-05-15 01:19:51 +00:00
Evan Cheng
41d7d13158 If a PredicateOperand has an empty ExecuteAlways field, treat it as if a normal operand for isel. 
llvm-svn: 36946
 2007-05-08 21:04:07 +00:00
Bill Wendling
dc82c5a195 Add an "implies" field to features. This indicates that, if the current 
feature is set, then the features in the implied list should be set also.
The opposite is also enforced: if a feature in the implied list isn't set,
then the feature that owns that implies list shouldn't be set either.

llvm-svn: 36756
 2007-05-04 20:38:40 +00:00
Nate Begeman
e32b8f8b4b A bit of feedback from Chris that I missed; error rather than asserting. 
llvm-svn: 36619
 2007-05-01 06:08:36 +00:00
Nate Begeman
767ee95d29 llvm bug #1350, parts 1, 2, and 3. 
llvm-svn: 36618
 2007-05-01 05:57:02 +00:00
Dan Gohman
eaa7a3889e Update a comment to reflect recent changes in the type system. 
llvm-svn: 36486
 2007-04-26 19:43:14 +00:00
Lauro Ramos Venancio
40822aaf24 bugfix: remember that ResNode was declared. 
llvm-svn: 36477
 2007-04-26 17:03:22 +00:00
Christopher Lamb
56768513ee Fix generation of certain scheduler itineraries. 
llvm-svn: 36338
 2007-04-22 09:04:24 +00:00
Evan Cheng
59dcbfde67 Bug fix; add super-registers sets. 
llvm-svn: 36296
 2007-04-21 00:55:29 +00:00
Lauro Ramos Venancio
bc32d90b46 Implement "general dynamic", "initial exec" and "local exec" TLS models for 
X86 32 bits.

llvm-svn: 36283
 2007-04-20 21:38:10 +00:00
Evan Cheng
842e2c48a0 Add sub-registers sets. 
llvm-svn: 36278
 2007-04-20 21:13:46 +00:00
Reid Spencer
f12ab5a55b For PR1328: 
Don't assert everytime an intrinsic name isn't recognized. Instead, make
the assert optional when callin getIntrinsicID(). This allows the assembler
to handle invalid intrinsic names gracefully.

llvm-svn: 36120
 2007-04-16 06:54:34 +00:00
Reid Spencer
5b8b959d29 For PR1297: 
Implement code generation for overloaded intrinsic functions. The basic
difference is that "actual" argument types must be provided when
constructing intrinsic names and types. Also, for recognition, only the
prefix is examined. If it matches, the suffix is assumed to match. The
suffix is checked by the Verifier, however.

llvm-svn: 35539
 2007-04-01 07:20:02 +00:00
Bill Wendling
a42484728c Add support for the v1i64 type. This makes better code for this: 
#include <mmintrin.h>

extern __m64 C;

void baz(__v2si *A, __v2si *B)
{
  *A = C;
  _mm_empty();
}

We get this:

_baz:
        call "L1$pb"
"L1$pb":
        popl %eax
        movl L_C$non_lazy_ptr-"L1$pb"(%eax), %eax
        movq (%eax), %mm0
        movl 4(%esp), %eax
        movq %mm0, (%eax)
        emms
        ret

GCC gives us this:

_baz:
        pushl   %ebx
        call    L3
"L00000000001$pb":
L3:
        popl    %ebx
        subl    $8, %esp
        movl    L_C$non_lazy_ptr-"L00000000001$pb"(%ebx), %eax
        movl    (%eax), %edx
        movl    4(%eax), %ecx
        movl    16(%esp), %eax
        movl    %edx, (%eax)
        movl    %ecx, 4(%eax)
        emms
        addl    $8, %esp
        popl    %ebx
        ret

llvm-svn: 35351
 2007-03-26 07:53:08 +00:00
Evan Cheng
a54c20ca4e Recognize target instruction flag 'isReMaterializable'. 
llvm-svn: 35159
 2007-03-19 06:20:37 +00:00
Anton Korobeynikov
85d6c1ebad Refactoring of formal parameter flags. Enable properly use of 
zext/sext/aext stuff.

llvm-svn: 35008
 2007-03-07 16:25:09 +00:00
Anton Korobeynikov
6da6c8c48b Use new SDIselParamAttr enumeration. This removes "magick" constants 
from formal attributes' flags processing.

llvm-svn: 34963
 2007-03-06 08:12:33 +00:00
Chris Lattner
b7edd45f41 rename some CCActions 
llvm-svn: 34724
 2007-02-28 05:29:06 +00:00
Chris Lattner
2b616c0c0a implement CCPromoteToType 
llvm-svn: 34720
 2007-02-28 04:43:48 +00:00
Chris Lattner
35b160f990 reapply 
llvm-svn: 34697
 2007-02-27 22:08:27 +00:00
Chris Lattner
33bdd3ed53 *** empty log message *** 
llvm-svn: 34696
 2007-02-27 22:05:51 +00:00
Evan Cheng
06b5bb9888 Backing out 
CodeGenTarget.cpp updated: 1.82 -> 1.83
Record.cpp updated: 1.55 -> 1.56
Record.h updated: 1.59 -> 1.60
TableGen.cpp updated: 1.47 -> 1.48
It's missing CallingConvEmitter.h

llvm-svn: 34693
 2007-02-27 21:44:08 +00:00
Chris Lattner
5e2b19c767 initial support for calling convention generation, still unfinished. 
llvm-svn: 34682
 2007-02-27 20:43:37 +00:00