1
0
mirror of https://github.com/RPCS3/llvm-mirror.git synced 2024-11-23 19:23:23 +01:00
Commit Graph

167626 Commits

Author SHA1 Message Date
Florian Hahn
7ff6835194 [GVN,NewGVN] Move patchReplacementInstruction to Utils/Local.h
This function is shared between both implementations. I am not sure if
Utils/Local.h is the best place though.

Reviewers: davide, dberlin, efriedma, xbolva00

Reviewed By: efriedma, xbolva00

Differential Revision: https://reviews.llvm.org/D47337

llvm-svn: 339138
2018-08-07 13:27:33 +00:00
Jonas Devlieghere
7a74c5eed1 Fix inconsistency with/without debug information (-g)
This fixes an inconsistency in code generation when compiling with or
without debug information (-g). When debug information is available in
an empty block, the original test would fail, resulting in possibly
different code.

Patch by: Jeroen Dobbelaere

Differential revision: https://reviews.llvm.org/D49467

llvm-svn: 339129
2018-08-07 12:14:01 +00:00
Aleksandar Beserminji
179e3b577d [mips] Handle branch expansion corner cases
When potential jump instruction and target are in the same segment, use
jump instruction with immediate field.

In cases where offset does not fit immediate value of a bc/j instructions,
offset is stored into register, and then jump register instruction is used.

Differential Revision: https://reviews.llvm.org/D48019

llvm-svn: 339126
2018-08-07 10:45:45 +00:00
Andrea Di Biagio
7444c6289e [Tablegen] In TargetSchedule.td: Remove unused argument pfmCounters from ProcResourceUnits.
PFM counters don't need to be passed in input to the definition of
ProcResourceUnits. class PfmIssueCounter (see r329675) is used to map resources
to PFM counter(s).

Differential Revision: https://reviews.llvm.org/D50333

llvm-svn: 339125
2018-08-07 10:33:46 +00:00
Pavel Labath
d33177a252 [DebugInfo] Reduce debug_str_offsets section size
Summary:
The accelerator tables use the debug_str section to store their strings.
However, they do not support the indirect method of access that is
available for the debug_info section (DW_FORM_strx et al.).

Currently our code is assuming that all strings can/will be referenced
indirectly, and puts all of them into the debug_str_offsets section.
This is generally true for regular (unsplit) dwarf, but in the DWO case,
most of the strings in the debug_str section will only be used from the
accelerator tables. Therefore the contents of the debug_str_offsets
section will be largely unused and bloating the main executable.

This patch rectifies this by teaching the DwarfStringPool to
differentiate between strings accessed directly and indirectly. When a
user inserts a string into the pool it has to declare whether that
string will be referenced directly or not. If at least one user requsts
indirect access, that string will be assigned an index ID and put into
debug_str_offsets table. Otherwise, the offset table is skipped.

This approach reduces the overall binary size (when compiled with
-gdwarf-5 -gsplit-dwarf) in my tests by about 2% (debug_str_offsets is
shrunk by 99%).

Reviewers: probinson, dblaikie, JDevlieghere

Subscribers: aprantl, mgrang, llvm-commits

Differential Revision: https://reviews.llvm.org/D49493

llvm-svn: 339122
2018-08-07 09:54:52 +00:00
Simon Pilgrim
4747456e9b [TargetLowering] Add support for non-uniform vectors to BuildUDIV
This patch refactors the existing TargetLowering::BuildUDIV base implementation to support non-uniform constant vector denominators.

It also includes a fold for MULHU by pow2 constants to SRL which can now more readily occur from BuildUDIV.

Differential Revision: https://reviews.llvm.org/D49248

llvm-svn: 339121
2018-08-07 09:51:34 +00:00
Simon Pilgrim
90a599055d [X86][SSE] Add more non-uniform exact sdiv vector tests covering all/none ashr paths
llvm-svn: 339120
2018-08-07 09:31:22 +00:00
Hans Wennborg
1017c28ba5 vs integration: bump version number
llvm-svn: 339119
2018-08-07 09:27:05 +00:00
Hans Wennborg
e6864e5386 vs integration: update the publisher name
llvm-svn: 339118
2018-08-07 09:15:16 +00:00
Hans Wennborg
3075537308 vs integration: fix default path to clang-cl
Differential Revision: https://reviews.llvm.org/D50335

llvm-svn: 339117
2018-08-07 09:02:06 +00:00
George Rimar
28a885c90f [yaml2obj] - Add a support for changing EntSize.
I was trying to add a test case for LLD and found that it
is impossible to set sh_entsize via yaml.
The patch implements the missing part.

Differential revision: https://reviews.llvm.org/D50235

llvm-svn: 339113
2018-08-07 08:11:38 +00:00
Sjoerd Meijer
053468d220 [ARM][NFC] Replaced tab characters in test file vfcmp.ll.
llvm-svn: 339111
2018-08-07 08:05:15 +00:00
Matt Arsenault
513e534210 AMDGPU: Add feature vi-insts
This is necessary to add a VI specific builtin,
__builtin_amdgcn_s_dcache_wb. We already have an
overly specific feature for one of these builtins,
for s_memrealtime. I'm not sure whether it's better
to add more of those, or to get rid of that and merge
it with vi-insts.

Alternatively, maybe this logically goes with scalar-stores?

llvm-svn: 339104
2018-08-07 07:28:46 +00:00
Craig Topper
371c57f538 [SelectionDAG][X86] Rename MaskedLoadSDNode::getSrc0 to getPassThru.
Src0 doesn't really convey any meaning to what the operand is. Passthru matches what's used in the documentation for the intrinsic this comes from.

llvm-svn: 339101
2018-08-07 06:52:49 +00:00
Craig Topper
18bd0d4388 [SelectionDAG][X86] Rename getValue to getPassThru for gather SDNodes.
getValue is more meaningful name for scatter than it is for gather. Split them and use getPassThru for gather.

llvm-svn: 339096
2018-08-07 06:13:40 +00:00
Dean Michael Berris
5e09cb27dc [XRay] Improve error reporting when loading traces
Summary:
This change uses a single offset pointer used throughout the
implementation of the individual record parsers. This allows us to
report where in a trace file parsing failed.

We're still in an intermediate step here as we prepare to refactor this
further into a set of types and use object-oriented design principles
for a cleaner implementation. The next steps will be to allow us to
parse/dump files in a streaming fashion and incrementally build up the
structures in memory instead of the current all-or-nothing approach.

Reviewers: kpw, eizan

Reviewed By: kpw

Subscribers: hiraditya, llvm-commits

Differential Revision: https://reviews.llvm.org/D50169

llvm-svn: 339092
2018-08-07 04:42:39 +00:00
Stella Stamenova
89cdfaa61e [lit, tests] Fix failing lit test: shtest-format.py
Summary:
The problem here is that on windows double quotes are used for paths (usually) while single quotes are not. This is not generally a problem for the tests because the lit infrastructure tends to treat both the same. One (and possibly only) exception is when some tests are run in an external shell such as some of the shtest-format tests. In this case on windows the path to python was not created correctly because it had single quotes and the test failed.

This same test is already failing with python 3 which is why our testing missed the new failure. This patch will take care of the immediate failure with python 2 and I'll send a follow up for the python 3 failure.

Reviewers: asmith, zturner

Subscribers: delcypher, llvm-commits

Differential Revision: https://reviews.llvm.org/D50373

llvm-svn: 339091
2018-08-07 04:08:46 +00:00
Max Kazantsev
ee06f10f89 [NFC] Factor out implicit control flow logic from GVN
Logic for tracking implicit control flow instructions was added to GVN to
perform PRE optimizations correctly. It appears that GVN is not the only
optimization that sometimes does PRE, so this logic is required in other
places (such as Jump Threading).

This is an NFC patch that encapsulates all ICF-related logic in a dedicated
utility class separated from GVN.

Differential Revision: https://reviews.llvm.org/D40293

llvm-svn: 339086
2018-08-07 01:47:20 +00:00
Heejin Ahn
0629987a47 [WebAssembly] Enable atomic expansion for unsupported atomicrmws
Summary:
Wasm does not have direct counterparts to some of LLVM IR's atomicrmw
instructions (min, max, umin, umax, and nand). This enables atomic
expansion using cmpxchg instruction within a loop for those atomicrmw
instructions.

Reviewers: dschuff

Subscribers: sbc100, jgravelle-google, sunfish, llvm-commits

Differential Revision: https://reviews.llvm.org/D49440

llvm-svn: 339084
2018-08-07 00:22:22 +00:00
Derek Schuff
aec964f09e [WebAssembly] Replace SIMD expression types with V128
Summary:
The spec only defines a SIMD expression type of V128 and
leaves interpretation of different vector types to the instructions.

Differential Revision: https://reviews.llvm.org/D50367

Patch by Thomas Lively

llvm-svn: 339082
2018-08-06 23:16:50 +00:00
Matt Arsenault
6f47a940b3 AMDGPU: cvt_pk_rtz_f16 canonicalizes
llvm-svn: 339078
2018-08-06 23:01:31 +00:00
Matt Arsenault
f8bccb2e5b AMDGPU: Handle some vector operations in isCanonicalized
llvm-svn: 339077
2018-08-06 22:45:51 +00:00
Stella Stamenova
f5a62c8af5 [lit, python] Always add quotes around the python path in lit
Summary:
The issue with the python path is that the path to python on Windows can contain spaces. To make the tests always work, the path to python needs to be surrounded by quotes.

This change updates several configuration files which specify the path to python as a substitution and also remove quotes from existing tests.

Reviewers: asmith, zturner, alexshap, jakehehrlich

Reviewed By: zturner, alexshap, jakehehrlich

Subscribers: mehdi_amini, nemanjai, eraman, kbarton, jakehehrlich, steven_wu, dexonsmith, stella.stamenova, delcypher, llvm-commits

Differential Revision: https://reviews.llvm.org/D50206

llvm-svn: 339073
2018-08-06 22:37:44 +00:00
Matt Arsenault
59da6a5d64 AMDGPU: Push fcanonicalize through partially constant build_vector
This usually avoids some re-packing code, and may
help find canonical sources.

llvm-svn: 339072
2018-08-06 22:30:44 +00:00
Matt Arsenault
4a70957c51 AMDGPU: Refactor fcanonicalize combine
This will make more complex combines easier.

llvm-svn: 339070
2018-08-06 22:10:26 +00:00
Philip Reames
62d7726bd6 [LICM] Extract a helper function for readability [NFC]
llvm-svn: 339069
2018-08-06 22:07:37 +00:00
Peter Collingbourne
a25cd62f6b MC: Redirect .addrsig directives referring to private (.L) symbols to the section symbol.
This matches our behaviour for regular (i.e. relocated) references to
private symbols and therefore avoids needing to unnecessarily write
address-significant .L symbols to the object file's symbol table,
which can interfere with stack traces.

Fixes check-cfi after r339050.

llvm-svn: 339066
2018-08-06 21:59:58 +00:00
Matt Arsenault
8aa52b1fc0 AMDGPU: Treat more custom operations as canonicalizing
Everything should quiet, and I think everything should
flush.

I assume the min3/med3/max3 follow the same rules
as regular min/max for flushing, which should at
least be conservatively correct.

There are still more operations that need to
be handled.

llvm-svn: 339065
2018-08-06 21:58:11 +00:00
Matt Arsenault
5b6d7817c6 AMDGPU: Conversions always produce canonical results
Not sure why this was checking for denormals for f16.
My interpretation of the IEEE standard is conversions
should produce a canonical result, and the ISA manual
says denormals are created when appropriate.

llvm-svn: 339064
2018-08-06 21:51:52 +00:00
Philip Reames
e484f1353f [LICM] Further strengthen tests for hoisting guards and invariant.starts [NFC]
llvm-svn: 339062
2018-08-06 21:39:43 +00:00
Matt Arsenault
7810a741e8 AMDGPU: Fix implementation of isCanonicalized
If denormals are enabled, denormals are canonical.
Also fix a few other issues. minnum/maxnum are supposed
to canonicalize. Temporarily improve workaround for the
instruction behavior change in gfx9.

Handle selects and fcopysign.

The tests were also largely broken, since they were
checking for a flush used on some targets after the
store of the result.

llvm-svn: 339061
2018-08-06 21:38:27 +00:00
Reid Kleckner
437cf78eba Fix a -Wsign-compare
llvm-svn: 339059
2018-08-06 21:26:47 +00:00
Philip Reames
798ca91a81 [LICM] Strengthen invariant.start hoisting tests [NFC]
llvm-svn: 339057
2018-08-06 21:18:34 +00:00
Reid Kleckner
e82c0d0d03 [X86] Fix assertion in subreg extraction
This assert fires when attempting to extract a subregister from the
global PIC base register. This virtual register SD node is not in the
VRBaseMap, so we shouldn't call getVR to look it up there. If this is a
RegisterSDNode, we should be able to use the virtual register directly.

Fixes PR38385

llvm-svn: 339056
2018-08-06 21:16:16 +00:00
Philip Reames
2991bf0f1a [LICM] Add tests highlighting missing hoists for intrinsics [NFC]
llvm-svn: 339054
2018-08-06 21:06:15 +00:00
Evandro Menezes
d42ceaba64 [SLC] Fix shrinking of pow()
Properly shrink `pow()` to `powf()` as a binary function and, when no other
simplification applies, do not discard it.

Differential revision: https://reviews.llvm.org/D50113

llvm-svn: 339046
2018-08-06 19:40:17 +00:00
Alexandre Ganea
52ed70160e [llvm-pdbutil] Support PDBs without a DBI stream
Differential Revision: https://reviews.llvm.org/D50258

llvm-svn: 339045
2018-08-06 19:35:00 +00:00
Easwaran Raman
1d12e5ac65 [X86] Recognize a splat of negate in isFNEG
Summary:
Expand isFNEG so that we generate the appropriate F(N)M(ADD|SUB)
instructions in more cases. For example, the following sequence
a = _mm256_broadcast_ss(f)
d = _mm256_fnmadd_ps(a, b, c)

generates an fsub and fma without this patch and an fnma with this
change.

Reviewers: craig.topper

Subscribers: llvm-commits, davidxl, wmi

Differential Revision: https://reviews.llvm.org/D48467

llvm-svn: 339043
2018-08-06 19:23:38 +00:00
Craig Topper
a5cd0fe8a3 [X86] When using "and $0" and "orl $-1" to store 0 and -1 for minsize, make sure the store isn't volatile
If the store is volatile this might be a memory mapped IO access. In that case we shouldn't generate a load that didn't exist in the source

Differential Revision: https://reviews.llvm.org/D50270

llvm-svn: 339041
2018-08-06 18:44:26 +00:00
Craig Topper
708c88cecf [X86] Add test cases to show bad use of "and $0" and "orl $-1" for minsize when the store is volatile
If the store is volatile we shouldn't be adding a little that didn't exist in the source.

llvm-svn: 339040
2018-08-06 18:44:21 +00:00
Wei Mi
63084224da [RegisterCoalescer] Delay live interval update work until the rematerialization
for all the uses from the same def is done.

We run into a compile time problem with flex generated code combined with
`-fno-jump-tables`. The cause is that machineLICM hoists a lot of invariants
outside of a big loop, and drastically increases the compile time in global
register splitting and copy coalescing.  https://reviews.llvm.org/D49353
relieves the problem in global splitting. This patch is to handle the problem
in copy coalescing.

About the situation where the problem in copy coalescing happens. After
machineLICM, we have several defs outside of a big loop with hundreds or
thousands of uses inside the loop. Rematerialization in copy coalescing
happens for each use and everytime rematerialization is done, shrinkToUses
will be called to update the huge live interval. Because we have 'n' uses
for a def, and each live interval update will have at least 'n' complexity,
the total update work is n^2.

To fix the problem, we try to do the live interval update work in a collective
way. If a def has many copylike uses larger than a threshold, each time
rematerialization is done for one of those uses, we won't do the live interval
update in time but delay that work until rematerialization for all those uses
are completed, so we only have to do the live interval update work once.

Delaying the live interval update could potentially change the copy coalescing
result, so we hope to limit that change to those defs with many
(like above a hundred) copylike uses, and the cutoff can be adjusted by the
option -mllvm -late-remat-update-threshold=xxx.

Differential Revision: https://reviews.llvm.org/D49519

llvm-svn: 339035
2018-08-06 17:30:45 +00:00
Daniil Fukalov
8b5f88897d Fix typo in the MSVC Visualizer for SmallVector class
llvm-svn: 339029
2018-08-06 16:47:24 +00:00
Owen Reynolds
247f496348 Fix raw_fd_ostream::write_impl hang due to an infinite loop with large output
On windows when raw_fd_ostream::write_impl calls write, a 32 bit input is required for character count. As a variable with size_t is used for this argument, on x64 integral demotion occurs. In the case of large files an infinite loop follows. 
See: https://bugs.llvm.org/show_bug.cgi?id=37926
This fix allows the output of files larger than the previous int32 limit.

Differential Revision: https://reviews.llvm.org/D48948

llvm-svn: 339027
2018-08-06 16:21:41 +00:00
Matt Arsenault
a613846878 AMDGPU: Fold v_lshl_or_b32 with 0 src0
Appears from expansion of some packed cases.

llvm-svn: 339025
2018-08-06 15:40:20 +00:00
Matt Arsenault
9a07397f8c ValueTracking: Handle canonicalize in CannotBeNegativeZero
Also fix apparently missing test coverage for any of the
handling here.

llvm-svn: 339023
2018-08-06 15:16:26 +00:00
Matt Arsenault
3c6e1c10b5 AMDGPU: Rename check prefixes in test
Will avoid noisy diff in future change.

llvm-svn: 339022
2018-08-06 15:16:12 +00:00
David Bolvansky
941e1e17ff [NFC] Fixed unused function warnings
llvm-svn: 339021
2018-08-06 15:09:15 +00:00
David Bolvansky
138615c03f Revert unused function fix
llvm-svn: 339020
2018-08-06 15:05:51 +00:00
David Bolvansky
8b848be5ec [NFC] Fixed unused function warning
llvm-svn: 339019
2018-08-06 14:42:07 +00:00
Bryan Chan
2b6ebc3031 [AArch64] Fix assertion failure on widened f16 BUILD_VECTOR
Summary:
Ensure that NormalizedBuildVector returns a BUILD_VECTOR with operands of the
same type. This fixes an assertion failure in VerifySDNode.

Reviewers: SjoerdMeijer, t.p.northover, javed.absar

Reviewed By: SjoerdMeijer

Subscribers: kristof.beyls, llvm-commits

Differential Revision: https://reviews.llvm.org/D50202

llvm-svn: 339013
2018-08-06 14:14:41 +00:00