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Commit Graph

70 Commits

Author SHA1 Message Date
Nate Begeman
c29fac7fce First part of bug 680:
Remove TLI.LowerVA* and replace it with SDNodes that are lowered the same
way as everything else.

llvm-svn: 25606
2006-01-25 18:21:52 +00:00
Evan Cheng
c368fb710f Default scheduling preference is SchedulingForLatency.
llvm-svn: 25603
2006-01-25 09:15:54 +00:00
Chris Lattner
23da2dc2ac Don't assert on 'select_cc SETUO'
llvm-svn: 25423
2006-01-18 19:42:35 +00:00
Chris Lattner
4d2c4cb7a7 Use the default impl of DYNAMIC_STACKALLOC, allowing us to delete some code.
llvm-svn: 25334
2006-01-15 09:02:48 +00:00
Nate Begeman
85b2dc0c4e bswap implementation
llvm-svn: 25312
2006-01-14 03:14:10 +00:00
Chris Lattner
c615ed65ac implement stacksave/stackrestore on PPC
llvm-svn: 25277
2006-01-13 17:52:03 +00:00
Chris Lattner
80fed2d66e expand unsupported stacksave/stackrestore nodes
llvm-svn: 25272
2006-01-13 02:42:53 +00:00
Nate Begeman
cff96008ac Add bswap, rotl, and rotr nodes
Add dag combiner code to recognize rotl, rotr
Add ppc code to match rotl

Targets should add rotl/rotr patterns if they have them

llvm-svn: 25222
2006-01-11 21:21:00 +00:00
Chris Lattner
5a59c88c17 Fix calls that need to store values in stack slots, to not copy the stack
pointer.  This allows us to emit stuff like this:

        li r10, 0
        stw r10, 56(r1)
        or r3, r10, r10
        or r4, r10, r10
        or r5, r10, r10
        or r6, r10, r10
        or r7, r10, r10
        or r8, r10, r10
        or r9, r10, r10
        bl L_bar$stub

instead of this:

        or r2, r1, r1     ;; Extraneous copy.
        li r10, 0
        stw r10, 56(r2)
        or r3, r10, r10
        or r4, r10, r10
        or r5, r10, r10
        or r6, r10, r10
        or r7, r10, r10
        or r8, r10, r10
        or r9, r10, r10
        bl L_bar$stub

wowness.

llvm-svn: 25221
2006-01-11 19:55:07 +00:00
Chris Lattner
6b8fb2e9bc Dead FP arguments still use an incoming FP reg. This fixes
Regression/CodeGen/PowerPC/2006-01-11-darwin-fp-argument.ll, which was
distilled from a miscompilation in 252.eon.

llvm-svn: 25217
2006-01-11 18:21:25 +00:00
Chris Lattner
a59d6394d2 Give PPCISD:: nodes legible names in dumps.
llvm-svn: 25166
2006-01-09 23:52:17 +00:00
Chris Lattner
d583872b9e linkonce symbols have an extra indirection, just like weak ones do. This fixes
Prolangs-C++/family and Prolangs-C++/primes.

llvm-svn: 25119
2006-01-06 01:04:03 +00:00
Jim Laskey
41b3ee3c4f Had expand logic backward.
llvm-svn: 25105
2006-01-05 01:47:43 +00:00
Jim Laskey
5eddaee9f3 Added initial support for DEBUG_LABEL allowing debug specific labels to be
inserted in the code.

llvm-svn: 25104
2006-01-05 01:25:28 +00:00
Nate Begeman
e1fdcf5a20 Remove a fixme
llvm-svn: 25045
2005-12-30 00:11:07 +00:00
Nate Begeman
96c7e22231 Fix one of the things in the todo file, and get a bit closer to folding
constant offsets from statics into the address arithmetic.

llvm-svn: 24999
2005-12-24 01:00:15 +00:00
Chris Lattner
8b2bd265f4 make sure bit_converts are expanded
llvm-svn: 24978
2005-12-23 05:13:35 +00:00
Chris Lattner
3c4a3dd86e Simplify some code by using BIT_CONVERT
llvm-svn: 24974
2005-12-23 00:59:59 +00:00
Nate Begeman
a114534620 Pattern-match return. Includes gross hack!
llvm-svn: 24874
2005-12-20 00:26:01 +00:00
Nate Begeman
9c7dce88b5 Convert load/store over to being pattern matched
llvm-svn: 24871
2005-12-19 23:25:09 +00:00
Nate Begeman
a0e26b25f4 Add support for TargetConstantPool nodes to the dag isel emitter, and use
them in the PPC backend, to simplify some logic out of Select and
SelectAddr.

llvm-svn: 24657
2005-12-10 02:36:00 +00:00
Chris Lattner
68a0fed879 Use new PPC-specific nodes to represent shifts which require the 6-bit
amount handling that PPC provides.  These are generated by the lowering code
and prevents the dag combiner from assuming (rightfully) that the shifts
don't only look at 5 bits.  This fixes a miscompilation of crafty with
the new front-end.

llvm-svn: 24615
2005-12-06 02:10:38 +00:00
Chris Lattner
90a87cc2f1 Fix Regression/CodeGen/PowerPC/2005-11-30-vastart-crash.ll
llvm-svn: 24547
2005-11-30 20:40:54 +00:00
Nate Begeman
9a781caa20 Hook up one type, v4f32, to the VR RegisterClass for now.
llvm-svn: 24517
2005-11-29 08:17:20 +00:00
Chris Lattner
47feb1ecbb No targets support line number info yet.
llvm-svn: 24513
2005-11-29 06:16:21 +00:00
Chris Lattner
b6af6ea0d4 add an option to generate completely non-pic code, corresponding to what
gcc -static produces on PPC.  This is used for building kexts and other things.

With this, materializing the address of a global looks like:

        lis r2, ha16(L_H$non_lazy_ptr)
        la r3, lo16(L_H$non_lazy_ptr)(r2)

we're still emitting stubs for functions, which is wrong.  That is next.

llvm-svn: 24399
2005-11-17 18:55:48 +00:00
Chris Lattner
7666d8192c Fix a bug that resistor on IRC hit where we tried to create token factor
nodes of load results, not of their chain results.

llvm-svn: 24398
2005-11-17 18:30:17 +00:00
Chris Lattner
4581404290 Enable global address legalization, fixing a todo and allowing the removal
of some code.  This exposes the implicit load from the stubs to the DAG, allowing
them to be optimized by the dag combiner.  It also moves darwin specific stuff
out of the isel into the legalizer, and allows more to be moved to the .td file.

llvm-svn: 24397
2005-11-17 18:26:56 +00:00
Chris Lattner
c46c672eba Use the right accessor to create this node
llvm-svn: 24394
2005-11-17 17:51:38 +00:00
Chris Lattner
8d04987a39 Add an initial hack at legalizing GlobalAddress into the appropriate nodes
on Darwin to remove smarts from the isel.  This is currently disabled by
default (uncomment setOperationAction(ISD::GlobalAddress to enable it).
tblgen needs to become smarter about tglobaladdr nodes and bigger patterns
needed to be added to the .td file.  However, we can currently emit stuff like
this:  :)

        li r2, lo16(L_x$non_lazy_ptr)
        lis r3, ha16(L_x$non_lazy_ptr)
        lwzx r2, r3, r2

The obvious improvements will follow.

llvm-svn: 24390
2005-11-17 07:30:41 +00:00
Chris Lattner
7fdf96ed96 When lowering direct calls, lower them to use a targetglobaladress directly
instead of a globaladdress.  This has no effect on the generated code at all.

llvm-svn: 24386
2005-11-17 05:56:14 +00:00
Chris Lattner
355e7583ab Fix an assert compiling MallocBench/gs
llvm-svn: 24017
2005-10-26 18:01:11 +00:00
Nate Begeman
c3ab5792e9 Correctly Expand or Promote FP_TO_UINT based on the capabilities of the
machine.  This allows us to generate great code for i32 FP_TO_UINT now on
targets with 64 bit extensions.

llvm-svn: 23993
2005-10-25 23:48:36 +00:00
Chris Lattner
8a53051fb1 Expose the fextend on the DAG instead of doing it in the matcher
llvm-svn: 23986
2005-10-25 20:54:57 +00:00
Nate Begeman
6c42f509bc Invert the TargetLowering flag that controls divide by consant expansion.
Add a new flag to TargetLowering indicating if the target has really cheap
  signed division by powers of two, make ppc use it.  This will probably go
  away in the future.
Implement some more ISD::SDIV folds in the dag combiner
Remove now dead code in the x86 backend.

llvm-svn: 23853
2005-10-21 00:02:42 +00:00
Nate Begeman
dc1a2a1f19 Move the target constant divide optimization up into the dag combiner, so
that the nodes can be folded with other nodes, and we can not duplicate
code in every backend.  Alpha will probably want this too.

llvm-svn: 23835
2005-10-20 02:15:44 +00:00
Nate Begeman
ee581735d9 Add the ability to lower return instructions to TargetLowering. This
allows us to lower legal return types to something else, to meet ABI
requirements (such as that i64 be returned in two i32 regs on Darwin/ppc).

llvm-svn: 23802
2005-10-18 23:23:37 +00:00
Nate Begeman
5dbcab491a Do the right thing and enable 64 bit regs under the control of a subtarget
option.  Currently the only way to enable this is to specify the
64bitregs mattr flag.  It is never enabled by default on any config yet.

llvm-svn: 23779
2005-10-18 00:56:42 +00:00
Nate Begeman
b0e319a7c7 First bits of 64 bit PowerPC stuff, currently disabled. A lot of this is
purely mechanical.

llvm-svn: 23778
2005-10-18 00:28:58 +00:00
Nate Begeman
723637974b More PPC32 -> PPC changes, as well as merging some classes that were
redundant after the change.

llvm-svn: 23759
2005-10-16 05:39:50 +00:00
Chris Lattner
d3946bbea6 Rename PPC32*.h to PPC*.h
This completes the grand PPC file renaming

llvm-svn: 23745
2005-10-14 23:59:06 +00:00
Chris Lattner
f1c1042780 fix an f32/f64 type mismatch
llvm-svn: 23587
2005-10-02 06:37:13 +00:00
Chris Lattner
50411b1026 Modify the ppc backend to use two register classes for FP: F8RC and F4RC.
These are used to represent float and double values, and the two regclasses
contain the same physical registers.

llvm-svn: 23577
2005-10-01 01:35:02 +00:00
Chris Lattner
9a2fb006e4 Add FP versions of the binary operators, keeping the int and fp worlds seperate.
llvm-svn: 23506
2005-09-28 22:29:58 +00:00
Chris Lattner
4bc65cb445 Darwin, like many BSD systems, has a setjmp/longjmp which saves the signal mask
on setjmp calls and restores it on longjmp calls (both of which require syscalls).

This makes the calls REALLY slow.  Use _setjmp/_longjmp instead.  This speeds up
hexxagon from 120.31s to 15.68s: from 5.53x slower than GCC to 28% faster than GCC.

llvm-svn: 23482
2005-09-27 22:18:25 +00:00
Chris Lattner
16700b9beb Change the arg lowering code to use copyfromreg from vregs associated
with incoming arguments instead of the pregs themselves.  This fixes
the scheduler from causing problems by moving a copyfromreg for an argument
to after a select_cc node (now it can, and bad things won't happen).

llvm-svn: 23334
2005-09-13 19:33:40 +00:00
Chris Lattner
766369cf45 Remove some dead vectors
llvm-svn: 23329
2005-09-13 18:47:49 +00:00
Chris Lattner
00e9278551 PowerPC cannot truncstore i1 natively
llvm-svn: 23304
2005-09-10 00:21:06 +00:00
Nate Begeman
718cae4eba Implement i64<->fp using the fctidz/fcfid instructions on PowerPC when we
are allowed to generate 64-bit-only PowerPC instructions for 32 bit hosts,
such as the PowerPC 970.

This speeds up 189.lucas from 81.99 to 32.64 seconds.

llvm-svn: 23250
2005-09-06 22:03:27 +00:00
Chris Lattner
813a73e8e9 Decouple fsqrt from gpul optimizations, implementing fsqrt.ll.
Remove the -enable-gpopt option which is subsumed by feature flags.

llvm-svn: 23218
2005-09-02 18:33:05 +00:00