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Commit Graph

149802 Commits

Author SHA1 Message Date
Dmitry Mikulin
c325036358 Symbols re-defined with -wrap and -defsym need to be excluded from inter-
procedural optimizations to prevent dropping symbols and allow the linker
to process re-directs.

PR33145: --wrap doesn't work with lto.
Differential Revision: https://reviews.llvm.org/D33621

llvm-svn: 304719
2017-06-05 16:24:25 +00:00
Simon Pilgrim
e35a4adf2c [X86][AVX1] Split 256-bit vector non-temporal loads to keep it non-temporal (PR32744)
Differential Revision: https://reviews.llvm.org/D33728

llvm-svn: 304718
2017-06-05 16:02:01 +00:00
Simon Pilgrim
7dc03efc09 [X86][SSE] Non-temporal loads shouldn't be folded if it can be avoided (PR32743)
Differential Revision: https://reviews.llvm.org/D33728

llvm-svn: 304717
2017-06-05 15:43:03 +00:00
Dimitry Andric
60c0ba874d Remove duplicate LLVM_NATIVE_ from llvm's config.h
Summary:
Since LLVM_NATIVE_ARCH, LLVM_NATIVE_ASMPARSER, LLVM_NATIVE_ASMPRINTER,
LLVM_NATIVE_DISASSEMBLER, LLVM_NATIVE_TARGET, LLVM_NATIVE_TARGETINFO and
LLVM_NATIVE_TARGETMC are already defined in llvm-config.h, there seems
to be no reason to also define them in config.h.  Also, I can only find
usage of these macros in files that include llvm-config.h.

So let's remove the duplicated macros from config.h.

Reviewers: chandlerc, rnk, mehdi_amini, joerg

Reviewed By: rnk

Subscribers: chapuni, mgorny, llvm-commits

Differential Revision: https://reviews.llvm.org/D33881

llvm-svn: 304714
2017-06-05 13:52:31 +00:00
Diana Picus
e2fe92650f [ARM] GlobalISel: Constrain callee register on indirect calls
When lowering calls, we generate instructions with machine opcodes
rather than generic ones. Therefore, we need to constrain the register
classes of the operands.

Also enable the machine verifier on the arm-irtranslator.ll test, since
that would've caught this issue.

Fixes (part of) PR32146.

llvm-svn: 304712
2017-06-05 12:54:53 +00:00
whitequark
97186e1387 [LLVM-C] [OCaml] Expose Type::subtypes.
The C functions added are LLVMGetNumContainedTypes and
LLVMGetSubtypes.

The OCaml function added is Llvm.subtypes.

Patch by Ekaterina Vaartis.

Differential Revision: https://reviews.llvm.org/D33677

llvm-svn: 304709
2017-06-05 11:49:52 +00:00
Dimitry Andric
f1079f20ef Fix building DynamicLibrary.cpp with musl libc
Summary:
The workaround added in rL301240 for stderr/out/in symbols being both
macros and globals is only necessary for glibc, and it does not compile
with musl libc. Alpine Linux has had the following fix for it:

https://git.alpinelinux.org/cgit/aports/plain/main/llvm4/llvm-fix-DynamicLibrary-to-build-with-musl-libc.patch

Adapt the fix in our DynamicLibrary.inc for Unix.

Reviewers: marsupial, chandlerc, krytarowski

Reviewed By: krytarowski

Subscribers: srhines, krytarowski, llvm-commits

Differential Revision: https://reviews.llvm.org/D33883

llvm-svn: 304707
2017-06-05 11:22:18 +00:00
Javed Absar
01889a472a Move ARM specific test to ELF/ARM dir
Moving ARM specific test clang-section.s
from MC/ELF to MC/ELF/ARM
Buildbots reported failures on
commit  https://reviews.llvm.org/rL304705
Full details are available at:
 http://lab.llvm.org:8011/builders/llvm-clang-lld-x86_64-scei-ps4-windows10pro-fast/builds/10333

llvm-svn: 304706
2017-06-05 10:53:26 +00:00
Javed Absar
65d30b4ca5 Add support for #pragma clang section
This patch provides a means to specify section-names for global variables,
functions and static variables, using #pragma directives.
This feature is only defined to work sensibly for ELF targets.
One can specify section names as:
#pragma clang section bss="myBSS" data="myData" rodata="myRodata" text="myText"
One can "unspecify" a section name with empty string e.g.
#pragma clang section bss="" data="" text="" rodata=""

Reviewers: Roger Ferrer, Jonathan Roelofs, Reid Kleckner
Differential Revision: https://reviews.llvm.org/D33413

llvm-svn: 304704
2017-06-05 10:09:13 +00:00
Peter Smith
d984735422 [ARM] Support fixup for Thumb2 modified immediate
This change adds a new fixup fixup_t2_so_imm for the t2_so_imm_asmoperand
"T2SOImm". The fixup permits code such as:
.L1:
 sub r3, r3, #.L2 - .L1
.L2:
to assemble in Thumb2 as well as in ARM state.
    
The operand predicate isT2SOImm() explicitly doesn't match expressions
containing :upper16: and :lower16: as expressions with these operators
must match the movt and movw instructions.
    
The test mov r0, foo2 in thumb2-diagnostics is moved to a new file as the
fixup delays the error message till after the assembler has quit due to
the other errors.
    
As the mov instruction shares the t2_so_imm_asmoperand mov instructions
with a non constant expression now match t2MOVi rather than t2MOVi16 so the
error message is slightly different.
    
Fixes PR28647

Differential Revision: https://reviews.llvm.org/D33492

llvm-svn: 304702
2017-06-05 09:37:12 +00:00
Sven van Haastregt
548cbcc925 [InstCombine] Fix extractelement use before def
This fixes a bug that can cause extractelements with operands that
haven't been defined yet to be inserted at a wrong point when
optimising insertelements.

Patch by Karl Hylen.

Differential Revision: https://reviews.llvm.org/D33449

llvm-svn: 304701
2017-06-05 09:18:10 +00:00
Renato Golin
fa46653231 Revert "[sanitizer-coverage] one more flavor of coverage: -fsanitize-coverage=inline-8bit-counters. Experimental so far, not documenting yet."
This reverts commit r304630, as it broke ARM/AArch64 bots for 2 days.

llvm-svn: 304698
2017-06-05 07:35:52 +00:00
Stanislav Mekhanoshin
d07c48197f [AMDGPU] Fix SIFoldOperands crash with clamp
Fixes bug #33302. Pass did not account that Src1 of max instruction
can be an immediate.

Differential Revision: https://reviews.llvm.org/D33884

llvm-svn: 304696
2017-06-05 01:03:04 +00:00
Craig Topper
aaeb1c5b96 [ConstantRange] Add another truncate unittest for wrapped set staying a wrapped set.
llvm-svn: 304695
2017-06-04 23:07:53 +00:00
Craig Topper
3c3b867d31 [ConstantRange] Add a few more truncate unittests.
llvm-svn: 304694
2017-06-04 23:03:54 +00:00
Craig Topper
e3e4e5fe38 [ConstantRange] Add missing result check to the ConstantRange::truncate test.
llvm-svn: 304693
2017-06-04 23:03:52 +00:00
Craig Topper
993af3e942 [InstSimplify] Use llvm::all_of instead of a manual loop. NFC
llvm-svn: 304692
2017-06-04 22:41:56 +00:00
Peter Collingbourne
c3802e1e28 git-llvm: Update the project list for the llvm-project-20170507 monorepo.
llvm-svn: 304691
2017-06-04 22:18:57 +00:00
Peter Collingbourne
4d9d947bb9 IR: When creating a global variable, assert that its type is valid.
llvm-svn: 304690
2017-06-04 22:12:03 +00:00
Simon Pilgrim
64ad084e97 [X86][SSE] Change BUILD_VECTOR interleaving ordering to improve coalescing/combine opportunities
We currently generate BUILD_VECTOR as a tree of UNPCKL shuffles of the same type:

e.g. for v4f32:

Step 1: unpcklps 0, 2 ==> X: <?, ?, 2, 0>
      : unpcklps 1, 3 ==> Y: <?, ?, 3, 1>
Step 2: unpcklps X, Y ==>    <3, 2, 1, 0>

The issue is because we are not placing sequential vector elements together early enough, we fail to recognise many combinable patterns - consecutive scalar loads, extractions etc.

Instead, this patch unpacks progressively larger sequential vector elements together:

e.g. for v4f32:

Step 1: unpcklps 0, 2 ==> X: <?, ?, 1, 0>
      : unpcklps 1, 3 ==> Y: <?, ?, 3, 2>
Step 2: unpcklpd X, Y ==>    <3, 2, 1, 0>

This does mean that we are creating UNPCKL shuffle of different value types, but the relevant combines that benefit from this are quite capable of handling the additional BITCASTs that are now included in the shuffle tree.

Differential Revision: https://reviews.llvm.org/D33864

llvm-svn: 304688
2017-06-04 20:12:04 +00:00
Ayal Zaks
89dc822b95 [LV] Make scalarizeInstruction() non-virtual. NFC.
Following the request made in https://reviews.llvm.org/D32871,
scalarizeInstruction() which is no longer overridden by InnerLoopUnroller is
hereby made non-virtual in InnerLoopVectorizer.

Should have been part of r297580 originally.

llvm-svn: 304685
2017-06-04 13:29:51 +00:00
Igor Breger
49b92b3bc4 [GlobalISel][X86] merge irtranslator-call test files. NFC
llvm-svn: 304683
2017-06-04 12:41:10 +00:00
Craig Topper
f19a3f315a [X86] Replace 'REQUIRES: x86' in tests with 'REQUIRES: x86-registered-target' which seems to be the correct way to make them run on an x86 build.
llvm-svn: 304682
2017-06-04 08:21:58 +00:00
Craig Topper
2921e79dff [ConstantFolding] Combine an if statement into an earlier one that checked the same condition. NFC
llvm-svn: 304681
2017-06-04 08:21:53 +00:00
Craig Topper
6a8b634f79 [ConstantFolding][X86] Replace an LLVM_FALLTHROUGH with a break because it really shouldn't fallthrough.
This is actually NFC because the next case starts with the same if statement as this case did. So the result will be the same and it will fallthrough to the end of the switch. But there's no reason to rely on that so we should just break.

llvm-svn: 304680
2017-06-04 08:21:51 +00:00
Craig Topper
7d635c7573 [ConstantFolding] Properly support constant folding of vector powi intrinsic. The second argument is not a vector so needs special treatment.
llvm-svn: 304679
2017-06-04 07:30:28 +00:00
Craig Topper
0bac98663e [InstSimplify] Add test case demonstrating that we fail to constant fold vector llvm.powi intrinsics due to the second argument not being a vector.
llvm-svn: 304678
2017-06-04 07:30:23 +00:00
Galina Kistanova
e444e30740 Fixed warning: must specify at least one argument for '...' parameter.
llvm-svn: 304677
2017-06-04 05:31:03 +00:00
Galina Kistanova
83cdf8c446 Fixed warning: must specify at least one argument for '...' parameter.
llvm-svn: 304676
2017-06-04 05:30:26 +00:00
David Blaikie
29b3c9797d Make the Twine pretty-printer work with GDB 7.11
Apparently ::NodeKind is sometimes part of the name in GDB.
Without this patch I get the following error message from GDB:
`Unhandled NodeKind llvm::Twine::NodeKind::EmptyKind`.

Patch by Alexander Richardson!

Differential Revision: https://reviews.llvm.org/D32795

llvm-svn: 304675
2017-06-04 03:27:12 +00:00
Davide Italiano
667c5c6a07 [PM] Add GVNSink to the pipeline.
With this, the two pipelines should be in sync again (modulo
LoopUnswitch, but Chandler is actively working on that).

Differential Revision:  https://reviews.llvm.org/D33810

llvm-svn: 304671
2017-06-03 23:18:29 +00:00
Saleem Abdulrasool
0fd127b2fb ADT: handle special case of ARM environment for SUSE
SUSE treats "gnueabi" as "gnueabihf" so make sure that we normalise the
environment.

llvm-svn: 304670
2017-06-03 22:31:06 +00:00
Craig Topper
076ba7a503 [InstCombine] Add support for simplifying ctlz/cttz intrinsics based on known bits.
llvm-svn: 304669
2017-06-03 18:50:32 +00:00
Craig Topper
e9a9480241 [ConstantFolding] Fix constant folding for vector cttz and ctlz intrinsics to understand that the second argument is still a scalar.
llvm-svn: 304668
2017-06-03 18:50:29 +00:00
Craig Topper
c04a5f29d7 [InstCombine][InstSimplify] Add various tests for ctlz/cttz with vectors, some showing missed optimizations. NFC
llvm-svn: 304667
2017-06-03 18:50:26 +00:00
Craig Topper
6a3d34d76b [InstCombine] Use cttz instead of ctlz in the cttz_cmp_vec test case. Looks like a copy paste mistake.
llvm-svn: 304666
2017-06-03 18:50:23 +00:00
Stanislav Mekhanoshin
9cf9511d2e [AMDGPU] Untangle SDWA pass from SIShrinkInstructions
Remove dependency of SDWA pass on SIShrinkInstructions.
The goal is to move SDWA even higher in the stack to avoid second run
of MachineLICM, MachineCSE and SIFoldOperands.

Also added handling to preserve original src modifiers.

Differential Revision: https://reviews.llvm.org/D33860

llvm-svn: 304665
2017-06-03 17:39:47 +00:00
Amaury Sechet
c748080d06 Regenerate expectations for trunc-to-bool.ll . NFC
llvm-svn: 304660
2017-06-03 11:35:40 +00:00
Simon Pilgrim
f7940ffd09 [X86][SSE] Add SCALAR_TO_VECTOR(PEXTRW/PEXTRB) support to faux shuffle combining
Generalized existing SCALAR_TO_VECTOR(EXTRACT_VECTOR_ELT) code to support AssertZext + PEXTRW/PEXTRB cases as well. 

llvm-svn: 304659
2017-06-03 11:12:57 +00:00
Craig Topper
77a369fa0f [LazyValueInfo] Use Type::getIntegerBitWidth instead of casting to IntegerType to call getBitWidth. NFC
llvm-svn: 304656
2017-06-03 07:47:14 +00:00
Craig Topper
d567b805d3 [LazyValueInfo] Make solveBlockValueCast take a CastInst* instead of Instruction*. Makes getOpcode return the appropriate enum without a cast. NFC
llvm-svn: 304655
2017-06-03 07:47:08 +00:00
Galina Kistanova
11c27097d4 Initialized BackedgeTakenInfo.MaxOrZero.
llvm-svn: 304639
2017-06-03 05:21:08 +00:00
Galina Kistanova
bc3843ec33 Added LLVM_FALLTHROUGH to address warning: this statement may fall through. NFC.
llvm-svn: 304638
2017-06-03 05:19:32 +00:00
Galina Kistanova
0ef97c9413 Added LLVM_FALLTHROUGH to address warning: this statement may fall through. NFC.
llvm-svn: 304637
2017-06-03 05:19:10 +00:00
Galina Kistanova
870ed0ecd4 Added LLVM_FALLTHROUGH to address warning: this statement may fall through. NFC.
llvm-svn: 304636
2017-06-03 05:18:46 +00:00
Galina Kistanova
42706ac2e8 Added LLVM_FALLTHROUGH to address warning: this statement may fall through. NFC.
llvm-svn: 304635
2017-06-03 05:11:14 +00:00
Sam Clegg
d176929cc9 [WebAssembly] Refactor WasmObjectWriter::writeObject
The size of this function was getting a little out of.
control.  Split code for writing each section type into
seperate functions.

Differential Revision: https://reviews.llvm.org/D33792

llvm-svn: 304634
2017-06-03 02:01:24 +00:00
Kostya Serebryany
ce5e31aa21 [sanitizer-coverage] one more flavor of coverage: -fsanitize-coverage=inline-8bit-counters. Experimental so far, not documenting yet.
llvm-svn: 304630
2017-06-03 01:35:47 +00:00
Tom Stellard
6a773e4535 AMDGPU/GlobalISel: Mark 1-bit integer constants as legal
Summary:
These are mostly legal, but will probably need special lowering for some
cases.

Reviewers: arsenm

Reviewed By: arsenm

Subscribers: kzhuravl, wdng, nhaehnle, yaxunl, rovka, kristof.beyls, igorb, dstuttard, tpr, llvm-commits, t-tye

Differential Revision: https://reviews.llvm.org/D33791

llvm-svn: 304628
2017-06-03 01:13:33 +00:00
Eugene Zelenko
df0fc08844 [CodeGen] Fix Windows builds which treat warnings as errors, broken in r304621.
llvm-svn: 304627
2017-06-03 01:04:06 +00:00