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54 Commits

Author SHA1 Message Date
Chris Lattner
c5dbaceaee simplify the code a bit 
llvm-svn: 23728
 2005-10-14 05:08:37 +00:00
Chris Lattner
d83bbd0f14 Add basic support for recognizing a new SDTCisOpSmallerThanOp type constraint 
llvm-svn: 23725
 2005-10-14 04:53:53 +00:00
Chris Lattner
81047cdfc0 Implement a couple of new (important) features. 
1. If an operation has to be int or fp and the target only supports one
   int or fp type, relize that the op has to have that type.
2. If a target has operations on multiple types, do not emit matching code
   for patterns involving those operators, since we do not emit the code to
   check for them yet.  This prevents PPC from generating FP ops currently.

Also move some code around into more logical places.

llvm-svn: 23724
 2005-10-14 04:11:13 +00:00
Chris Lattner
10a8d57590 Teach tablegen to reassociate operators when possible. This allows it to 
find all of teh pattern matches for EQV from one definition

llvm-svn: 23529
 2005-09-29 22:36:54 +00:00
Chris Lattner
31a9d318a3 Teach tblgen to build permutations of instructions, so that the target author 
doesn't have to specify them manually.  It currently handles associativity,
e.g. knowing that (X*Y)+Z  also matches  X+(Y*Z)  and will be extended in
the future.

It is smart enough to not introduce duplicate patterns or patterns that can
never match.

llvm-svn: 23526
 2005-09-29 19:28:10 +00:00
Chris Lattner
86a339dc34 add support for an associative marker 
llvm-svn: 23502
 2005-09-28 20:58:06 +00:00
Chris Lattner
0231f57a46 Emit an error if instructions or patterns are defined but can never match. 
Currently we check that immediate values live on the RHS of commutative
operators.  Defining ORI like this, for example:

def ORI   : DForm_4<24, (ops GPRC:$dst, GPRC:$src1, u16imm:$src2),
                    "ori $dst, $src1, $src2",
                    [(set GPRC:$dst, (or immZExt16:$src2, GPRC:$src1))]>;

results in:

tblgen: In ORI: Instruction can never match: Immediate values must be on the RHS of commutative operators!
llvm-svn: 23501
 2005-09-28 19:27:25 +00:00
Chris Lattner
18ccb532b5 collect commutativity information 
llvm-svn: 23499
 2005-09-28 18:28:29 +00:00
Chris Lattner
5dae8ab260 Prefer cheaper patterns to more expensive ones. Print the costs to the generated 
file

llvm-svn: 23492
 2005-09-28 17:57:56 +00:00
Chris Lattner
eeead91a84 Select Constant nodes to TargetConstant nodes 
llvm-svn: 23488
 2005-09-28 16:58:06 +00:00
Chris Lattner
cdeed56e4e memoize the assert results 
llvm-svn: 23457
 2005-09-26 22:10:24 +00:00
Chris Lattner
5c061685a2 Emit the switch stmt cases in alphabetical order instead of pointer order, 
which is not stable.

llvm-svn: 23456
 2005-09-26 21:59:35 +00:00
Chris Lattner
ad79bd3f47 implement a fixme: only select values once, even if used multiple times. 
llvm-svn: 23454
 2005-09-26 21:53:26 +00:00
Jeff Cohen
a5c4ff5a96 Fix VC++ build errors. 
llvm-svn: 23431
 2005-09-25 19:04:43 +00:00
Chris Lattner
fc89cbf740 memoize translations 
llvm-svn: 23419
 2005-09-24 00:50:51 +00:00
Chris Lattner
9e2188cf4e Teach the DAG isel generator to emit code that creates nodes. 
Fix a few corner cases parsing things like (i32 imm:$foo)

llvm-svn: 23417
 2005-09-24 00:40:24 +00:00
Chris Lattner
7c7fbdc7e1 Emit better code (no more copies for var references), and support DAG patterns 
(e.g. things like rotates).

llvm-svn: 23416
 2005-09-23 23:16:51 +00:00
Chris Lattner
8c19aa13c8 Fix a fixme by passing around SDOperand's instead of SDNode*'s 
llvm-svn: 23415
 2005-09-23 21:53:45 +00:00
Chris Lattner
6c5dfefcb3 Emit code that matches the incoming DAG pattern and checks predicates. 
This does not check that types match yet, but PPC only has one integer type
;-).

This also doesn't have the code to build the resultant dag.

llvm-svn: 23414
 2005-09-23 21:33:23 +00:00
Chris Lattner
9949ef9748 emit information about the order patterns are to be matched. 
llvm-svn: 23413
 2005-09-23 20:52:47 +00:00
Chris Lattner
d9b4002bac start filling in the switch stmt 
llvm-svn: 23412
 2005-09-23 19:36:15 +00:00
Chris Lattner
2e3569b604 Fix a minor bug, add comments 
llvm-svn: 23370
 2005-09-16 00:29:46 +00:00
Chris Lattner
4c1ec1c784 teach the type inference code how to infer types for instructions and node 
xforms.  Run type inference on result patterns, so we always have fully typed
results (and to catch errors in .td files).

llvm-svn: 23369
 2005-09-15 22:23:50 +00:00
Chris Lattner
07b63eafa1 put instructions into a map instead of a vector for quick lookup 
llvm-svn: 23368
 2005-09-15 21:57:35 +00:00
Chris Lattner
335614b54a when parsing instructions remember information about the types taken and 
returned.

llvm-svn: 23367
 2005-09-15 21:51:12 +00:00
Chris Lattner
66c08682d9 Start parsing "Pattern" nodes 
llvm-svn: 23365
 2005-09-15 21:42:00 +00:00
Chris Lattner
fe7a70834b rename a couple of methods, add structure for pattern parsing 
llvm-svn: 23364
 2005-09-15 02:38:02 +00:00
Chris Lattner
ab6886a31d Verify that xform functions only occur in logical places 
llvm-svn: 23363
 2005-09-14 23:05:13 +00:00
Chris Lattner
6f94c802a2 Promote xform fns to be explicit nodes in result patterns, and clean off 
predicates since they will have already matched at this point.

llvm-svn: 23362
 2005-09-14 23:01:59 +00:00
Chris Lattner
57cae81b5e start building the instruction dest pattern correctly. Change the xform 
functions to preserve the Record for the xform instead of making it into a
function name.

llvm-svn: 23361
 2005-09-14 22:55:26 +00:00
Chris Lattner
a6a0d51065 catch unnamed inputs 
llvm-svn: 23360
 2005-09-14 22:06:36 +00:00
Chris Lattner
f749a0ef7c check that there are no unexpected operands 
llvm-svn: 23359
 2005-09-14 21:59:34 +00:00
Chris Lattner
9c196b02fa force all instruction operands to be named. 
llvm-svn: 23358
 2005-09-14 21:13:50 +00:00
Chris Lattner
3cbcb9f5d6 fix a broke range check 
llvm-svn: 23354
 2005-09-14 21:04:12 +00:00
Chris Lattner
a5ba887c02 Parse significantly more of the instruction pattern, now collecting and 
verifying information about the operands.

llvm-svn: 23353
 2005-09-14 20:53:42 +00:00
Chris Lattner
901ddab7b1 Verify that set destinations occur first in the instruction operand list. 
llvm-svn: 23351
 2005-09-14 18:19:25 +00:00
Chris Lattner
72cfebc71b remove some code that isn't ready for prime time 
llvm-svn: 23346
 2005-09-14 06:03:10 +00:00
Chris Lattner
c4ae94aa32 Switch to a slightly more structured representation for instructions 
llvm-svn: 23345
 2005-09-14 04:03:16 +00:00
Chris Lattner
77cc161bd5 Add some more checking/verification code 
llvm-svn: 23344
 2005-09-14 02:11:12 +00:00
Chris Lattner
9ab561788e start parsing instructions into patterns, start doing many more checks of 
'set's.

llvm-svn: 23343
 2005-09-14 00:09:24 +00:00
Chris Lattner
e2591652a2 don't emit the namespace inside the class! 
llvm-svn: 23341
 2005-09-13 22:05:02 +00:00
Chris Lattner
1da656efd4 Emit code suitable for emission into the ISel class, allowing us to use/define 
methods.

llvm-svn: 23340
 2005-09-13 22:03:37 +00:00
Chris Lattner
9bb7fff501 continue xform function parsing 
llvm-svn: 23338
 2005-09-13 21:59:15 +00:00
Chris Lattner
abc740453c Start parsing node transformation information 
llvm-svn: 23337
 2005-09-13 21:51:00 +00:00
Chris Lattner
4e59482982 completely eliminate TreePattern::PatternType 
llvm-svn: 23335
 2005-09-13 21:20:49 +00:00
Chris Lattner
ada7ac14a1 add an accessor to provide more checking 
llvm-svn: 23289
 2005-09-09 01:15:01 +00:00
Chris Lattner
2490f8f606 use new accessors to simplify code. Add checking to make sure top-level instr 
definitions are void

llvm-svn: 23288
 2005-09-09 01:11:44 +00:00
Chris Lattner
334e21eb98 Fix incorrect comment 
llvm-svn: 23285
 2005-09-08 23:26:30 +00:00
Chris Lattner
a6d21c974c Implement a complete type inference system for dag patterns, based on the 
constraints defined in the DAG node definitions in the .td files.  This
allows us to infer (and check!) the types for all nodes in the current
ppc .td file.  For example, instead of:

Inst pattern EQV:       (set GPRC:i32:$rT, (xor (xor GPRC:i32:$rA, GPRC:i32:$rB), (imm)<<Predicate_immAllOnes>>))

we now fully infer:

Inst pattern EQV:       (set:void GPRC:i32:$rT, (xor:i32 (xor:i32 GPRC:i32:$rA, GPRC:i32:$rB), (imm:i32)<<Predicate_immAllOnes>>))

from:  (set GPRC:$rT, (not (xor GPRC:$rA, GPRC:$rB)))
llvm-svn: 23284
 2005-09-08 23:22:48 +00:00
Chris Lattner
152a72de2c Parse information about type constraints on SDNodes 
llvm-svn: 23281
 2005-09-08 21:27:15 +00:00