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Commit Graph

124370 Commits

Author SHA1 Message Date
Craig Topper
9208a75ae2 [TableGen] Sort pattern predicates before concatenating into a string so that different orders of the same set will produce the same string. This can reduce the number of unique predicates in the isel tables. NFC
llvm-svn: 254192
2015-11-27 05:44:04 +00:00
Craig Topper
c5257f522e [X86] Pair a NoVLX with HasAVX512 to match the others and remove a unique predicate check in the isel tables. NFC
llvm-svn: 254191
2015-11-27 05:44:02 +00:00
Andrew Wilkins
347f2e2a7d test: bail early if tool_path is None
tool_path will be None for llvm-go if Go cannot be found

llvm-svn: 254190
2015-11-27 05:07:26 +00:00
Andrew Wilkins
2b1a596cbb test: check if go_executable is set
llvm-svn: 254189
2015-11-27 04:51:13 +00:00
Andrew Wilkins
c2e95e3f71 Use $GO_EXECUTABLE in Go-based lit tests
Summary:
When running tests, pass the GO_EXECUTABLE CMake
cache variable to llvm-go. The "go" binary may
not be in $PATH, or may be different to the one
passed to CMake.

Reviewers: pcc

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D14041

llvm-svn: 254187
2015-11-27 04:44:51 +00:00
Rafael Espindola
b078a10e4d Test both input file orders.
llvm-svn: 254186
2015-11-27 03:50:34 +00:00
Rafael Espindola
f464f09124 Add missing file.
llvm-svn: 254185
2015-11-27 03:47:29 +00:00
Rafael Espindola
7feb960b9e Make the test a bit more interesting.
It now covers a regular function replacing an available_externally one.

llvm-svn: 254184
2015-11-27 02:07:37 +00:00
Peter Collingbourne
fa04d73f02 MC: Simplify handling of temporary symbols in COFF writer.
The COFF object writer was previously adding unnecessary symbols to its
temporary data structures and cleaning them up later. This made the code
harder to understand and caused a bug (aliases classed as temporary symbols
would cause an assertion failure). A much simpler way of handling such
symbols is to ask the layout for their section-relative position when needed.

Tested with a bootstrap on Windows and by building Chrome.

Differential Revision: http://reviews.llvm.org/D14975

llvm-svn: 254183
2015-11-26 23:29:27 +00:00
Simon Pilgrim
d773601576 [X86][FMA] Begun adding AVX512 FMA tests
As discussed on D14909

llvm-svn: 254180
2015-11-26 20:53:28 +00:00
Charlie Turner
18cf3a8580 [LoopVectorize] Use MapVector rather than DenseMap for MinBWs.
The order in which instructions are truncated in truncateToMinimalBitwidths
effects code generation. Switch to a map with a determinisic order, since the
iteration order over a DenseMap is not defined.

This code is not hot, so the difference in container performance isn't
interesting.

Many thanks to David Blaikie for making me aware of MapVector!

Fixes PR25490.

Differential Revision: http://reviews.llvm.org/D14981

llvm-svn: 254179
2015-11-26 20:39:51 +00:00
Craig Topper
c259757ddf [X86] Now that X86VPermt2 is used in all the avx512_perm_t_sizes just hardcode it into the patterns instead of passing as an argument. NFC
llvm-svn: 254177
2015-11-26 20:21:29 +00:00
Craig Topper
f284e70884 [X86] Merge X86VPermt2Fp and X86VPermt2Int back together by weakening them just enough. The SDTCisSameSizeAs introduced in r254138 helps here.
llvm-svn: 254176
2015-11-26 20:02:01 +00:00
Rafael Espindola
0ba5a45ed3 Add a few passing lto tests.
I found these while trying to get a prototype to bootstrap.

They cover things like
* Handling of non linker visible stuff (append, available_externally)
* Type merging
* Alias to dropped globals
* Dropping linkage when converting to a declaration.

These should hopefully be generally useful for anyone refactoring the
plugin.

llvm-svn: 254174
2015-11-26 19:53:12 +00:00
Craig Topper
852ecf7fb6 [X86] Split ISD node for Vfpclass and Vfpclasss so that we can write strong type constraints for each that don't cause ambiguous isel.
llvm-svn: 254172
2015-11-26 19:41:34 +00:00
Hal Finkel
2deea83231 [bugpoint] Fix "Alias must point to a definition" problems
GlobalAliases may reference function definitions, but not function declarations.

bugpoint would sometimes create invalid IR by deleting a function's body (thus
mutating a function definition into a declaration) without first 'fixing' any
GlobalAliases that reference that function definition.

This change iteratively prevents that issue. Before deleting a function's body,
it scans the module for GlobalAliases which reference that function. When
found, it eliminates them using replaceAllUsesWith.

Fixes PR20788.

Patch by Nick Johnson!

llvm-svn: 254171
2015-11-26 19:23:49 +00:00
Rafael Espindola
d215bba299 Disallow aliases to available_externally.
They are as much trouble as aliases to declarations. They are requiring
the code generator to define a symbol with the same value as another
symbol, but the second symbol is undefined.

If representing this is important for some optimization, we could add
support for available_externally aliases. They would be *required* to
point to a declaration (or available_externally definition).

llvm-svn: 254170
2015-11-26 19:22:59 +00:00
Craig Topper
124c7bacb0 [X86] Revert part of r254167 to recover bots.
llvm-svn: 254169
2015-11-26 19:13:05 +00:00
Krzysztof Parzyszek
348156207f [Hexagon] Lowering of V60/HVX vector types
llvm-svn: 254168
2015-11-26 18:38:27 +00:00
Craig Topper
1097efc7d8 [X86] Strengthen more type constraints to reduce isel table size.
llvm-svn: 254167
2015-11-26 18:31:19 +00:00
Krzysztof Parzyszek
f494c1982c [Hexagon] Hexagon V60 HVX intrinsic defintions
Author: Ron Lieberman <ronl@codeaurora.org>
llvm-svn: 254165
2015-11-26 16:54:33 +00:00
Daniel Sanders
556791680d [mips][ias] Range check uimm5 operands and fix several bugs this revealed.
Summary:
The bugs were:
* append, prepend, and balign were not tested
* balign takes a uimm2 not a uimm5.
* drotr32 was correctly implemented with a uimm5 but the tests expected
  '52' to be valid.
* li/la were implemented with a uimm5 instead of simm32. simm32 isn't
  completely correct either but I'll fix that when I get to simm32.

A notable omission are some of the shift instructions. Several of these
have been implemented using a single uimm6 instruction (rather than two
uimm5 instructions and a CodeGen-only uimm6 pseudo). These will be updated
in the uimm6 patch.

Reviewers: vkalintiris

Subscribers: llvm-commits, dsanders

Differential Revision: http://reviews.llvm.org/D14712

llvm-svn: 254164
2015-11-26 16:35:41 +00:00
Oliver Stannard
f6e457aa6c [AArch64] Add ARMv8.2-A new AT instruction variants
ARMv8.2-A adds new variants of the "at" (address translate) system
instruction, which take the PSTATE.PAN bit (added in ARMv8.1-A). These
are a required part of ARMv8.2-A, so no additional subtarget features
are required.

Differential Revision: http://reviews.llvm.org/D15018

llvm-svn: 254159
2015-11-26 15:34:44 +00:00
Martell Malone
06b21a5c93 ARM: address WOA unsigned division overflow crash
Building on r253865 the crash is not limited to signed overflows.

Disable custom handling of unsigned 32-bit and 64-bit integer divide.
Add test cases for both 32-bit and 64-bit unsigned integer overflow.

llvm-svn: 254158
2015-11-26 15:34:03 +00:00
Oliver Stannard
1b5e161992 [AArch64] Add ARMv8.2-A UAO PSTATE bit
ARMv8.2-A adds a new PSTATE bit, PSTATE.UAO, which allows the LDTR/STTR
instructions to behave the same as LDR/STR with respect to execute-only
pages at higher privilege levels. New variants of the MSR/MRS
instructions are added to allow reading and writing this bit. It is a
required part of ARMv8.2-A, so no additional subtarget features are
required.

Differential Revision: http://reviews.llvm.org/D15020

llvm-svn: 254157
2015-11-26 15:32:30 +00:00
Oliver Stannard
ddf7a3c1a5 [AArch64] Add ARMv8.2-A persistent memory instruction
ARMv8.2-A adds the "dc cvap" instruction, which is a system instruction
that cleans caches to the point of persistence (for systems that have
persistent memory). It is a required part of ARMv8.2-A, so no additional
subtarget features are required.

Differential Revision: http://reviews.llvm.org/D15016

llvm-svn: 254156
2015-11-26 15:28:47 +00:00
Oliver Stannard
3708d85580 [AArch64] Add ARMv8.2-A ID_A64MMFR2_EL1 register
ARMv8.2-A adds a new ID register, ID_A64MMFR2_EL1, which behaves in the
same way as ID_A64MMFR0_EL1 and ID_A64MMFR1_EL1. It is a required part
of ARMv8.2-A, so no additional subtarget features are required.

Differential Revision: http://reviews.llvm.org/D15017

llvm-svn: 254155
2015-11-26 15:26:10 +00:00
Oliver Stannard
55e6d9804d [AArch64] Add subtarget features for ARMv8.2-A
This adds subtarget features for ARMv8.2-A, which builds on (and
requires the features from) ARMv8.1-A. Most assembler-visible features
of ARMv8.2-A are system instructions, and are all required parts of the
architecture, so just depend on the HasV8_2aOps subtarget feature. There
is also one large, optional feature, which adds 16-bit floating point
versions of all existing floating-point instructions (VFP and SIMD),
this is represented by the FeatureFullFP16 subtarget feature.

Differential Revision: http://reviews.llvm.org/D15013

llvm-svn: 254154
2015-11-26 15:23:32 +00:00
Daniel Sanders
3d387c31ad [mips][ias] Explicitly disable IAS on tests that depend on not assembling.
Summary:
no-odd-spreg-msa.ll: This test deliberately uses an odd-numbered register
in inline assembly and expects the compiler to insert a move to an
even-numbered register.

inlineasm-operand-code.ll and inlineasm_constraint.ll:
Checks for IAS's output will be added once a matcher bug is resolved. This bug
causes the canonical output emitted by IAS to be incorrect for uimm16 constants
with the MSB set. We will still need the non-IAS checks at this point since
these tests primarily test formatting of operands.

Reviewers: vkalintiris

Subscribers: dsanders, llvm-commits

Differential Revision: http://reviews.llvm.org/D14705

llvm-svn: 254148
2015-11-26 11:23:03 +00:00
Daniel Sanders
c87c525492 [mips][ias] Replace anchor comments with anchor instructions in tests.
Summary:
This is because IAS will delete the comments. NFC at the moment but it will
prevent a failure once IAS is the default.

Reviewers: vkalintiris

Subscribers: llvm-commits, dsanders

Differential Revision: http://reviews.llvm.org/D14704

llvm-svn: 254147
2015-11-26 10:26:18 +00:00
Benjamin Kramer
a5c875d940 [SimplifyLibCalls] Don't depend on a called function having a name, it might be an indirect call.
Fixes the crasher in PR25651 and related crashers using the same pattern.

llvm-svn: 254145
2015-11-26 09:51:17 +00:00
Craig Topper
c2df151fcb [X86] Strengthen more type constraints to reduce isel table size.
llvm-svn: 254142
2015-11-26 07:58:20 +00:00
Vyacheslav Klochkov
fdc2e9e5ae X86-FMA3: Improved/enabled the memory folding optimization for scalar loads
generated for _mm_losd_s{s,d}() intrinsics and used in scalar FMAs generated 
for FMA intrinsics _mm_f{madd,msub,nmadd,nmsub}_s{s,d}().

Reviewer: David Kreitzer
Differential Revision: http://reviews.llvm.org/D14762

llvm-svn: 254140
2015-11-26 07:45:30 +00:00
Craig Topper
898fe9897b [X86] Strengthen the type constraints on X86psadbw and X86dbpsadbw to reduce some of the type checks in the isel matching tables.
llvm-svn: 254139
2015-11-26 07:02:21 +00:00
Craig Topper
e404cbe233 [SelectionDAG] Add a SDTCisSameSizeAs type constraint that can be used to ensure vector widths match even if the element size and count don't.
llvm-svn: 254138
2015-11-26 07:02:18 +00:00
Craig Topper
4b764921f1 Add type constraints to masked_load/masked_store to ensure the mask vector has the same number of elements as the other vectors.
llvm-svn: 254137
2015-11-26 06:30:42 +00:00
Craig Topper
5be4caf2ff [TableGen] Flip reversed comments.
llvm-svn: 254136
2015-11-26 06:30:40 +00:00
Krzysztof Parzyszek
128795bb47 [Hexagon] HVX vector register classes and more isel patterns
llvm-svn: 254132
2015-11-26 04:33:11 +00:00
Tom Stellard
814127be3e AMDGPU: Fix typo
llvm-svn: 254120
2015-11-26 02:04:11 +00:00
Sanjoy Das
99ca015392 [OperandBundles] Treat "deopt" operand bundles specially
Teach LLVM optimize to more precisely in the presence of "deopt" operand
bundles.  "deopt" operand bundles imply that the call they're attached
to is at least `readonly` (i.e. they don't imply clobber semantics), and
they don't capture their bundle operands.

llvm-svn: 254118
2015-11-26 01:16:05 +00:00
Tom Stellard
eb7e999b29 AMDGPU: Add llvm.amdgcn.dispatch.ptr intrinsic
Summary:
This returns a pointer to the dispatch packet, which can be used to load
information about the kernel dispach.

Reviewers: arsenm

Subscribers: arsenm, llvm-commits

Differential Revision: http://reviews.llvm.org/D14898

llvm-svn: 254116
2015-11-26 00:43:29 +00:00
Kostya Serebryany
ce3a0cbd06 [libFuzzer] clean up the docs, add one more link
llvm-svn: 254115
2015-11-26 00:12:57 +00:00
Xinliang David Li
df875576b5 Fix a typo introduced in previous patches
llvm-svn: 254112
2015-11-26 00:02:23 +00:00
Xinliang David Li
739b63a55d [PGO] Implement ValueProfiling Closure interfaces for runtime value profile data
This is one of the many steps to commonize value profiling support between profile
runtime and compiler/llvm tools.

After this change, profiler runtime now can share the same C APIs to do VP
serialization/deseriazation with LLVM host tools (and produces value data
in identical format between indexed and raw profile).

It is not yet enabled in profiler runtime yet.

Also added a unit test case to test runtime profile data serialization/deserialization
interfaces implemented using common closure code.

llvm-svn: 254110
2015-11-25 23:31:18 +00:00
Evgeniy Stepanov
ef8f40a43e [safestack] Fix alignment of dynamic allocas.
Fixes PR25588.

llvm-svn: 254109
2015-11-25 22:52:30 +00:00
Richard Diamond
3e341c0824 Fix a use-after-free in llvm-config.
Summary:
This could happen if `GetComponentNames` is true, because `Name` from
`VisitComponent` would reference a stack instance of `std::string` in
`ComputeLibsForComponents`.

Reviewers: beanz

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D14913

llvm-svn: 254108
2015-11-25 22:49:48 +00:00
Dan Gohman
7bce5ba9d5 [WebAssembly] Fix inline asm support for i64 operands.
llvm-svn: 254106
2015-11-25 22:28:50 +00:00
Dan Gohman
67019b71a2 [WebAssembly] Fold setne and seteq comparisons into selects.
llvm-svn: 254104
2015-11-25 22:13:48 +00:00
Kostya Serebryany
4b6eeeca4b [libFuzzer] add a flag -exact_artifact_path
llvm-svn: 254100
2015-11-25 21:40:46 +00:00
Krzysztof Parzyszek
7903507e90 [Hexagon] Treat transfers of FP immediates are pseudo instructions
This is a temporary fix to address ICE on 2005-10-21-longlonggtu.ll.
The proper fix will be to use A2_tfrsi, but it will need more work to
teach all users of A2_tfrsi to also expect a floating-point operand.

llvm-svn: 254099
2015-11-25 21:40:03 +00:00