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82,236 Commits 4 Branches 5 Tags 704 MiB
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6 Commits

Author SHA1 Message Date
Craig Topper
b1f171a213 Reorder includes in Target backends to following coding standards. Remove some superfluous forward declarations. 
llvm-svn: 152997
 2012-03-17 18:46:09 +00:00
Craig Topper
a95d527c6a Convert more GenRegisterInfo tables from unsigned to uint16_t to reduce static data size. 
llvm-svn: 152016
 2012-03-05 05:37:41 +00:00
Jia Liu
b077b6085d Emacs-tag and some comment fix for all ARM, CellSPU, Hexagon, MBlaze, MSP430, PPC, PTX, Sparc, X86, XCore. 
llvm-svn: 150878
 2012-02-18 12:03:15 +00:00
Benjamin Kramer
db46bec410 Hexagon: Remove forbidden iostream includes (it introduces static initializers) 
Reorder includes while at it.

llvm-svn: 149863
 2012-02-06 10:19:29 +00:00
Tony Linthicum
e3cdb7e336 fix warning 
llvm-svn: 146420
 2011-12-12 21:52:59 +00:00
Tony Linthicum
61adbf8dc5 Hexagon backend support 
llvm-svn: 146412
 2011-12-12 21:14:40 +00:00