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Commit Graph

134456 Commits

Author SHA1 Message Date
Duncan P. N. Exon Smith
33cfbe6ec5 CodeGen: Avoid implicit conversions in TargetInstrInfo, NFC
Avoid implicit conversions from MachineBasicBlock::iterator to
MachineInstr* in TargetInstrInfo.

llvm-svn: 274361
2016-07-01 16:38:28 +00:00
Duncan P. N. Exon Smith
e18b83f903 CodeGen: Use MachineInstr& in ScheduleDAGIntrs, NFC
Use MachineInstr& to avoid implicit conversions from
MachineBasicBlock::iterator to MachineInstr*.  In one case, this could
use a range-based for loop, but the other loops iterated in reverse
order.

One of the reverse-loops checked the MachineInstr* for nullptr, a
condition that is provably unreachable.  (And even if my proof has a
flaw, UBSan would catch the bug.)

llvm-svn: 274360
2016-07-01 16:21:48 +00:00
Adrian Prantl
b0bebc48b4 Reapply "Define a module map entry for DebugInfo/CodeView."
This reapplies r274313 with two additional #include directives needed
when submodule visibility is enabled.

Fixes PR28384.

llvm-svn: 274358
2016-07-01 15:54:46 +00:00
Dehao Chen
3cbfdf1355 Do not count debug instructions when counting number of uses to reorder frame objects.
Summary: The code generation should be independent of the debug info.

Reviewers: zansari, davidxl, mkuper, majnemer

Subscribers: majnemer, llvm-commits

Differential Revision: http://reviews.llvm.org/D21911

llvm-svn: 274357
2016-07-01 15:40:25 +00:00
Duncan P. N. Exon Smith
30f3e96e65 CodeGen: Avoid iterator conversion in UnreachableBlockElim, NFC
Avoid an unnecessary (and implicit) iterator to pointer conversion in
UnreachableBlockElim by using the post-increment operator.

llvm-svn: 274355
2016-07-01 15:13:09 +00:00
Duncan P. N. Exon Smith
5553404c2b CodeGen: Use MachineInstr& in SlotIndexes.cpp, NFC
Avoid implicit conversions from iterator to pointer by preferring
MachineInstr& and using range-based for loops.

llvm-svn: 274354
2016-07-01 15:08:52 +00:00
Duncan P. N. Exon Smith
51fdaa6f97 CodeGen: Use MachineInstr& in RegAllocFast, NFC
Use MachineInstr& instead of MachineInstr* in RegAllocFast to avoid
implicit conversions from MachineInstrBundleIterator.  RAFast::spillAll
and RAFast::spillVirtReg still take iterators, since their argument may
be an end iterator from MachineBasicBlock::getFirstTerminator.

llvm-svn: 274353
2016-07-01 15:03:37 +00:00
John Brawn
10ceed9ad4 [CMake] Add LLVM_BUILD_32_BITS to LLVMConfig.cmake
Previously out-of-tree passes could detect if LLVM was built with
LLVM_BUILD_32_BITS by looking for -m32 in LLVM_DEFINITIONS, but as of r271871
it no longer appears there. Resolve this by instead emitting LLVM_BUILD_32_BITS
in LLVMConfig so it can be checked for directly.

Differential Revision: http://reviews.llvm.org/D21434

llvm-svn: 274351
2016-07-01 14:22:52 +00:00
Sam Parker
9afffaa0dd [ARM] Refactor Thumb2 mul instruction descs
No functional changes. Just created wrapper classes around the 3
and 4 reg mult and mac instruction classes.

Differential Revision: http://reviews.llvm.org/D21549

llvm-svn: 274347
2016-07-01 12:55:49 +00:00
Benjamin Kramer
a8509b51f9 function_refify. NFC.
While there use emplace_back to create an expensive pair.

llvm-svn: 274344
2016-07-01 11:05:15 +00:00
Nikolay Haustov
2290e3d147 Resubmit r268719 - AMDGPU/SI: Add amdgpu_kernel calling convention. Part 2.
This was reverted in r268740 because of problems with corresponding Clang change.
Clang change was updated and resubmitted in r274220.

Check calling convention in AMDGPUMachineFunction::isKernel

This will be used for AMDGPU_HSA_KERNEL symbol type in output ELF.

Also, in the future unused non-kernels may be optimized.

Reviewers: tstellarAMD, arsenm

Subscribers: arsenm, joker.eph, llvm-commits

Differential Revision: http://reviews.llvm.org/D19917

llvm-svn: 274341
2016-07-01 10:00:58 +00:00
Sam Kolton
f50ff4ead4 [AMDGPU] Assembler: support SDWA for VOPC instructions
Summary: dst_sel and dst_unused disabled for VOPC as they have no effect on result

Reviewers: artem.tamazov, tstellarAMD, vpykhtin

Subscribers: arsenm, kzhuravl

Differential Revision: http://reviews.llvm.org/D21376

llvm-svn: 274340
2016-07-01 09:59:21 +00:00
NAKAMURA Takumi
1b4696ec50 Update libdeps; AMDGPUCodeGen requires LLVMVectorize.
llvm-svn: 274339
2016-07-01 09:55:23 +00:00
Craig Topper
139f298043 [CodeGen] Cleanup getVectorShuffle a bit to take advantage of its new ArrayRef argument and its begin/end iterators. Also use 'int' type for number of elements and loop iterators to remove several typecasts. No functional change intended.
llvm-svn: 274338
2016-07-01 06:54:51 +00:00
Craig Topper
0caa8a6b4a [CodeGen,Target] Remove the version of DAG.getVectorShuffle that takes a pointer to a mask array. Convert all callers to use the ArrayRef version. No functional change intended.
For the most part this simplifies all callers. There were two places in X86 that needed an explicit makeArrayRef to shorten a statically sized array.

llvm-svn: 274337
2016-07-01 06:54:47 +00:00
Eric Christopher
6a7de5ae52 Add support for allowing us to create uniquely identified "COMDAT" or "ELF
Group" sections while lowering. In particular, for ELF sections this is
useful for creating function-specific groups that get merged into the
same named section.

Also use const Twine& instead of StringRef for the getELF functions
while we're here.

Differential Revision: http://reviews.llvm.org/D21743

llvm-svn: 274336
2016-07-01 06:07:38 +00:00
Eric Christopher
bd2c7c3f2d 80-column and comment fixups.
llvm-svn: 274335
2016-07-01 06:07:31 +00:00
Xinliang David Li
11bf9401be [PM] refactor LoopAccessInfo code part-2
Differential Revision: http://reviews.llvm.org/D21636

llvm-svn: 274334
2016-07-01 05:59:55 +00:00
Xinliang David Li
159144914d [MBP] method interface cleanup
Make worklist and ehworklist member of the
class so that they don't need to be passed around.

llvm-svn: 274333
2016-07-01 05:46:48 +00:00
Duncan P. N. Exon Smith
daa6e1353e Revert "add tests for bugs fixed by the GVN hoist pass"
This reverts commit r274327 since the tests fail.  E.g.:
  http://lab.llvm.org:8011/builders/clang-x86_64-linux-selfhost-modules/builds/17240

It looks like this commit is building on r274305, but that commit caused
a miscompile and was reverted in r274320.

llvm-svn: 274332
2016-07-01 04:55:13 +00:00
Matt Arsenault
f430ee2504 AMDGPU: Add option to run the load/store vectorizer
llvm-svn: 274329
2016-07-01 03:33:52 +00:00
Adrian Prantl
e4bc120062 Revert "Define a module map entry for DebugInfo/CodeView."
This reverts commit r274313.
While this fixed the build on Darwin, it broke Linux with local submodule
visibility.

llvm-svn: 274328
2016-07-01 03:17:02 +00:00
Sebastian Pop
c57cfade12 add tests for bugs fixed by the GVN hoist pass
https://llvm.org/bugs/show_bug.cgi?id=20242
https://llvm.org/bugs/show_bug.cgi?id=22005

llvm-svn: 274327
2016-07-01 03:03:19 +00:00
Reid Kleckner
f448343ea4 [codeview] Add DISubprogram::ThisAdjustment
Summary:
This represents the adjustment applied to the implicit 'this' parameter
in the prologue of a virtual method in the MS C++ ABI. The adjustment is
always zero unless multiple inheritance is involved.

This increases the size of DISubprogram by 8 bytes, unfortunately. The
adjustment really is a signed 32-bit integer. If this size increase is
too much, we could probably win it back by splitting out a subclass with
info specific to virtual methods (virtuality, vindex, thisadjustment,
containingType).

Reviewers: aprantl, dexonsmith

Subscribers: aaboud, amccarth, llvm-commits

Differential Revision: http://reviews.llvm.org/D21614

llvm-svn: 274325
2016-07-01 02:41:21 +00:00
Matt Arsenault
8fd475f7bc LoadStoreVectorizer: improvements: better pointer analysis
If OpB has an ADD NSW/NUW, we can use that to prove that adding 1
to OpA won't wrap if OpA + 1 == OpB.

Patch by Fiona Glaser

llvm-svn: 274324
2016-07-01 02:16:24 +00:00
Matt Arsenault
672f531e85 LoadStoreVectorizer: Don't increase alignment with no align set
If no alignment was set on the load/stores, it would vectorize
to the new type even though this increases the default alignment.

llvm-svn: 274323
2016-07-01 02:09:38 +00:00
Matt Arsenault
4d99aca7bd LoadStoreVectorizer: Check TTI for vec reg bit width
llvm-svn: 274322
2016-07-01 02:07:22 +00:00
Matt Arsenault
94a201efeb LoadStoreVectorizer: Fix assert when merging pointer ops
This needs to use inttoptr/ptrtoint if combining an int and pointer
load. If a pointer is used always do an integer load.

llvm-svn: 274321
2016-07-01 01:55:52 +00:00
Duncan P. N. Exon Smith
ffdaac761a Revert "code hoisting pass based on GVN"
This reverts commit r274305, since it breaks self-hosting:
  http://lab.llvm.org:8080/green/job/clang-stage1-configure-RA_build/22349/
  http://lab.llvm.org:8011/builders/clang-x86_64-linux-selfhost-modules/builds/17232

Note that the blamelist on lab.llvm.org:8011 is incorrect.  The previous
build was r274299, but somehow r274305 wasn't included in the blamelist:
  http://lab.llvm.org:8011/builders/clang-x86_64-linux-selfhost-modules

llvm-svn: 274320
2016-07-01 01:51:40 +00:00
Duncan P. N. Exon Smith
00a6a7099d CodeGen: Use MachineInstr& in LiveVariables API, NFC
Change all the methods in LiveVariables that expect non-null
MachineInstr* to take MachineInstr& and update the call sites.  This
clarifies the API, and designs away a class of iterator to pointer
implicit conversions.

llvm-svn: 274319
2016-07-01 01:51:32 +00:00
Matt Arsenault
1386cebc2f LoadStoreVectorizer: Use AA metadata
This was not passing the full instruction with metadata
to the alias query.

llvm-svn: 274318
2016-07-01 01:47:46 +00:00
Duncan P. N. Exon Smith
1dc5b6903f CodeGen: Remove implicit iterator conversions in PHIElimination, NFC
llvm-svn: 274317
2016-07-01 01:27:19 +00:00
Duncan P. N. Exon Smith
b3e43a0ae5 CodeGen: Use MachineInstr& in PostRASchedulerList, NFC
Remove another unnecessary iterator to pointer conversion.

llvm-svn: 274315
2016-07-01 01:18:53 +00:00
Adrian Prantl
d9b34795b8 Define a module map entry for DebugInfo/CodeView.
This fixes the -fmodules build.

llvm-svn: 274313
2016-07-01 01:16:17 +00:00
Matt Arsenault
e8398c9c3e AMDGPU: Implement getLoadStoreVecRegBitWidth
llvm-svn: 274312
2016-07-01 00:56:27 +00:00
Duncan P. N. Exon Smith
0a44b07c9f CodeGen: Use MachineInstr& in PostRAHazardRecognizer, NFC
Convert a loop to a range-based for, using MachineInstr& instead of
MachineInstr* and removing an implicit conversion from iterator to
pointer.

llvm-svn: 274311
2016-07-01 00:50:29 +00:00
Duncan P. N. Exon Smith
d414c8259f CodeGen: Use MachineInstr& in PrologEpilogInserter, NFC
Use MachineInstr& over MachineInstr* to avoid implicit iterator to
pointer conversions.  MachineInstr*-as-nullptr was being used as a flag
for whether the for loop terminated normally; I added an explicit `bool`
instead.

llvm-svn: 274310
2016-07-01 00:40:57 +00:00
Reid Kleckner
1e8c103f99 [pdb] Avoid reporting an error when the module symbol stream is empty
llvm-svn: 274309
2016-07-01 00:37:49 +00:00
Reid Kleckner
a8e16f1432 [PDB] Indicate which type record failed hash validation
llvm-svn: 274308
2016-07-01 00:37:25 +00:00
Matt Arsenault
1b62244124 LoadStoreVectorizer: if one element of a vector is integer, default to
integer.

Fixes issues on some architectures where we use arithmetic ops to build
vectors, which can cause bad things to happen for loads/stores of mixed
types.

Patch by Fiona Glaser

llvm-svn: 274307
2016-07-01 00:37:01 +00:00
Matt Arsenault
ee4cfa6db0 LoadStoreVectorizer: Fix crashes on sub-byte types
llvm-svn: 274306
2016-07-01 00:36:54 +00:00
Sebastian Pop
a6285be57a code hoisting pass based on GVN
This pass hoists duplicated computations in the program. The primary goal of
gvn-hoist is to reduce the size of functions before inline heuristics to reduce
the total cost of function inlining.

Pass written by Sebastian Pop, Aditya Kumar, Xiaoyu Hu, and Brian Rzycki.
Important algorithmic contributions by Daniel Berlin under the form of reviews.

Differential Revision: http://reviews.llvm.org/D19338

llvm-svn: 274305
2016-07-01 00:24:31 +00:00
Duncan P. N. Exon Smith
c2d816d704 Target: Remove unused arguments from overrideSchedPolicy, NFC
TargetSubtargetInfo::overrideSchedPolicy takes two MachineInstr*
arguments (begin and end) that invite implicit conversions from
MachineInstrBundleIterator.  One option would be to change their type to
an iterator, but since they don't seem to have been used since the API
was added in 2010, I'm deleting the dead code.

llvm-svn: 274304
2016-07-01 00:23:27 +00:00
Duncan P. N. Exon Smith
8ea8a249a7 CodeGen: Use MachineInstr& in MachineSink, NFC
Use MachineInstr& instead of MachineInstr* in MachineSinker to help
avoid implicit conversions from iterator to pointer.

llvm-svn: 274303
2016-07-01 00:11:48 +00:00
Adam Nemet
14daf006f6 [LAA] Fix alphabetical sorting of headers. NFC
llvm-svn: 274302
2016-07-01 00:09:02 +00:00
Duncan P. N. Exon Smith
9d359ab468 CodeGen: Use MachineInstr& more in MachineTraceMetrics, NFC
Push MachineInstr& through helper APIs for consistency.  This doesn't
remove any more implicit conversions, but it's a nice cleanup after
r274300.

llvm-svn: 274301
2016-07-01 00:05:40 +00:00
Duncan P. N. Exon Smith
0895fcb255 CodeGen: Use MachineInstr& in MachineTraceMetrics, NFC
This avoids an implicit conversion from iterator to pointer.

llvm-svn: 274300
2016-06-30 23:53:20 +00:00
Matt Arsenault
0b70733004 LoadStoreVectorizer: Check skipFunction first.
Also add test I forgot to add to r274296.

llvm-svn: 274299
2016-06-30 23:50:18 +00:00
Duncan P. N. Exon Smith
79cf1dff71 CodeGen: Use MachineInstr& in LocalStackSlotAllocation, NFC
Avoid a number of implicit conversions from iterator to pointer by using
range-based for and MachineInstr&.

llvm-svn: 274298
2016-06-30 23:39:46 +00:00
Duncan P. N. Exon Smith
08a905518a CodeGen: Use range-based for in LiveVariables, NFC
Avoid an implicit iterator to pointer conversion in
LiveVariables::runOnBlock by switching to a range-based for.

llvm-svn: 274297
2016-06-30 23:33:35 +00:00