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Commit Graph

219034 Commits

Author SHA1 Message Date
Dawid Jurczak
c98a4cb73f Revert "[DSE] Transform memset + malloc --> calloc (PR25892)"
This reverts commit 43234b1595125ba2b5c23e7b28f5a67041c77673.

Reason: We should detect that we are implementing 'calloc' and bail out.
2021-07-23 11:51:59 +02:00
Vitaly Buka
b04b0cb1ff [hwasan] Fix uninitialized DisableOptimization 2021-07-23 02:25:33 -07:00
David Green
f41dff2733 [AArch64] Add worst case shuffle costs
This adds some missing single source shuffle costs for AArch64, of i16
and i8 vectors. v4i16 are the same as v4i32 with a worse case cost of 3
coming from the perfect shuffle tables. The larger vector sizes expand
into a constant pool, plus a load (and adrp) and a tbl. I arbitrarily
chose 8 for the cost to be expensive but not too expensive.

Differential Revision: https://reviews.llvm.org/D106241
2021-07-23 09:01:58 +01:00
Serge Pavlov
865c54f488 [ConstantFolding] Fold constrained arithmetic intrinsics
Constfold constrained variants of operations fadd, fsub, fmul, fdiv,
frem, fma and fmuladd.

The change also sets up some means to support for removal of unused
constrained intrinsics. They are declared as accessing memory to model
interaction with floating point environment, so they were not removed,
as they have side effect. Now constrained intrinsics that have
"fpexcept.ignore" as exception behavior are removed if they have no uses.
As for intrinsics that have exception behavior other than "fpexcept.ignore",
they can be removed if it is known that they do not raise floating point
exceptions. It happens when doing constant folding, attributes of such
intrinsic are changed so that the intrinsic is not claimed as accessing
memory.

Differential Revision: https://reviews.llvm.org/D102673
2021-07-23 14:39:51 +07:00
Sebastian Neubauer
0e5d17756d [AMDGPU] Fix running ResourceUsageAnalysis
Clear the map when running the analysis multiple times.
The assertion that should ensure that every function is only
analyzed once triggered sometimes (once every ~70 compiles of some
graphics pipelines) when two functions of subsequent runs were allocated
at the same address.

Differential Revision: https://reviews.llvm.org/D106452
2021-07-23 09:25:15 +02:00
LLVM GN Syncbot
5995d46a94 [gn build] Port 0118a649348b 2021-07-23 07:19:25 +00:00
Carl Ritson
924e1a4716 [AMDGPU] Add maximum NSA size limit ISA feature
Add maximum NSA size limit as an ISA feature.
Use this to reduce NSA usage on GFX10.1 to avoid stability issues
with 4 and 5 dwords NSA instructions.
Maintain use of longer NSA instructions on GFX10.3.

Note: this also contains some minor fixes for GlobalISel which
did not work correctly with non-NSA form instructions on GFX10.

Reviewed By: foad

Differential Revision: https://reviews.llvm.org/D103348
2021-07-23 16:16:06 +09:00
Cullen Rhodes
9458751292 [AArch64][AsmParser] NFC: when creating a token IsSuffix=false should be default
Reviewed By: david-arm

Differential Revision: https://reviews.llvm.org/D106568
2021-07-23 06:36:06 +00:00
Fraser Cormack
2db8b2b6fc [NFC] Fix early line-break in doxygen comment 2021-07-23 07:16:05 +01:00
Craig Topper
aabc612e68 [X86] Add test case simplified from PR51175. NFC 2021-07-22 23:22:39 -07:00
Fraser Cormack
a7f631c814 [SelectionDAG][RISCV] Add tests showing missed scalable-splat optimizations
These tests show missed opportunities in the SelectionDAG layer when
dealing with scalable-vector splats. All of these are handled for the
equivalent `ISD::BUILD_VECTOR` code, and the tests have largely been
translated from the equivalent X86 tests.

Reviewed By: craig.topper

Differential Revision: https://reviews.llvm.org/D106574
2021-07-23 06:58:16 +01:00
Johannes Doerfert
2051c9341b [Attributor] If provided, only look at simplification callbacks not IR
A simplification callback can mean that the IR value is modified beyond
the apparent IR semantics. That is, a `i1 true` could be replaced by an
`i1 false` based on high-level domain-specific information. If a user
provides a simplification callback we will not look at the IR but
instead give up if the callback returns a nullptr.
2021-07-22 23:57:37 -05:00
Hsiangkai Wang
21b283ef66 [RISCV] Add FrameSetup/FrameDestroy flag to prologue/epilog instructions.
Differential Revision: https://reviews.llvm.org/D105086
2021-07-23 11:35:19 +08:00
Tom Stellard
85eff83056 cmake: Remove unused property on some targets: LLVM_LINK_LIBS
This doesn't appear to be used anywhere.

Reviewed By: serge-sans-paille

Differential Revision: https://reviews.llvm.org/D100021
2021-07-22 20:00:18 -07:00
Nico Weber
69627dbd2f [gn build] Allow use_asan=true on macOS
Seems to work.

(I only tried macOS, not iOS, but need to allow both because
the iOS toolchain used to build compiler-rt asserts otherwise.)
2021-07-22 21:38:02 -04:00
Nico Weber
afc8458e8c [gn build] Reformat all gn files
Ran `git ls-files '*.gn' '*.gni' | xargs llvm/utils/gn/gn.py format`.
2021-07-22 21:35:35 -04:00
Giorgis Georgakoudis
6805993080 [Attributor][Fix] Add overrides for AA2HS analysis 2021-07-22 18:20:14 -07:00
Kai Luo
f31782b163 [PowerPC] Implement XL compatible behavior of __compare_and_swap
According to https://www.ibm.com/docs/en/xl-c-and-cpp-aix/16.1?topic=functions-compare-swap-compare-swaplp
XL's `__compare_and_swap` has a weird behavior that

> In either case, the contents of the memory location specified by addr are copied into the memory location specified by old_val_addr.

(unlike c11 `atomic_compare_exchange` specified in http://www.open-std.org/jtc1/sc22/wg14/www/docs/n1548.pdf)

This patch let clang's implementation follow this behavior.

Reviewed By: jsji

Differential Revision: https://reviews.llvm.org/D106344
2021-07-23 01:16:02 +00:00
Giorgis Georgakoudis
d1dd1d3743 [OpenMP] Use AAHeapToStack/AAHeapToShared analysis in SPMDization
SPMDization D102307 detects incompatible OpenMP runtime calls to abort converting a target region to SPMD mode. Calls to memory allocation/de-allocation routines kmpc_alloc_shared, kmpc_free_shared are incompatible unless they are removed by AAHeapToStack/AAHeapToShared analysis. This patch extends SPMDization detection to include AAHeapToStack/AAHeapToShared analysis results for enlarging the scope of possible SPMDized regions detected.

Reviewed By: jdoerfert

Differential Revision: https://reviews.llvm.org/D105634
2021-07-22 18:08:37 -07:00
Vitaly Buka
381f03cdf9 [NFC][asan] Always pass Dominator Trees into forAllReachableExits 2021-07-22 18:01:38 -07:00
Thomas Johnson
4866aceb76 [ARC] Add tablegen definition for the Find Leading Set (FLS) instruction
Differential Revision: https://reviews.llvm.org/D106602
2021-07-22 17:42:25 -07:00
Gulfem Savrun Yeniceri
4e540995b1 [profile] Add binary id into profiles
This patch adds binary id into profiles to easily associate binaries
with the corresponding profiles. There is an RFC that discusses
the motivation, design and implementation in more detail:
https://lists.llvm.org/pipermail/llvm-dev/2021-June/151154.html

Differential Revision: https://reviews.llvm.org/D102039
2021-07-23 00:19:12 +00:00
Hongtao Yu
03b82baf95 [CSSPGO] Fix a typo in SampleContextTracker
Fixing a typo in SampleContextTracker to use debug name when debug linkage name is no present. This should only affect C programs.

Saw 0.6% perf win on Cinder which is mostly C code.

Reviewed By: wenlei, wmi

Differential Revision: https://reviews.llvm.org/D106599
2021-07-22 16:44:50 -07:00
Nico Weber
5e2439abcf [gn build] (manually) port f8c6515554cc (libLLVMDWP) 2021-07-22 19:38:50 -04:00
Mara Sophie Grosch
f0b7862d3f Add llvm-readobj and binutils symlinks to LLVM_TOOLCHAIN_TOOLS
This patch adds llvm-readobj and the binutils symlink for readelf to
LLVM_TOOLCHAIN_TOOLS.

Tvoid *thread, void *attr,hey are required by some (most?)
autoconf-built libraries, adding these allows me to build newlib with
the toolchain generated this way.

Also opened an issue for that some days ago, see
https://bugs.llvm.org/show_bug.cgi?id=50698

Reviewed By: sbc100

Differential Revision: https://reviews.llvm.org/D104957
2021-07-22 16:33:51 -07:00
Mircea Trofin
081fb59169 [MLGO] Strip TF_PIP cmake variable
This should fix build breaks for 'development' mode. The other modes
were unaffected - 'release' because it doesn't use TFUtils.cpp, and the
mixed mode because the AOT compiled code brings in the necessary include
dirs anyway.
2021-07-22 16:28:13 -07:00
Florian Mayer
b276efa2ab [hwasan] Use stack safety analysis.
This avoids unnecessary instrumentation.

Reviewed By: eugenis, vitalybuka

Differential Revision: https://reviews.llvm.org/D105703
2021-07-22 16:20:27 -07:00
Mircea Trofin
cbaf468075 [docs] Add the compiler-rt requirement to the test suite doc
Differential Revision: https://reviews.llvm.org/D101467
2021-07-22 16:03:45 -07:00
Eli Friedman
299e6ad121 [AArch64] Regenerate test arm64-ccmp.ll 2021-07-22 15:03:05 -07:00
Roman Lebedev
78acee8f2c [SimplifyCFG] SimplifyCondBranchToTwoReturns(): really only deal with different ret blocks
This function is called when some predecessor of an empty return block
ends with a conditional branch, with both successors being empty ret blocks.

Now, because of the way SimplifyCFG works, it might happen to simplify
one of the blocks in a way that makes a conditional branch
into an unconditional one, since it's destinations are now identical,
but it might not have actually simplified said conditional branch
into an unconditional one yet.

So, we have to check that ourselves first,
especially now that SimplifyCFG aggressively tail-merges
all ret and resume blocks.

Even if it was an unconditional branch already,
`SimplifyCFGOpt::simplifyReturn()` doesn't call `FoldReturnIntoUncondBranch()`
by default.
2021-07-23 00:36:59 +03:00
Roman Lebedev
81ab17a5de [NFC][LoopDeletion] Autogenerate checlines in simplify-then-delete.ll test 2021-07-23 00:36:59 +03:00
Roman Lebedev
7bfed10a78 [NFC][SimplifyCFG] Add test for SimplifyCondBranchToTwoReturns() mishandling 2021-07-23 00:36:59 +03:00
Alexander Yermolovich
a827bbdfea [DWP] Refactoring llvm-dwp in to a library part 2
This is follow up to https://reviews.llvm.org/D106198 where llvm-dwp was refactored in to multiple files.
In this patch moving them in to lib/include directories.

Reviewed By: dblaikie

Differential Revision: https://reviews.llvm.org/D106493
2021-07-22 14:23:29 -07:00
Nick Fitzgerald
f7deab5277 Reland: "[WebAssembly] Deduplicate imports of the same module name, field name, and type"
When two symbols import the same thing, only one import should be
emitted in the Wasm file.

Fixes https://bugs.llvm.org/show_bug.cgi?id=50938

Reverted in: 16aac493e59519377071e900d119ba2e7e5b525d.

Reviewed By: sbc100

Differential Revision: https://reviews.llvm.org/D105519
2021-07-22 14:16:05 -07:00
Mircea Trofin
a7e679b2fb [MLGO] Correct protobuf path 2021-07-22 13:24:55 -07:00
Paulo Matos
e8be0ee828 [WebAssembly] Implementation of global.get/set for reftypes in LLVM IR
Reland of 31859f896.

This change implements new DAG notes GLOBAL_GET/GLOBAL_SET, and
lowering methods for load and stores of reference types from IR
globals. Once the lowering creates the new nodes, tablegen pattern
matches those and converts them to Wasm global.get/set.

Reviewed By: tlively

Differential Revision: https://reviews.llvm.org/D104797
2021-07-22 22:07:24 +02:00
Mircea Trofin
294f763d01 [NFC][MLGO] Fix vector sizing
The bots only build release mode, and the use of `reserve` instead of
`resize`, while not causing invalid memory accesses, is incorrect.
2021-07-22 13:06:00 -07:00
Roman Lebedev
fb2a58c6ab [NFCI][TLI] prepare[US]REMEqFold(): don't add nonsensical 'exact' flag to rotates created
As pointed out by Craig Topper.
2021-07-22 23:02:58 +03:00
Eric Astor
fa28271fe9 [ms] [llvm-ml] Fix macro case-insensitivity
We previously had issues identifying macros not registered with a lowercase name.

Reviewed By: mstorsjo, thakis

Differential Revision: https://reviews.llvm.org/D106453
2021-07-22 15:50:52 -04:00
Nikita Popov
001cdeb281 [LICM][SCCP] Regenerate test checks (NFC) 2021-07-22 21:37:21 +02:00
Roman Lebedev
42833bc33b [SimplifyCFG] FoldTwoEntryPHINode(): bailout on inverted logical and/or (PR51149)
The logical (select) form of and/or will now be a source of problems.
We don't really account for it's inverted form, yet it exists,
and presumably we should treat it just like non-inverted form:
https://alive2.llvm.org/ce/z/BU9AXk

https://bugs.llvm.org/show_bug.cgi?id=51149 reports a reportedly-serious
perf regression that will hopefully be mitigated by this.
2021-07-22 22:19:34 +03:00
Roman Lebedev
c256072b86 [NFC][SimplifyCFG] Add some more tests w/ two-entry PHI nodes and 2021-07-22 22:19:34 +03:00
Jon Chesterfield
0493801fb2 [nfc] Fix typo in comment, s/node/note 2021-07-22 20:16:53 +01:00
Simon Pilgrim
c4477aac03 [CostModel][X86] Adjust shift SSE4 legalized costs based on llvm-mca reports.
Update shl/lshr/ashr costs based on the worst case costs from the script in D103695 - many of the 128-bit shifts (usually where integer multiplies aren't used) have similar behaviour to AVX1 so we can merge them.
2021-07-22 20:07:32 +01:00
Simon Pilgrim
b82c6c9bf3 [CostModel][X86] Fix funnel shift check prefixes
We'd lost AVX1 test coverage due to bulldozer (XOP) trying to use the same check prefixes - we really need to fix the update script to avoid this!
2021-07-22 20:07:31 +01:00
LLVM GN Syncbot
6f2b14a5c2 [gn build] Port 3959c95deb11 2021-07-22 18:41:45 +00:00
Simon Pilgrim
815b215830 [X86] Fix SLM FP<->INT throughputs.
Noticed while trying to clean up the shift costs model for SSE4 targets using the script in D10369 - SLM double-pumps all the 128-bit vector conversion ops and only use FP0 pipe - numbers taken from Intel AOM + Agner.
2021-07-22 19:39:04 +01:00
Thomas Johnson
60773756e3 [ARC] Add disassembly for the conditioned RSUB immediate instruction
Differential Revision: https://reviews.llvm.org/D106497
2021-07-22 11:34:39 -07:00
Fangrui Song
fe2cf61945 [Matrix] Fix -Wunused-variable in -DLLVM_ENABLE_ASSERTIONS=off build after D106457. NFC 2021-07-22 11:33:02 -07:00
Adam Nemet
cf091349e0 [Matrix] Fix miscompile for NT matmul if the transpose has other use
We should only add the fake lowering entry for the matrix remark if the
transpose is not lowered on its own.  `MapVector::insert` is used to insert
the entry during proper lowering which does not overwrite the fake entry in
the map.

We actually had test coverage for this but the reference output code was
wrong; it was storing undef rather than the transposed column.

Also add an assert that would have caught this.

Differential Revision: https://reviews.llvm.org/D106457
2021-07-22 10:45:56 -07:00