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Commit Graph

214751 Commits

Author SHA1 Message Date
Craig Topper
ca9962891d [RISCV] Match splatted load to scalar load + splat. Form strided load during isel.
This modifies my previous patch to push the strided load formation
to isel. This gives us opportunity to fold the splat into a .vx
operation first. Using a scalar register and a .vx operation reduces
vector register pressure which can be important for larger LMULs.

If we can't fold the splat into a .vx operation, then it can make
sense to use a strided load to free up the vector arithmetic
ALU to do actual arithmetic rather than tying it up with vmv.v.x.

Reviewed By: khchen

Differential Revision: https://reviews.llvm.org/D101138
2021-04-26 13:32:03 -07:00
Fangrui Song
e5c758dcf3 Add LLVM_ATTRIBUTE_USED to fix problems which could be exposed by aggressive global pointer variable removal
Note to BuryPointer.cpp:GraveYard. 'unused' cannot prevent (1) dead store
elimination and (2) removal of the global pointer variable (D69428) but 'used' can.

Discovered when comparing link maps between HEAD+D69428 and HEAD.

Reviewed By: lattner

Differential Revision: https://reviews.llvm.org/D101217
2021-04-26 13:31:37 -07:00
Fangrui Song
4cb0dafe51 [gcov] Set nounwind and respect module flags metadata "frame-pointer" & "uwtable" for synthesized functions
This applies the D100251 mechanism to the gcov instrumentation pass.

With this patch, `-fno-omit-frame-pointer` in
`clang -fprofile-arcs -O1 -fno-omit-frame-pointer` will be respected for synthesized
`__llvm_gcov_writeout,__llvm_gcov_reset,__llvm_gcov_init` functions: the frame pointer
will be kept (note: on many targets -O1 eliminates the frame pointer by default).

`clang -fno-exceptions -fno-asynchronous-unwind-tables -g -fprofile-arcs` will
produce .debug_frame instead of .eh_frame.

Fix: https://github.com/ClangBuiltLinux/linux/issues/955

Reviewed By: nickdesaulniers

Differential Revision: https://reviews.llvm.org/D101129
2021-04-26 13:30:21 -07:00
Nico Weber
c4d20372c0 [gn build] reformat all gn files
$ git ls-files '*.gn' '*.gni' | xargs llvm/utils/gn/gn.py format
2021-04-26 16:04:23 -04:00
Nico Weber
7195ece044 [gn build] (manually) port f8de9aaef2f4 2021-04-26 16:03:50 -04:00
Ali Tamur
de1b48ff21 Support DW_FORM_strx* in llvm-dwp.
Currently llvm-dwp only handled DW_FORM_string and DW_FORM_GNU_str_index; with this patch it also starts to handle DW_FORM_strx[1-4]?

Reviewed By: dblaikie

Differential Revision: https://reviews.llvm.org/D75485
2021-04-26 12:32:45 -07:00
Martin Storsjö
2a1f29ca9f [llvm-rc] Add a GNU windres-like frontend to llvm-rc
This primarily parses a different set of options and invokes the same
resource compiler as llvm-rc normally. Additionally, it can convert
directly to an object file (which in MSVC style setups is done with the
separate cvtres tool, or by the linker).

(GNU windres also supports other conversions; from coff object file back
to .res, and from .res or object file back to .rc form; that's not yet
implemented.)

The other bigger complication lies in being able to imply or pass the
intended target triple, to let clang find the corresponding mingw sysroot
for finding include files, and for specifying the default output object
machine format.

It can be implied from the tool triple prefix, like
`<triple>-[llvm-]windres` or picked up from the windres option e.g.
`-F pe-x86-64`. In GNU windres, that option takes BFD style format names
such as pe-i386 or pe-x86-64. As libbfd in binutils doesn't support
Windows on ARM, there's no such canonical name for the ARM targets.
Therefore, as an LLVM specific extension, this option is extended to
allow passing full triples, too.

Differential Revision: https://reviews.llvm.org/D100756
2021-04-26 22:04:29 +03:00
Tim Renouf
3d2965b9ee [AMDGPU][llvm-objdump] Fix memory leak in recent commit
Hopefully stops sanitizer fail in AMDGPU llvm-objdump test.

Change-Id: I7331151d1cb65292bd06b6ae283349fe7231cf6b
2021-04-26 18:50:21 +01:00
Moritz Sichert
91e09faea4 [RuntimeDyld] Fixed buffer overflows with absolute symbols
Differential Revision: https://reviews.llvm.org/D95596
2021-04-26 19:24:03 +02:00
Jin Lin
673715d427 Preserve the lexical order for global variables during llvm-link merge
The order of global variables is generated in the order of recursively materializing variables if the global variable has the attribute of hasLocalLinkage or hasLinkOnceLinkage during the module merging. In practice, it is often the exact reverse of source order. This new order may cause performance regression.

The change is to preserve the original lexical order for global variables.

Reviewed By: jdoerfert, dexonsmith

Differential Revision: https://reviews.llvm.org/D94202
2021-04-26 10:11:34 -07:00
Sebastian Neubauer
6b1be183c5 [AMDGPU] Fix autogenerated wwm-reserved-spill.ll
Due to a bug in update_llc_test_checks.py, the test is wrongly
coalesced between run lines. Remove common check prefix to fix that.
NFC.
2021-04-26 19:09:09 +02:00
William S. Moses
98f63bbad6 [Lexer] Allow LLLexer to be used as an API
Explose LLVM Lexer for usage externally as an API

Differential Revision: https://reviews.llvm.org/D100920
2021-04-26 12:43:14 -04:00
Wenlei He
1c97135089 [CSSPGO] Explicitly disallow Binary and Compact Binary profile format for CSSPGO
CSSPGO only supports text and extended binary profile now. Raw binary does not have the metadata section CSSPGO needs, and Compact binary profile needs special handling for GUID based context names, which is not yet implemented.

Disasslow these two format for CSSPGO profile writing to avoid silently generating invalid profiles.

Differential Revision: https://reviews.llvm.org/D101300
2021-04-26 09:10:24 -07:00
Michael Kruse
11f3dcfec5 [SimplifyCFG] Preserve metadata when unconditionalizing branches (constant condition).
When replacing a conditional branch by an unconditional one because the condition is a constant, transfer the metadata to the new branch instruction.

Part of fix for llvm.org/PR50060

Reviewed By: lebedev.ri

Differential Revision: https://reviews.llvm.org/D101141
2021-04-26 10:57:31 -05:00
Sebastian Neubauer
dec086fb0d [AMDGPU] Use MapVector for WWMReservedRegs
Use MapVector instead of SmallDenseMap because it has a deterministic
iteration order.

Differential Revision: https://reviews.llvm.org/D101299
2021-04-26 17:43:00 +02:00
Simon Pilgrim
66ae4df280 [X86] Rename multiclass ATOMIC_LOAD_BINOP -> ATOMIC_RMW_BINOP. NFCI.
Noticed while triaging the rG2149aa73f640c96 regressions - the LXADD ops are load+store RMW instructions, not just loads.
2021-04-26 15:17:30 +01:00
Dávid Bolvanský
12716a3cca Revert "Only ignore -Wdeprecated-copy if the used compiler supports the warning"
This reverts commit b125c034af89e32d5258d593080ff0c4810776a0.

Some bots say " missing binary operator before token "(" "
2021-04-26 16:09:02 +02:00
Paul C. Anagnostopoulos
09a5318bae [TableGen] Remove a TODO comment that is no longer relevant [NFC] 2021-04-26 10:03:12 -04:00
Dávid Bolvanský
71cd69c879 Only ignore -Wdeprecated-copy if the used compiler supports the warning
This is needed after
  https://reviews.llvm.org/rG9658d045926545e62cc3f963fe611d7c5d0c9d98
which introduced code that at least didn't compile clean with clang 8.

Reviewed By: xbolva00

Differential Revision: https://reviews.llvm.org/D101288
2021-04-26 16:00:54 +02:00
Paul C. Anagnostopoulos
6409c51e4c [TableGen] Change assertion information from a tuple to a struct [NFC]
Differential Revision: https://reviews.llvm.org/D100854
2021-04-26 09:57:16 -04:00
Dávid Bolvanský
8752b55ca6 [InstCombine] C - ctpop(a) - > ctpop(~a)) if C is bitwidth (PR50104)
Proof: https://alive2.llvm.org/ce/z/mncA9K
Solves https://bugs.llvm.org/show_bug.cgi?id=50104

Reviewed By: spatel

Differential Revision: https://reviews.llvm.org/D101257
2021-04-26 15:40:54 +02:00
Tim Northover
d8308abd8d AArch64: support atomics in GISel 2021-04-26 14:38:06 +01:00
Tim Renouf
10b4ff5e22 [AMDGPU][llvm-objdump] Add lit.local.cfg missing from recent commit
Stops llvm-objdump tests failing when AMDGPU target is not supported.

Change-Id: Ic4ae443958c41c303ff6bee0966e5f21ab7a1851
2021-04-26 14:07:04 +01:00
Tim Renouf
79e5f97ca7 [MC][AMDGPU][llvm-objdump] Synthesized local labels in disassembly
1. Add an accessor function to MCSymbolizer to retrieve addresses
   referenced by a symbolizable operand, but not resolved to a symbol.
   That way, the caller can synthesize labels at those addresses and
   then retry disassembling the section.

2. Implement that in AMDGPU -- a failed symbol lookup results in the
   address being added to a vector returned by the new function.

3. Use that in llvm-objdump when using MCSymbolizer (which only happens
   on AMDGPU) and SymbolizeOperands is on.

Differential Revision: https://reviews.llvm.org/D101145

Change-Id: I19087c3bbfece64bad5a56ee88bcc9110d83989e
2021-04-26 13:56:36 +01:00
Sanjay Patel
08212f917c [IndVars] avoid 'tmp' names in test file with auto-generated CHECK lines; NFC
The script warns that this could be buggy when updating.
2021-04-26 08:32:25 -04:00
Yuanbo Li
5b6b066173 [LSR][DebugInfo] Don't unnecessarily drop DebugLocs
When transforming a loop terminating condition into a "max" comparison,
the DebugLoc from the old condition should be set on the newly created
comparison. They are the same operation, just optimized. Fixes PR48067.

Differential Revision: https://reviews.llvm.org/D98218
2021-04-26 13:14:42 +01:00
Bradley Smith
385ac4b46b [AArch64][SVE] Add missing patterns for scalar versions of SQSHL/UQSHL
Differential Revision: https://reviews.llvm.org/D101058
2021-04-26 13:07:12 +01:00
Dávid Bolvanský
ae044bb842 [InstCombine] Added testcases for PR50104, NFC 2021-04-26 14:00:30 +02:00
David Green
746a7315fd [ARM] Expand VMOVRRD simplification pattern
This expands the VMOVRRD(extract(..(build_vector(a, b, c, d)))) pattern,
to also handle insert_vectors. Providing we can find the correct insert,
this helps further simplify patterns by removing the redundant VMOVRRD.

Differential Revision: https://reviews.llvm.org/D100245
2021-04-26 12:27:38 +01:00
David Green
bd921d06d1 [ARM] Additional soft float BE test. NFC 2021-04-26 11:44:10 +01:00
David Sherwood
11992c16ee [NFC] Add scalable vectorisation tests for int/FP <> int/FP conversions
We can already vectorize loops that involve int<>int, fp<>fp, int<>fp
and fp<>int conversions, however we didn't previously have any tests
for them. This patch adds some tests for each conversion type.

Differential Revision: https://reviews.llvm.org/D99951
2021-04-26 11:01:14 +01:00
David Sherwood
6475ab5a00 [AArch64] Add AArch64TTIImpl::getMaskedMemoryOpCost function
When vectorising for AArch64 targets if you specify the SVE attribute
we automatically then treat masked loads and stores as legal. Also,
since we have no cost model for masked memory ops we believe it's
cheap to use the masked load/store intrinsics even for fixed width
vectors. This can lead to poor code quality as the intrinsics will
currently be scalarised in the backend. This patch adds a basic
cost model that marks fixed-width masked memory ops as significantly
more expensive than for scalable vectors.

Tests for the cost model are added here:

  Transforms/LoopVectorize/AArch64/masked-op-cost.ll

Differential Revision: https://reviews.llvm.org/D100745
2021-04-26 11:00:03 +01:00
Florian Hahn
cc6f98f11f [VPlan] Make blocksOnly work properly with ranges over const pointers.
When iterating over const blocks, the base type in the lambdas needs
to use const VPBlockBase *, otherwise it cannot be used with input
iterators over const VPBlockBase.

Also adjust the type of the input iterator range to const &, as it
does not take ownership of the input range.
2021-04-26 10:52:35 +01:00
David Green
df2cb039cf [ARM] Ensure loop invariant active.lane.mask operands
CGP can move instructions like a ptrtoint into a loop, but the
MVETailPredication when converting them will currently assume invariant
trip counts. This tries to ensure the operands are loop invariant, and
bails if not.

Differential Revision: https://reviews.llvm.org/D100550
2021-04-26 10:04:33 +01:00
Djordje Todorovic
2c383618e2 [llvm-dwarfdump] Fix split-dwarf bug in stats for inlined var loc cov
Initial (D96045) patch didn't handle split dwarf cases,
so this fixes that bug.

In addition, before applying this patch, we had a slowdown
that happened after the D96045. With this patch,
the slowdown will be fixed as well.

Differential Revision: https://reviews.llvm.org/D100951
2021-04-26 01:56:15 -07:00
Craig Topper
8aee2a9ea4 [RISCV] Cleanup setOperationAction calls for INTRINSIC_WO_CHAIN/INTRINSIC_W_CHAIN
We have several extensions that need i32 to be Custom for
INTRINSIC_WO_CHAIN with RV64 so enable it for all RV64.

For V extension, make i32 Custom for RV64 and i64 Custom for RV32.
When the i32 or i64 is legal, the operation action doesn't matter.
LegalizeDAG checks MVT::Other rather than the real type.
2021-04-25 23:44:28 -07:00
Ben Shi
d474a426e5 [RISCV] Optimize addition with immediate
Reviewed by: craig.topper

Differential Revision: https://reviews.llvm.org/D101244
2021-04-26 13:26:17 +08:00
Craig Topper
88feba99f6 [RISCV] Teach DAG combine what bits Zbp instructions demanded from their inputs.
This teaches DAG combine that shift amount operands for grev, gorc
shfl, unshfl only read a few bits.

This also teaches DAG combine that grevw, gorcw, shflw, unshflw,
bcompressw, bdecompressw only consume the lower 32 bits of their
inputs.

In the future we can teach SimplifyDemandedBits to also propagate
demanded bits of the output to the inputs in some cases.
2021-04-25 21:54:06 -07:00
Levy Hsu
b3953bd33d [RISCV] [1/2] Add IR intrinsic for Zbe extension
RV32/64:
bcompress
bdecompress

RV64 ONLY:
bcompressw
bdecompressw

Reviewed By: craig.topper

Differential Revision: https://reviews.llvm.org/D101143
2021-04-25 19:14:34 -07:00
Jinsong Ji
7f7325057a [DebugInfo][AIX] Set target debugger-tune default to dbx
https://reviews.llvm.org/D99400 set clang DefaultDebuggerTuning for AIX
to dbx. However, we still need to update the target default so that llc
and other tools will get the same default debuggertuning, and avoid
passing extra options in LTO.

Reviewed By: #powerpc, shchenz, dblaikie

Differential Revision: https://reviews.llvm.org/D101197
2021-04-26 01:38:44 +00:00
Lang Hames
40970f078f [ORC] Avoid invalidating iterators in EHFrameRegistrationPlugin.
In EHFrameRegistrationPlugin::notifyTransferringResources if SrcKey had
eh-frames associated but DstKey did not we would create a new entry for DskKey,
invalidating the iterator for SrcKey in the process. This commit fixes that by
removing SrcKey first in this case.
2021-04-25 16:55:19 -07:00
Vitaly Buka
56f698ad6a [sanitizer] Use COMPILER_RT_EMULATOR with gtests
Reviewed By: morehouse

Differential Revision: https://reviews.llvm.org/D100998
2021-04-25 15:41:13 -07:00
Roman Lebedev
35f6937f2b [NFC][X86][AVX2] Add baseline CodeGen/CostModel tests for interleaved loads/stores of i16 w/ strides 2/3/4
`X86TTIImpl::getInterleavedMemoryOpCostAVX2()` currently contains data
only for a handful of tuples. For now, at least add tests for a few more.

I'm guessing that we care how well the patterns codegen since
we use their presumed cost for vectorization decisions,
so i've added codegen tests too.

There's one really easy caveat for these codegen tests:
for interleaved load tests, we really have to ensure that the
deinterleaved vectors are escaped separately. Similarly for stores.
2021-04-26 01:13:07 +03:00
Martin Storsjö
d49d24ce2d [googlemock] Fix warnings about superfluous semicolons after 68ff493dfc950c05c102e09e14a16d06253ffa16. NFC. 2021-04-25 23:41:37 +03:00
Nemanja Ivanovic
7653f36263 Disable deprecated-copy warnings on various LLVM code to bring the bot back to green
Bootstrap with `-Werror` is currently broken due to D79714.
This patch is required to bring the bootstrap bot back to green. The
code will likely need to be fixed and the pragmas removed in due time,
but for now we need to bring the bot back up.

Bot that is currently failing:
https://lab.llvm.org/buildbot/#/builders/36/builds/7680

Differential Revision: https://reviews.llvm.org/D101214
2021-04-25 12:41:46 -07:00
Vitaly Buka
6ad099fd48 [NFC] Fixed some D79714 warnings 2021-04-25 12:41:46 -07:00
Min-Yih Hsu
16f58ba2dc [ARM][disassembler] Fix incorrect number of MCOperands generated by the disassembler
Try to fix bug 49974.

This patch fixes two issues:

 1. BL does not use predicate (BL_pred is the predicate version of BL),
    so we shouldn't add predicate operands in DecodeBranchImmInstruction.
 2. Inside DecodeT2AddSubSPImm, we shouldn't add predicate operands into
    the MCInst because ARMDisassembler::AddThumbPredicate will do that for us.
    However, we should handle CC-out operand for t2SUBspImm and t2AddspImm.

Differential Revision: https://reviews.llvm.org/D100585
2021-04-25 11:55:10 -07:00
Florian Hahn
55f97d3d98 [VPlan] Add VPBlockUtils::blocksOnly helper.
This patch adds a blocksOnly helpers which take an iterator range
over VPBlockBase * or const VPBlockBase * and returns an interator
range that only include BlockTy blocks. The accesses are casted to
BlockTy.

Reviewed By: a.elovikov

Differential Revision: https://reviews.llvm.org/D101093
2021-04-25 17:38:09 +01:00
LLVM GN Syncbot
cc0eecb859 [gn build] Port 1cea7ab4ba13 2021-04-25 12:00:31 +00:00
Tomasz Miąsko
d94bcd2889 [demangler] Use standard semantics for StringView::substr
The StringView::substr now accepts a substring starting position and its
length instead of previous non-standard `from` & `to` positions.

All uses of two argument StringView::substr are in MicrosoftDemangler
and have 0 as a starting position, so no changes are necessary.

This also fixes a bug where attempting to extract a suffix with substr
(a `to` position equal to size) would return a substring without the
last character.

Fixing the issue should not introduce observable changes in the
demangler, since as currently used, a second argument to
StringView::substr is either: 1) a result of a successful call to
StringView::find and so necessarily smaller than size., or 2) in the
case of Demangler::demangleCharLiteral potentially equal to size, but
with demangler expecting more data to follow later on and failing either
way.

Reviewed By: #libc_abi, ldionne, erik.pilkington

Differential Revision: https://reviews.llvm.org/D100246
2021-04-25 13:56:41 +02:00