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Commit Graph

5 Commits

Author SHA1 Message Date
Evan Cheng
aa0ff1ae01 Fix an inverted condition.
llvm-svn: 106330
2010-06-18 22:17:13 +00:00
Evan Cheng
46b89e05fd Make post-ra scheduling, anti-dep breaking, and register scavenger (conservatively) aware of predicated instructions. This enables ARM to move if-conversion before post-ra scheduler.
llvm-svn: 106091
2010-06-16 07:35:02 +00:00
Dan Gohman
15cb983f55 Fix a bug which prevented tail merging of return instructions in
beneficial cases. See the changes in test/CodeGen/X86/tail-opts.ll and
test/CodeGen/ARM/ifcvt2.ll for details.

The fix is to change HashEndOfMBB to hash at most one instruction,
instead of trying to apply heuristics about when it will be profitable to
consider more than one instruction. The regular tail-merging heuristics
are already prepared to handle the same cases, and they're more precise.

Also, make test/CodeGen/ARM/ifcvt5.ll and
test/CodeGen/Thumb2/thumb2-branch.ll slightly more complex so that they
continue to test what they're intended to test.

And, this eliminates the problem in
test/CodeGen/Thumb2/2009-10-15-ITBlockBranch.ll, the testcase from
PR5204. Update it accordingly.

llvm-svn: 102907
2010-05-03 14:35:47 +00:00
Bob Wilson
67c88e4977 Stop using the old pre-UAL syntax for LDM/STM instruction suffixes.
This does not move entirely to UAL syntax, since the default "increment after"
suffix is empty but we still use "IA" for that.

llvm-svn: 98635
2010-03-16 16:19:07 +00:00
Sandeep Patel
c0762ba283 Branches must be the last instruction in a Thumb2 IT block. Approved by Evan Cheng.
llvm-svn: 84212
2009-10-15 22:25:32 +00:00