RPCS3/llvm-mirror
1
0
Fork 0
mirror of https://github.com/RPCS3/llvm-mirror.git synced 2024-10-24 13:33:37 +02:00
Code Issues Projects Releases Wiki Activity
42,075 Commits 4 Branches 5 Tags 704 MiB
cd21d433bb
Commit Graph

108 Commits

Author SHA1 Message Date
Evan Cheng
cd21d433bb - Rewrite code that update register live interval that's split. 
- Create and update spill slot live intervals.
- Lots of bug fixes.

llvm-svn: 58367
 2008-10-29 05:06:14 +00:00
Evan Cheng
a7a0aabf99 Avoid splitting an interval multiple times; avoid splitting re-materializable val# (for now). 
llvm-svn: 58068
 2008-10-24 02:05:00 +00:00
Evan Cheng
c906d4938e Committing a good chunk of the pre-register allocation live interval splitting pass. It's handling simple cases and appear to do good things. Next: avoid splitting an interval multiple times; renumber registers when possible; record stack slot live intervals for coloring; rematerialize defs when possible. 
llvm-svn: 58044
 2008-10-23 20:43:13 +00:00
Dan Gohman
90f776986d Trim #includes. 
llvm-svn: 57649
 2008-10-16 20:18:31 +00:00
Evan Cheng
1c8ff02eeb Re-apply 56835 along with header file changes. 
llvm-svn: 56848
 2008-09-30 15:44:16 +00:00
Dale Johannesen
214ddc92d0 Remove AsmThatEarlyClobber etc. from LiveIntervalAnalysis 
and redo as linked list walk.  Logic moved into RA.
Per review feedback.

llvm-svn: 56326
 2008-09-19 01:02:35 +00:00
Dale Johannesen
99091ed94f Add a bit to mark operands of asm's that conflict 
with an earlyclobber operand elsewhere.  Propagate
this bit and the earlyclobber bit through SDISel.
Change linear-scan RA not to allocate regs in a way 
that conflicts with an earlyclobber.  See also comments.

llvm-svn: 56290
 2008-09-17 21:13:11 +00:00
Dan Gohman
e1f9be27bc Tidy up several unbeseeming casts from pointer to intptr_t. 
llvm-svn: 55779
 2008-09-04 17:05:41 +00:00
Chris Lattner
fd64cbf22d consolidate DenseMapInfo implementations, and add one for std::pair. 
Patch contributed by m-s.

llvm-svn: 55167
 2008-08-22 05:08:25 +00:00
Owen Anderson
39bb486001 Resurrect some ancient code to add spill ranges without attempting folding, remat, or splitting. This code has been updated to current APIs 
in so far as it compiles and, in theory, works, but does not take advantage of recent advancements.  For instance, it could be improved by using
MachineRegisterInfo::use_iterator.

llvm-svn: 54924
 2008-08-18 18:05:32 +00:00
Owen Anderson
de29970fc6 Expunge the last uses of std::map from LiveIntervals. 
llvm-svn: 54766
 2008-08-13 22:28:50 +00:00
Owen Anderson
550fc15832 Move r2iMap_ over to DenseMap from std::map. 
llvm-svn: 54765
 2008-08-13 22:08:30 +00:00
Owen Anderson
28f2e658f1 Make the allocation of LiveIntervals explicit, rather than holding them in the r2iMap_ by value. This will prevent references to them from being invalidated 
if the map is changed.

llvm-svn: 54763
 2008-08-13 21:49:13 +00:00
Owen Anderson
612fc9babc Switch this from std::map to DenseMap. 
llvm-svn: 54761
 2008-08-13 21:24:24 +00:00
Matthijs Kooijman
2ba1b80c7f Silence a warning. 
llvm-svn: 54462
 2008-08-07 13:36:30 +00:00
Dan Gohman
f8f44b4837 Reword a comment to be less ambiguous. 
llvm-svn: 54135
 2008-07-28 18:42:57 +00:00
Dan Gohman
680e1bd958 Enable rematerialization of constants using AliasAnalysis::pointsToConstantMemory, 
and knowledge of PseudoSourceValues. This unfortunately isn't sufficient to allow
constants to be rematerialized in PIC mode -- the extra indirection is a
complication.

llvm-svn: 54000
 2008-07-25 00:02:30 +00:00
Owen Anderson
7b8947cc31 Change the heuristics used in the coalescer, register allocator, and within 
live intervals itself to use an instruction count approximation that is 
not affected by inserting empty indices.

llvm-svn: 53937
 2008-07-22 22:46:49 +00:00
Evan Cheng
3ec3113431 - Change the horrible N^2 isRegReDefinedByTwoAddr. Now callers must supply the operand index of def machineoperand and at most one full scan of non-implicit operands is needed. 
- Change local register allocator to use the new isRegReDefinedByTwoAddr instead of reinventing the wheel.

llvm-svn: 53394
 2008-07-10 07:35:43 +00:00
Owen Anderson
68f11ecb86 Remember which MachineOperand we were processing, so we don't have to scan the list to find it again later. 
This speeds up live intervals from 0.37s to 0.30s on instcombine.

llvm-svn: 52745
 2008-06-25 23:39:39 +00:00
Owen Anderson
501d3ab521 Remove an incorrect comment. 
llvm-svn: 52660
 2008-06-24 00:15:10 +00:00
Owen Anderson
dffc50e90f Use InstrSlots::NUM rather than pre-dividing by four. Also, mark this const. 
llvm-svn: 52659
 2008-06-24 00:08:35 +00:00
Owen Anderson
df17544cd3 Add getScaledIntervalSize, which gives a measure of the size of an interval that is independent of the scaling of 
the function due to empty index slots.  This is suitable for use in backend heuristics that need to reason about the density
of an interval.

llvm-svn: 52652
 2008-06-23 23:25:37 +00:00
Evan Cheng
1d07cd32c2 Undo spill weight tweak. Need to investigate the performance regressions. 
llvm-svn: 52572
 2008-06-21 06:45:54 +00:00
Evan Cheng
968679913e Minor spiller tweak to unfavor reload into load/store instructions. 
llvm-svn: 52477
 2008-06-19 01:16:17 +00:00
Evan Cheng
fe06a1fd5b Refine stack slot interval weight computation. 
llvm-svn: 52040
 2008-06-06 07:54:39 +00:00
Owen Anderson
08c0c02c20 Add a helper for constructing new live ranges that ended from an instruction to the end of its MBB. 
llvm-svn: 52012
 2008-06-05 17:15:43 +00:00
Owen Anderson
d5fc134ec6 Forgot to commit this file. 
llvm-svn: 51786
 2008-05-30 20:14:04 +00:00
Owen Anderson
705b97141c Factor the numbering computation into a separate method, and add the slightest attempt at some renumbering logic, which is currently unused. 
llvm-svn: 51652
 2008-05-28 20:54:50 +00:00
Evan Cheng
d9353009b7 Fix more -Wshorten-64-to-32 warnings. 
llvm-svn: 50659
 2008-05-05 18:30:58 +00:00
Evan Cheng
b389b78462 Use of implicit_def is not part of live interval. Create empty intervals for the uses when the live interval is being spilled. 
llvm-svn: 49542
 2008-04-11 17:53:36 +00:00
Evan Cheng
6250bfbd3e - Treat a live range defined by an implicit_def as a zero-sized one. 
- Eliminate an implicit_def when it's being spilled.

llvm-svn: 49166
 2008-04-03 16:39:43 +00:00
Dan Gohman
a363ba510c Don't include <map> in Pass.h, which doesn't need it. This requires 
adding <map> to many files that actually do need it.

llvm-svn: 48667
 2008-03-21 23:51:57 +00:00
Dan Gohman
89e8681ac5 Fix a typo in a comment. 
llvm-svn: 48345
 2008-03-13 23:04:27 +00:00
Evan Cheng
af1c76846d When the register allocator runs out of registers, spill a physical register around the def's and use's of the interval being allocated to make it possible for the interval to target a register and spill it right away and restore a register for uses. This likely generates terrible code but is before than aborting. 
llvm-svn: 48218
 2008-03-11 07:19:34 +00:00
Bill Wendling
ebb707d162 Detabify 
llvm-svn: 47597
 2008-02-26 10:49:39 +00:00
Evan Cheng
fc540545f1 Correctly determine whether a argument load can be folded into its uses. 
llvm-svn: 47545
 2008-02-25 08:50:41 +00:00
Evan Cheng
676068324b Forgot this. 
llvm-svn: 47510
 2008-02-23 00:46:11 +00:00
Evan Cheng
fa73e0c64e Enable re-materialization of instructions which have virtual register operands if 
the definition of the operand also reaches its uses.

llvm-svn: 47475
 2008-02-22 09:24:50 +00:00
Roman Levenstein
a7d4ae1435 New helper function getMBBFromIndex() that given an index in any instruction of an MBB returns a pointer the MBB. Reviewed by Evan. 
llvm-svn: 47267
 2008-02-18 09:35:30 +00:00
Evan Cheng
bb357cd8a6 - Removing the infamous r2rMap_ and rep() method. Now the coalescer will update 
register defs and uses after each successful coalescing.
- Also removed a number of hacks and fixed some subtle kill information bugs.

llvm-svn: 47167
 2008-02-15 18:24:29 +00:00
Evan Cheng
9c21fd25f0 Simplify. 
llvm-svn: 47059
 2008-02-13 09:18:16 +00:00
Evan Cheng
d4ddda68fa Initial support for copy elimination by commuting its definition MI. 
PR1877.
A3 = op A2 B0<kill>                                                                                                                                                                            
...                                                                                                                                                                                     
B1 = A3      <- this copy                                                                                                                                                                      
...                                                                                                                                                                                          
   = op A3   <- more uses                                                                                                                                                                      
                                                                                                                                                                                                 
==>                                                                                                                                                                                             
                                                                                                                                                                                            
B2 = op B0 A2<kill>                                                                                                                                                                            
...                                                                                                                                                                                          
B1 = B2      <- now an identify copy                                                                                                                                                           
...                                                                                                                                                                                          
   = op B2   <- more uses

This speeds up FreeBench/neural by 29%, Olden/bh by 12%, oopack_v1p8 by 53%.

llvm-svn: 47046
 2008-02-13 03:01:43 +00:00
Dan Gohman
cabaec582f Rename MRegisterInfo to TargetRegisterInfo. 
llvm-svn: 46930
 2008-02-10 18:45:23 +00:00
Chris Lattner
96167aa93c Rename SSARegMap -> MachineRegisterInfo in keeping with the idea 
that "machine" classes are used to represent the current state of
the code being compiled.  Given this expanded name, we can start 
moving other stuff into it.  For now, move the UsedPhysRegs and
LiveIn/LoveOuts vectors from MachineFunction into it.

Update all the clients to match.

This also reduces some needless #includes, such as MachineModuleInfo
from MachineFunction.

llvm-svn: 45467
 2007-12-31 04:13:23 +00:00
Chris Lattner
e0b1ee937a Don't attribute in file headers anymore. See llvmdev for the 
discussion of this change.  Boy are my fingers tired. ;-)

llvm-svn: 45411
 2007-12-29 19:59:42 +00:00
Evan Cheng
45c08c8337 Switch over to MachineLoopInfo. 
llvm-svn: 44838
 2007-12-11 02:09:15 +00:00
Evan Cheng
1d289d0146 Fix for PR1831: if all defs of an interval are re-materializable, then it's a preferred spill candiate. 
llvm-svn: 44644
 2007-12-06 00:01:56 +00:00
Evan Cheng
1dc8e83707 - Mark last use of a split interval as kill instead of letting spiller track it. 
This allows an important optimization to be re-enabled.
- If all uses / defs of a split interval can be folded, give the interval a
  low spill weight so it would not be picked in case spilling is needed (avoid
  pushing other intervals in the same BB to be spilled).

llvm-svn: 44601
 2007-12-05 03:22:34 +00:00
Evan Cheng
8464a0bf00 Add a argument to storeRegToStackSlot and storeRegToAddr to specify whether 
the stored register is killed.

llvm-svn: 44600
 2007-12-05 03:14:33 +00:00