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Commit Graph

62 Commits

Author SHA1 Message Date
Andrew Trick
53f4556c64 whitespace
llvm-svn: 122539
2010-12-24 04:28:06 +00:00
Nick Lewycky
c85935836b Add missing standard headers. Patch by Joerg Sonnenberger!
llvm-svn: 122193
2010-12-19 20:43:38 +00:00
Nick Lewycky
e718af6c63 Add missing std:: prefixes to some calls. C++ doesn't require that <cfoo>
headers provide symbols outside namespace std and the LLVM coding standards
state that we should prefix all of them.

llvm-svn: 122192
2010-12-19 20:42:43 +00:00
Evan Cheng
67db408634 Two sets of changes. Sorry they are intermingled.
1. Fix pre-ra scheduler so it doesn't try to push instructions above calls to
   "optimize for latency". Call instructions don't have the right latency and
   this is more likely to use introduce spills.
2. Fix if-converter cost function. For ARM, it should use instruction latencies,
   not # of micro-ops since multi-latency instructions is completely executed
   even when the predicate is false. Also, some instruction will be "slower"
   when they are predicated due to the register def becoming implicit input.
   rdar://8598427

llvm-svn: 118135
2010-11-03 00:45:17 +00:00
Evan Cheng
324e678bb7 Use instruction itinerary to determine what instructions are 'cheap'.
llvm-svn: 117348
2010-10-26 02:08:50 +00:00
Evan Cheng
6fbb6dea7c - Add TargetInstrInfo::getOperandLatency() to compute operand latencies. This
allow target to correctly compute latency for cases where static scheduling
  itineraries isn't sufficient. e.g. variable_ops instructions such as
  ARM::ldm.
  This also allows target without scheduling itineraries to compute operand
  latencies. e.g. X86 can return (approximated) latencies for high latency
  instructions such as division.
- Compute operand latencies for those defined by load multiple instructions,
  e.g. ldm and those used by store multiple instructions, e.g. stm.

llvm-svn: 115755
2010-10-06 06:27:31 +00:00
Bob Wilson
eb520cd057 Spelling fix.
llvm-svn: 113978
2010-09-15 16:28:21 +00:00
Evan Cheng
c9cb37516d Teach if-converter to be more careful with predicating instructions that would
take multiple cycles to decode.
For the current if-converter clients (actually only ARM), the instructions that
are predicated on false are not nops. They would still take machine cycles to
decode. Micro-coded instructions such as LDM / STM can potentially take multiple
cycles to decode. If-converter should take treat them as non-micro-coded
simple instructions.

llvm-svn: 113570
2010-09-10 01:29:16 +00:00
Evan Cheng
b79a03a3ca For each instruction itinerary class, specify the number of micro-ops each
instruction in the class would be decoded to. Or zero if the number of
uOPs must be determined dynamically.

This will be used to determine the cost-effectiveness of predicating a
micro-coded instruction.

llvm-svn: 113513
2010-09-09 18:18:55 +00:00
Dan Gohman
1ccf40774e Start TargetRegisterClass indices at 0 instead of 1, so that
MachineRegisterInfo doesn't have to confusingly allocate an extra
entry.

llvm-svn: 106296
2010-06-18 18:13:55 +00:00
Chris Lattner
8d06945fff rename TAI -> MAI, being careful not to make MAILJMP instructions :)
llvm-svn: 79777
2009-08-22 21:43:10 +00:00
Chris Lattner
5d8af49626 Rename TargetAsmInfo (and its subclasses) to MCAsmInfo.
llvm-svn: 79763
2009-08-22 20:48:53 +00:00
Chris Lattner
c388490738 Move the getInlineAsmLength virtual method from TAI to TII, where
the only real caller (GetFunctionSizeInBytes) uses it.

The custom ARM implementation of this is basically reimplementing
an assembler poorly for negligible gain.  It should be removed 
IMNSHO, but I'll leave that to ARMish folks to decide.

llvm-svn: 77877
2009-08-02 05:20:37 +00:00
Chris Lattner
7228c69cb7 move a virtual method body to its .cpp file to avoid a #include
in a header.

llvm-svn: 77874
2009-08-02 04:58:19 +00:00
Chris Lattner
613f031b68 inline the global 'getInstrOperandRegClass' function into its callers
now that TargetOperandInfo does the heavy lifting.

llvm-svn: 77508
2009-07-29 21:36:49 +00:00
Chris Lattner
6c284cc8cd 1. Introduce a new TargetOperandInfo::getRegClass() helper method
and convert code to using it, instead of having lots of things
   poke the isLookupPtrRegClass() method directly.

2. Make PointerLikeRegClass contain a 'kind' int, and store it in
   the existing regclass field of TargetOperandInfo when the
   isLookupPtrRegClass() predicate is set.  Make getRegClass pass
   this into TargetRegisterInfo::getPointerRegClass(), allowing
   targets to have multiple ptr_rc things.

llvm-svn: 77504
2009-07-29 21:10:12 +00:00
Evan Cheng
95ce4ffb36 Move getInstrOperandRegClass from the scheduler to TargetInstrInfo.
llvm-svn: 70950
2009-05-05 00:30:09 +00:00
Bob Wilson
c53238dff1 Fix pr3954. The register scavenger asserts for inline assembly with
register destinations that are tied to source operands.  The
TargetInstrDescr::findTiedToSrcOperand method silently fails for inline
assembly.  The existing MachineInstr::isRegReDefinedByTwoAddr was very
close to doing what is needed, so this revision makes a few changes to
that method and also renames it to isRegTiedToUseOperand (for consistency
with the very similar isRegTiedToDefOperand and because it handles both
two-address instructions and inline assembly with tied registers).

llvm-svn: 68714
2009-04-09 17:16:43 +00:00
Chris Lattner
f83aae613c rename TargetInstrDescriptor -> TargetInstrDesc.
Make MachineInstr::getDesc return a reference instead
of a pointer, since it can never be null.

llvm-svn: 45695
2008-01-07 07:27:27 +00:00
Chris Lattner
9d38dfa4a5 Move a bunch more accessors from TargetInstrInfo to TargetInstrDescriptor
llvm-svn: 45680
2008-01-07 03:13:06 +00:00
Chris Lattner
f7f96d818f Rename MachineInstr::getInstrDescriptor -> getDesc(), which reflects
that it is cheap and efficient to get.

Move a variety of predicates from TargetInstrInfo into 
TargetInstrDescriptor, which makes it much easier to query a predicate
when you don't have TII around.  Now you can use MI->getDesc()->isBranch()
instead of going through TII, and this is much more efficient anyway. Not
all of the predicates have been moved over yet.

Update old code that used MI->getInstrDescriptor()->Flags to use the
new predicates in many places.

llvm-svn: 45674
2008-01-07 01:56:04 +00:00
Chris Lattner
1285ec2ae7 Fix a problem where lib/Target/TargetInstrInfo.h would include and use
a header file from libcodegen.  This violates a layering order: codegen
depends on target, not the other way around.  The fix to this is to 
split TII into two classes, TII and TargetInstrInfoImpl, which defines
stuff that depends on libcodegen.  It is defined in libcodegen, where 
the base is not.

llvm-svn: 45475
2008-01-01 01:03:04 +00:00
Chris Lattner
9e5cc35593 Add new shorter predicates for testing machine operands for various types:
e.g. MO.isMBB() instead of MO.isMachineBasicBlock().  I don't plan on 
switching everything over, so new clients should just start using the 
shorter names.

Remove old long accessors, switching everything over to use the short
accessor: getMachineBasicBlock() -> getMBB(), 
getConstantPoolIndex() -> getIndex(), setMachineBasicBlock -> setMBB(), etc.

llvm-svn: 45464
2007-12-30 23:10:15 +00:00
Chris Lattner
7504adbd72 More cleanups for MachineOperand:
- Eliminate the static "print" method for operands, moving it
    into MachineOperand::print.
  - Change various set* methods for register flags to take a bool
    for the value to set it to.  Remove unset* methods.
  - Group methods more logically by operand flavor in MachineOperand.h

llvm-svn: 45461
2007-12-30 21:56:09 +00:00
Chris Lattner
12477d46b4 Use MachineOperand::getImm instead of MachineOperand::getImmedValue. Likewise setImmedValue -> setImm
llvm-svn: 45453
2007-12-30 20:49:49 +00:00
Chris Lattner
ad9a6ccb83 Remove attribution from file headers, per discussion on llvmdev.
llvm-svn: 45418
2007-12-29 20:36:04 +00:00
Dan Gohman
fb60c0dfed Remove isReg, isImm, and isMBB, and change all their users to use
isRegister, isImmediate, and isMachineBasicBlock, which are equivalent,
and more popular.

llvm-svn: 41958
2007-09-14 20:33:02 +00:00
Evan Cheng
88acbacd35 isUnpredicatedTerminator should treat conditional branches as unpredicated terminator.
llvm-svn: 37960
2007-07-06 23:22:03 +00:00
Evan Cheng
50367dfc3e Do not check isPredicated() on non-predicable instructions.
llvm-svn: 37891
2007-07-05 07:06:46 +00:00
Evan Cheng
1a6c0341fd Add a utility routine to check for unpredicated terminator instruction.
llvm-svn: 37528
2007-06-08 21:59:56 +00:00
Evan Cheng
d8b25a2091 Add missing const qualifiers.
llvm-svn: 37341
2007-05-29 18:35:22 +00:00
Evan Cheng
9f763bd3fd Rename a parameter.
llvm-svn: 37307
2007-05-23 07:21:11 +00:00
Evan Cheng
dc9e574073 Remove. Not needed.
llvm-svn: 37139
2007-05-17 00:11:35 +00:00
Evan Cheng
4fa2db30d9 Default implementation of TargetInstrInfo::getBlockSize().
llvm-svn: 37138
2007-05-16 23:53:44 +00:00
Evan Cheng
973f4a19cb PredicateInstruction returns true if the operation was successful.
llvm-svn: 37124
2007-05-16 21:53:07 +00:00
Evan Cheng
30f3168b7b Add default implementation of PredicateInstruction().
llvm-svn: 37123
2007-05-16 21:20:37 +00:00
Evan Cheng
88a55bdd64 Move findTiedToSrcOperand to TargetInstrDescriptor.
llvm-svn: 32366
2006-12-08 18:45:48 +00:00
Evan Cheng
dfec38a575 Use MI's TargetInstrDescriptor.
llvm-svn: 32352
2006-12-08 07:57:56 +00:00
Evan Cheng
bf13611e84 Match TargetInstrInfo changes.
llvm-svn: 32098
2006-12-01 21:52:58 +00:00
Evan Cheng
08e6984667 Remove the ugly SPARCV9 TargetInstrDescriptors hack.
llvm-svn: 32033
2006-11-30 07:10:43 +00:00
Evan Cheng
4625504fa4 commuteInstruction should propagate kill / dead info.
llvm-svn: 31763
2006-11-15 20:56:03 +00:00
Evan Cheng
1da5ee8485 Rename
llvm-svn: 31364
2006-11-01 23:18:32 +00:00
Evan Cheng
b1ac9f6c12 Added getTiedToSrcOperand() to check for two-address'ness.
llvm-svn: 31360
2006-11-01 23:00:31 +00:00
Evan Cheng
eb67c0f664 Typo! How did we commute nodes before?!
llvm-svn: 28229
2006-05-12 01:46:26 +00:00
Chris Lattner
685568510a Move some methods out of MachineInstr into MachineOperand
llvm-svn: 28102
2006-05-04 17:52:23 +00:00
Chris Lattner
829d8b5f7b remove some v9 specific code
llvm-svn: 27900
2006-04-20 18:33:11 +00:00
Misha Brukman
66d3c6e020 Convert tabs to spaces
llvm-svn: 21452
2005-04-22 17:54:37 +00:00
Misha Brukman
933cdaf254 Remove trailing whitespace
llvm-svn: 21422
2005-04-21 22:55:34 +00:00
Chris Lattner
33efebcdc8 Finegrainify namespacification
Add default impl of commuteInstruction
Add notes about ugly V9 code.

llvm-svn: 19684
2005-01-19 06:53:34 +00:00
Brian Gaeke
1ec15e0428 ConstantTypeMustBeLoaded has been incorporated into SparcV9PreSelection, its
only user.

llvm-svn: 15294
2004-07-27 21:43:38 +00:00