edited during emission.
If the basic block ends in a switch that gets lowered to a jump table, any
phis at the default edge were getting updated wrong. The jump table data
structure keeps a pointer to the header blocks that wasn't getting updated
after the MBB is split.
This bug was exposed on 32-bit Linux when disabling critical edge splitting in
codegen prepare.
The fix is to uipdate stale MBB pointers whenever a block is split during
emission.
llvm-svn: 115191
and output the dwarf line number tables. This contains the code to emit and
encode the dwarf line tables from the previously gathered information in the
MCLineSection objects. This contains all the details to encode the line and
address deltas into the dwarf line table.
To do this an MCDwarfLineAddrFragment has been added.
Also this moves the interface code out of Mach-O streamer into
MCDwarf so it should be useable by other object file formats.
There is now one call to be made from an MCObjectStreamer
EmitInstruction() method:
MCLineEntry::Make(this, getCurrentSection());
to create a line entry after each instruction is assembled.
And one call call to be made from an MCObjectStreamer Finish() method:
MCDwarfFileTable::Emit(this, DwarfLineSection);
when getContext().hasDwarfFiles() is true and is passed a object file specific
MCSection where to emit the dwarf file and the line tables.
This appears to now be correct for 32-bit targets, at least x86. But the
relocation entries for 64-bit Darwin needs some further work which is next
up to work on. So for now the 64-bit Mach-O target does not output the
dwarf file and line tables.
llvm-svn: 115157
if we are given a Layout object, even in cases when the value is not fixed.
This will be needed by the final patch for the dwarf .loc support to size a
new MCDwarf fragment needed to build and emit dwarf line number tables.
llvm-svn: 115155
With this patch in
movq $foo, foo(%rip)
foo:
.long foo
We produce a R_X86_64_32S for the first relocation and R_X86_64_32 for the
second one.
llvm-svn: 115134
resolved or not. Different object files have different restrictions and
different native assemblers have different idiosyncrasies we want to emulate
for now.
Move the existing MachO logic to the new place and implement an ELF one that
gets fixups to globals right.
llvm-svn: 115131
or not. TableGen needs to generate the printInstruction() function as taking
an MCInstr* or a MachineInstr*, depending. Default to the old non-MC
version so that everything not yet using MC continues to just work without
fidding.
llvm-svn: 115126
1. Cortex-a9 8-bit and 16-bit loads / stores AGU cycles are 1 cycle longer than 32-bit ones.
2. Cortex-a9 is out-of-order so model all read cycles as cycle 1.
3. Lots of other random fixes for A8 and A9.
llvm-svn: 115121