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Commit Graph

60289 Commits

Author SHA1 Message Date
Evan Cheng
cfe5f2dba5 Do not pre-allocate references of D registers pairs if they are extracted from the same Q register and are in the right order.
llvm-svn: 103124
2010-05-05 22:15:40 +00:00
Jim Grosbach
7eb0b4d646 fix copy/paste oops.
llvm-svn: 103122
2010-05-05 21:07:46 +00:00
Dan Gohman
87a1315fce No-ops emitted for scheduling don't correspond with anything in the
user's source, so don't arbitrarily assign them a debug location.

llvm-svn: 103121
2010-05-05 20:58:01 +00:00
Jim Grosbach
25fc725b2a Add tests for ARMV7M divide instruction use
llvm-svn: 103120
2010-05-05 20:47:15 +00:00
Jim Grosbach
3630aff780 Add initial support for ARMv7M subtarget and cortex-m3 cpu. Patch by
Jordy <snhjordy@gmail.com>.

Followup patches will add some tests and adjust to use Subtarget features
for the instructions.

llvm-svn: 103119
2010-05-05 20:44:35 +00:00
Bob Wilson
e4555598a2 Use the right version of "append" to combine two SmallVectors.
This fixes the compile-time regressions seen in last night's tests.

llvm-svn: 103118
2010-05-05 20:44:15 +00:00
Jim Grosbach
9b7ae2027f remove unneeded underscores.
llvm-svn: 103114
2010-05-05 19:55:58 +00:00
Jim Grosbach
7ea67d346f Convert to filecheck
llvm-svn: 103113
2010-05-05 19:41:11 +00:00
Daniel Dunbar
9a3d46162f MC/Mach-O: Mark absolute variable's appropriately, and add Mach-O support for
writing them.
 - <rdar://problem/7885351> integrated assembler broken for i386 objc code

llvm-svn: 103112
2010-05-05 19:01:05 +00:00
Daniel Dunbar
139bd85642 MC: Reject attempts to define a variable symbol.
llvm-svn: 103111
2010-05-05 19:01:00 +00:00
Daniel Dunbar
258ede3795 MC: Make setVariableValue check the redefinition condition a bit more strongly.
llvm-svn: 103110
2010-05-05 19:00:56 +00:00
Evan Cheng
d7bc27a079 Move REG_SEQUENCE removal to 2addr pass.
llvm-svn: 103109
2010-05-05 18:45:40 +00:00
Chris Lattner
b9f858943a Implement rdar://7415680 - Twine integer support lacks greatness
Microoptimize Twine's with unsigned and int to not pin their value to
the stack.  This saves stack space in common cases and allows mem2reg
in the caller.  A simple example is:

void foo(const Twine &);
void bar(int x) {
  foo("xyz: " + Twine(x));
}

Before:

__Z3bari:
	subq	$40, %rsp
	movl	%edi, 36(%rsp)
	leaq	L_.str3(%rip), %rax
	leaq	36(%rsp), %rcx
	leaq	8(%rsp), %rdi
	movq	%rax, 8(%rsp)
	movq	%rcx, 16(%rsp)
	movb	$3, 24(%rsp)
	movb	$7, 25(%rsp)
	callq	__Z3fooRKN4llvm5TwineE
	addq	$40, %rsp
	ret

After:

__Z3bari:
	subq	$24, %rsp
	leaq	L_.str3(%rip), %rax
	movq	%rax, (%rsp)
	movslq	%edi, %rax
	movq	%rax, 8(%rsp)
	movb	$3, 16(%rsp)
	movb	$7, 17(%rsp)
	leaq	(%rsp), %rdi
	callq	__Z3fooRKN4llvm5TwineE
	addq	$24, %rsp
	ret

It saves 16 bytes of stack and one instruction in this case.

llvm-svn: 103107
2010-05-05 18:40:33 +00:00
Jeffrey Yasskin
421cf94ea0 Rearrange the suppressions files to be by-architecture instead of by-problem.
ddunbar says the gcc-4.3.3 suppressions are obsolete.

llvm-svn: 103106
2010-05-05 18:39:16 +00:00
Evan Cheng
6a76e7d9ae Model CONCAT_VECTORS of two 64-bit values as a REG_SEQUENCE.
llvm-svn: 103104
2010-05-05 18:28:36 +00:00
Evan Cheng
c4f818b682 Trim include.
llvm-svn: 103103
2010-05-05 18:27:57 +00:00
Evan Cheng
25c07ac593 Teach liveintervalanalysis about virtual registers which are defined by reg_sequence instructions that are formed by registers defined by distinct instructions. e.g.
80      %reg1041:6<def> = VSHRNv4i16 %reg1034<kill>, 12, pred:14, pred:%reg0
. . .
120     %reg1041:5<def> = VSHRNv4i16 %reg1039<kill>, 12, pred:14, pred:%reg0

llvm-svn: 103102
2010-05-05 18:27:40 +00:00
Jeffrey Yasskin
be201cecc8 Add a suppressions file for an intermittent "leak" under RegisterPass.
llvm-svn: 103100
2010-05-05 18:15:26 +00:00
Daniel Dunbar
d2ac9dc48b MC: Rename MCSymbol::{g,s}etValue -> MCSymbol::{g,s}etVariableValue.
llvm-svn: 103095
2010-05-05 17:41:00 +00:00
Daniel Dunbar
f5dc70a7d1 MC/Mach-O/x86_64: Relocations in debug sections should use local relocations
when possible.
 - <rdar://problem/7934873>

llvm-svn: 103092
2010-05-05 17:22:39 +00:00
Daniel Dunbar
772b9002e7 lit: Allow test_format to be None.
llvm-svn: 103091
2010-05-05 17:22:35 +00:00
Benjamin Kramer
8712466dd6 Try again if write(2) reports an recoverable error.
This should fix mysteriously crashing boost regression tests when stderr is
managed by bjam (PR7043).

llvm-svn: 103085
2010-05-05 15:17:47 +00:00
Shantonu Sen
7e52958e05 Add newline to end of file to avoid warning
when building llvm with clang

llvm-svn: 103084
2010-05-05 13:56:46 +00:00
Eric Christopher
e7a5ba0051 Revert 102941, we're going to do this via attr and can just
hack the code to turn it off when debugging.

llvm-svn: 103083
2010-05-05 07:35:59 +00:00
Alexis Hunt
f4d5520f79 Include the right header for toupper
llvm-svn: 103073
2010-05-05 04:31:44 +00:00
Alexis Hunt
55ae7d6b53 Add an emitter to handle the list of clang statement nodes.
llvm-svn: 103071
2010-05-05 04:13:08 +00:00
Bob Wilson
e81252b747 Combine the implementations of the core part of the SSAUpdater and
MachineSSAUpdater to avoid duplicating all the code.

llvm-svn: 103060
2010-05-04 23:18:19 +00:00
Eric Christopher
5f2f91e268 Update comment.
llvm-svn: 103057
2010-05-04 22:13:03 +00:00
Chris Lattner
7b17b0d5fb add the ability to associate 'category' names with clang diagnostics
and diagnostic groups.  This allows the compiler to group 
diagnostics together (e.g. "Logic Warning", 
"Format String Warning", etc) like the static analyzer does.  
This is not exposed through anything in the compiler yet.

llvm-svn: 103050
2010-05-04 20:44:23 +00:00
Evan Cheng
1440201528 With -neon-reg-sequence, models forming a Q register from a pair of consecutive D registers as a REG_SEQUENCE.
llvm-svn: 103047
2010-05-04 20:39:49 +00:00
Evan Cheng
85d27d4ab2 Do not pre-allocate for registers which form a REG_SEQUENCE.
llvm-svn: 103041
2010-05-04 20:38:12 +00:00
Evan Cheng
9cd91d458a Teach PHI elimination to remove REG_SEQUENCE instructions and update references of the source operands with references of the destination with subreg indices. e.g.
%reg1029<def>, %reg1030<def> = VLD1q16 %reg1024<kill>, ...
%reg1031<def> = REG_SEQUENCE %reg1029<kill>, 5, %reg1030<kill>, 6
=>
%reg1031:5<def>, %reg1031:6<def> = VLD1q16 %reg1024<kill>, ...

PHI elimination now does more than phi elimination. It is really a de-SSA pass.

llvm-svn: 103039
2010-05-04 20:26:52 +00:00
Duncan Sands
7db9873b74 Use llvm.foo as the intrinsic, rather than llvm.dbg.value. Since the
values passed to llvm.dbg.value were not valid for the intrinsic, it
might have caused trouble one day if the verifier ever started checking
for valid debug info.

llvm-svn: 103038
2010-05-04 20:09:25 +00:00
Bob Wilson
5576ed9c86 Defer adding critical edges to the "toSplit" list until after checking for
indirect branches in all the predecessors.  This avoids unnecessarily
splitting edges in cases where load PRE is not possible anyway.
Thanks to Jakub Staszak for pointing this out.

llvm-svn: 103034
2010-05-04 20:03:21 +00:00
Chris Lattner
b8bb38be5f one more thing.
llvm-svn: 103024
2010-05-04 18:16:00 +00:00
Chris Lattner
02f4f138bd update instructions for llvm-gcc4, the brave new world! PR7037
llvm-svn: 103023
2010-05-04 18:15:33 +00:00
Chris Lattner
b4696853af "on the rare occasion the SPU BE produces illegal assembly - it tries to emit an add instruction of the form 'a reg, reg, imm'."
Patch by Kalle Raiskila!

llvm-svn: 103021
2010-05-04 17:58:46 +00:00
Daniel Dunbar
e335a71a56 MC/X86: Chris pointed that 'as' isn't consistent in accepting the long form of
instructions which have no direct register usage.

Darwin 'as' accepts:
  add $0, (%rax)
but rejects
  mov $0, (%rax)
for example.

Given that, only accept suffix matches which match exactly one form. We still
need to emit nice diagnostics for failures...

llvm-svn: 103015
2010-05-04 17:31:02 +00:00
Evan Cheng
9bdd9f4746 Rename variables for consistency.
llvm-svn: 103013
2010-05-04 17:12:26 +00:00
Daniel Dunbar
648d1ae783 MC/X86: Add "support" for matching ATT style mnemonic prefixes.
- The idea is that when a match fails, we just try to match each of +'b', +'w',
   +'l'. If exactly one matches, we assume this is a mnemonic prefix and accept
   it. If all match, we assume it is width generic, and take the 'l' form.

 - This would be a horrible hack, if it weren't so simple. Therefore it is an
   elegant solution! Chris gets the credit for this particular elegant
   solution. :)

 - Next step to making this more robust is to have the X86 matcher generate the
   mnemonic prefix information. Ideally we would also compute up-front exactly
   which mnemonic to attempt to match, but this may require more custom code in
   the matcher than is really worth it.

llvm-svn: 103012
2010-05-04 16:12:42 +00:00
Duncan Sands
5f1c52fa06 Fix a problem exposed by my previous commit and noticed by a release-asserts
buildbot: the debugging and non-debugging versions of getFunction were not
functionally equivalent: the non-debugging version wrongly assumed that if a
metadata operand was not metadata, then it had a non-null containing function.
This is not true, since the operand might be a global value, constant etc.

llvm-svn: 103008
2010-05-04 14:25:42 +00:00
Duncan Sands
a3857d3d9a Fix a variant of PR6112 found by thinking about it: when doing
RAUW of a global variable with a local variable in function F,
if function local metadata M in function G was using the global
then M would become function-local to both F and G, which is not
allowed.  See the testcase for an example.  Fixed by detecting
this situation and zapping the metadata operand when it occurs.

llvm-svn: 103007
2010-05-04 12:43:36 +00:00
Gabor Greif
53be8efd62 fix operand indexes when outputting InvokeInsts
llvm-svn: 103003
2010-05-04 09:23:54 +00:00
Devang Patel
ee7c7143dc Set DW_AT_APPLE_omit_frame_ptr in endFunction() where MachineFunction is available all the time.
llvm-svn: 103001
2010-05-04 06:15:30 +00:00
Dan Gohman
5c61a913b2 Use the SCEVAddRecExpr::getPostIncExpr utility function instead
of doing the same thing manually.

llvm-svn: 102997
2010-05-04 01:12:27 +00:00
Dan Gohman
4e1dbacdf8 Fix a copy+pasto.
llvm-svn: 102996
2010-05-04 01:11:15 +00:00
Devang Patel
edbef722d6 Do not ignore debug loc attached with llvm.dbg.declare while collecting debug info used by a module.
llvm-svn: 102995
2010-05-04 01:05:02 +00:00
Evan Cheng
66ef3ff9c7 Instruction selection optimizations may have moved the def of a function argument out of the entry block. rdar://7937489
llvm-svn: 102993
2010-05-04 00:58:39 +00:00
Kevin Enderby
f34574dd89 Fix to r102952. The MOV64toSDrm record in X86Instr64bit.td needed the opcode
changed to 0x7E from 0x6E as well as the previous change of RPDI to S3SI.

llvm-svn: 102991
2010-05-04 00:42:46 +00:00
Daniel Dunbar
711d2427dd MC/Matcher: Add support for over-riding the default MatchInstruction function
name (for example, to allow targets to interpose the actual MatchInstruction
function).

llvm-svn: 102987
2010-05-04 00:33:13 +00:00