Evan Cheng
e720cfd690
New DAG node properties SNDPInFlag, SNDPOutFlag, and SNDPOptInFlag to replace
...
hasInFlag, hasOutFlag.
llvm-svn: 25155
2006-01-09 18:28:21 +00:00
Chris Lattner
00d77e22d4
Fix the PPC JIT failures last night, which were due to mishandling of linkonce globals
...
llvm-svn: 25141
2006-01-07 06:22:16 +00:00
Chris Lattner
d583872b9e
linkonce symbols have an extra indirection, just like weak ones do. This fixes
...
Prolangs-C++/family and Prolangs-C++/primes.
llvm-svn: 25119
2006-01-06 01:04:03 +00:00
Chris Lattner
5488b43338
Fix a compile crash building MultiSource/Applications/d with the new front-end.
...
The PPC backend was generating random shift counts in this case, due to an
uninitialized variable.
llvm-svn: 25114
2006-01-05 18:32:49 +00:00
Jim Laskey
41b3ee3c4f
Had expand logic backward.
...
llvm-svn: 25105
2006-01-05 01:47:43 +00:00
Jim Laskey
5eddaee9f3
Added initial support for DEBUG_LABEL allowing debug specific labels to be
...
inserted in the code.
llvm-svn: 25104
2006-01-05 01:25:28 +00:00
Jim Laskey
61138e28ff
Applied some recommend changes from sabre. The dominate one beginning "let the
...
pass manager do it's thing." Fixes crash when compiling -g files and suppresses
dwarf statements if no debug info is present.
llvm-svn: 25100
2006-01-04 22:28:25 +00:00
Jim Laskey
897ad8ddb7
Add unique id to debug location for debug label use (work in progress.)
...
llvm-svn: 25096
2006-01-04 15:04:11 +00:00
Jim Laskey
62b29812a6
Tie dwarf generation to darwin assembler.
...
llvm-svn: 25093
2006-01-04 13:52:30 +00:00
Nate Begeman
ec7c28a28c
Add support for generating v4i32 altivec code
...
llvm-svn: 25046
2005-12-30 00:12:56 +00:00
Nate Begeman
e1fdcf5a20
Remove a fixme
...
llvm-svn: 25045
2005-12-30 00:11:07 +00:00
Evan Cheng
231b11ba87
Added field noResults to Instruction.
...
Currently tblgen cannot tell which operands in the operand list are results so
it assumes the first one is a result. This is bad. Ideally we would fix this
by separating results from inputs, e.g. (res R32:$dst),
(ops R32:$src1, R32:$src2). But that's a more distruptive change. Adding
'let noResults = 1' is the workaround to tell tblgen that the instruction does
not produces a result. It works for now since tblgen does not support
instructions which produce multiple results.
llvm-svn: 25017
2005-12-26 09:11:45 +00:00
Nate Begeman
96c7e22231
Fix one of the things in the todo file, and get a bit closer to folding
...
constant offsets from statics into the address arithmetic.
llvm-svn: 24999
2005-12-24 01:00:15 +00:00
Evan Cheng
d87688fe72
* Removed the use of FLAG. Now use hasFlagIn and hasFlagOut instead.
...
* Added a pseudo instruction (for each target) that represent "return void".
This is a workaround for lack of optional flag operand (return void is not
lowered so it does not have a flag operand.)
llvm-svn: 24997
2005-12-23 22:14:32 +00:00
Chris Lattner
8b2bd265f4
make sure bit_converts are expanded
...
llvm-svn: 24978
2005-12-23 05:13:35 +00:00
Chris Lattner
3c4a3dd86e
Simplify some code by using BIT_CONVERT
...
llvm-svn: 24974
2005-12-23 00:59:59 +00:00
Chris Lattner
73f38507d9
remove dead code
...
llvm-svn: 24965
2005-12-22 21:16:08 +00:00
Chris Lattner
8c2622a14e
fix handling of weak linkage
...
llvm-svn: 24964
2005-12-22 21:15:17 +00:00
Chris Lattner
f7ed832fcf
move some random notes out of my email into someplace useful
...
llvm-svn: 24956
2005-12-22 17:19:28 +00:00
Evan Cheng
e458553c73
Bye bye HACKTROCITY.
...
llvm-svn: 24935
2005-12-22 02:26:21 +00:00
Evan Cheng
05ad906ccf
Flip the meaning of FPContractions to reflect Requires<[]> change.
...
llvm-svn: 24884
2005-12-20 20:08:53 +00:00
Nate Begeman
a114534620
Pattern-match return. Includes gross hack!
...
llvm-svn: 24874
2005-12-20 00:26:01 +00:00
Nate Begeman
d4562971b3
Fix a couple of the FIXMEs, thanks to suggestion from Chris. This allows
...
us to load and store vectors directly at a pointer (offset of zero) by
using r0 as the base register. This also requires some asm printer work
to satisfy the darwin assembler.
For
void %foo(<4 x float> * %a) {
entry:
%tmp1 = load <4 x float> * %a;
%tmp2 = add <4 x float> %tmp1, %tmp1
store <4 x float> %tmp2, <4 x float> *%a
ret void
}
We now produce:
_foo:
lvx v0, 0, r3
vaddfp v0, v0, v0
stvx v0, 0, r3
blr
Instead of:
_foo:
li r2, 0
lvx v0, r2, r3
vaddfp v0, v0, v0
stvx v0, r2, r3
blr
llvm-svn: 24872
2005-12-19 23:40:42 +00:00
Nate Begeman
9c7dce88b5
Convert load/store over to being pattern matched
...
llvm-svn: 24871
2005-12-19 23:25:09 +00:00
Chris Lattner
0124442495
This is handled by the autogen'd code
...
llvm-svn: 24834
2005-12-18 21:06:11 +00:00
Jim Laskey
37957b1ad3
Added source file/line correspondence for dwarf (PowerPC only at this point.)
...
llvm-svn: 24748
2005-12-16 22:45:29 +00:00
Chris Lattner
ba98d302be
Weak and linkonce global vars should still have a .globl emitted for them
...
llvm-svn: 24747
2005-12-16 21:46:14 +00:00
Nate Begeman
69da94a1b9
Add a second vector type to the VRRC register class, and fix some patterns
...
so that tablegen can infer all types.
llvm-svn: 24746
2005-12-16 09:19:13 +00:00
Chris Lattner
890fd4e66c
Update the darwin handling of linkonce & weak functions and GV stubs. This
...
should work in all permutations.
llvm-svn: 24728
2005-12-16 00:22:14 +00:00
Nate Begeman
f5ac708070
Remove a now unused statistic.
...
llvm-svn: 24720
2005-12-14 22:56:16 +00:00
Nate Begeman
fe7a3f28e3
Use the new predicate support that Evan Cheng added to remove some code
...
from the DAGToDAG cpp file. This adds pattern support for vector and
scalar fma, which passes test/Regression/CodeGen/PowerPC/fma.ll, and
does the right thing in the presence of -disable-excess-fp-precision.
Allows us to match:
void %foo(<4 x float> * %a) {
entry:
%tmp1 = load <4 x float> * %a;
%tmp2 = mul <4 x float> %tmp1, %tmp1
%tmp3 = add <4 x float> %tmp2, %tmp1
store <4 x float> %tmp3, <4 x float> *%a
ret void
}
As:
_foo:
li r2, 0
lvx v0, r2, r3
vmaddfp v0, v0, v0, v0
stvx v0, r2, r3
blr
Or, with llc -disable-excess-fp-precision,
_foo:
li r2, 0
lvx v0, r2, r3
vxor v1, v1, v1
vmaddfp v1, v0, v0, v1
vaddfp v0, v1, v0
stvx v0, r2, r3
blr
llvm-svn: 24719
2005-12-14 22:54:33 +00:00
Evan Cheng
fbc29bb3dd
Added predicate !NoExcessFPPrecision to FMADD, FMADDS, FMSUB, and FMSUBS.
...
llvm-svn: 24716
2005-12-14 22:07:12 +00:00
Nate Begeman
09855eafd1
Add support for fmul node of type v4f32.
...
void %foo(<4 x float> * %a) {
entry:
%tmp1 = load <4 x float> * %a;
%tmp2 = mul <4 x float> %tmp1, %tmp1
store <4 x float> %tmp2, <4 x float> *%a
ret void
}
Is selected to:
_foo:
li r2, 0
lvx v0, r2, r3
vxor v1, v1, v1
vmaddfp v0, v0, v0, v1
stvx v0, r2, r3
blr
llvm-svn: 24701
2005-12-14 00:34:09 +00:00
Nate Begeman
1700fe3f71
Prepare support for AltiVec multiply, divide, and sqrt.
...
llvm-svn: 24700
2005-12-13 22:55:22 +00:00
Chris Lattner
95555853ad
Use the shared asmprinter code for printing special llvm globals
...
llvm-svn: 24695
2005-12-13 06:32:50 +00:00
Chris Lattner
1468c52811
reindent a loop, unswitch a loop. No functionality changes
...
llvm-svn: 24692
2005-12-13 04:33:58 +00:00
Chris Lattner
6d4db7c732
Remove type casts that are no longer needed
...
llvm-svn: 24661
2005-12-11 07:45:47 +00:00
Chris Lattner
d27c96f723
Fix the JIT failures from last night.
...
llvm-svn: 24659
2005-12-11 07:37:41 +00:00
Nate Begeman
a0e26b25f4
Add support for TargetConstantPool nodes to the dag isel emitter, and use
...
them in the PPC backend, to simplify some logic out of Select and
SelectAddr.
llvm-svn: 24657
2005-12-10 02:36:00 +00:00
Nate Begeman
5c6a84b5fc
Add support patterns to many load and store instructions which will
...
hopefully use patterns in the near future.
llvm-svn: 24651
2005-12-09 23:54:18 +00:00
Chris Lattner
cdeeb94947
Teach the PPC backend about the ctor and dtor list when not using __main and
...
linking the entire program into one bc file.
llvm-svn: 24645
2005-12-09 18:24:29 +00:00
Chris Lattner
9d9313e3c1
Add another important case we miss
...
llvm-svn: 24639
2005-12-08 07:13:28 +00:00
Chris Lattner
46ca9774fc
Silence another annoying GCC warning
...
llvm-svn: 24627
2005-12-06 20:56:18 +00:00
Chris Lattner
68a0fed879
Use new PPC-specific nodes to represent shifts which require the 6-bit
...
amount handling that PPC provides. These are generated by the lowering code
and prevents the dag combiner from assuming (rightfully) that the shifts
don't only look at 5 bits. This fixes a miscompilation of crafty with
the new front-end.
llvm-svn: 24615
2005-12-06 02:10:38 +00:00
Chris Lattner
b2d4850394
Add some explicit type casts so that tblgen knows the type of the shift
...
amount, which is not necessarily the same as the type being shifted.
llvm-svn: 24594
2005-12-05 02:34:05 +00:00
Chris Lattner
e6daa0e5bc
The basic fneg cases are already autogen'd
...
llvm-svn: 24592
2005-12-04 19:04:38 +00:00
Chris Lattner
f38170bbd2
Autogen matching code for ADJCALLSTACK[UP|DOWN], thanks to Evan's tblgen
...
improvements.
llvm-svn: 24591
2005-12-04 19:01:59 +00:00
Chris Lattner
a8af34937b
Finish moving uncond br over to .td file, remove from .cpp file.
...
llvm-svn: 24590
2005-12-04 18:48:01 +00:00
Chris Lattner
b62b05bde6
Define BR in the .td file now that Evan made tblgen smarter.
...
llvm-svn: 24589
2005-12-04 18:42:54 +00:00
Chris Lattner
046761f312
Make sure these get added into the codegenmap when appropriate
...
llvm-svn: 24566
2005-12-01 18:09:22 +00:00