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Commit Graph

116964 Commits

Author SHA1 Message Date
Toma Tabacu
d49821a633 [mips] [IAS] Merge the micromips-expressions.s test into expr1.s. NFC.
Summary: Also did some minor reformatting in the resulting test.

Reviewers: dsanders

Reviewed By: dsanders

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D9702

llvm-svn: 237242
2015-05-13 09:53:53 +00:00
Sergey Dmitrouk
5e3a4d1a49 [DebugInfo] Debug locations for constant SD nodes
Several updates for [DebugInfo] Add debug locations to constant SD nodes (r235989).
Includes:

 *  re-enabling the change (disabled recently);
 *  missing change for FP constants;
 *  resetting debug location of constant node if it's used more than at one place
    to prevent emission of wrong locations in case of coalesced constants;
 *  a couple of additional tests.

Now all look ups in CSEMap are wrapped by additional method.

Comment in D9084 suggests that debug locations aren't useful for "target constants",
so there might be one more change related to this API (namely, dropping debug
locations for getTarget*Constant methods).

Differential Revision: http://reviews.llvm.org/D9604

llvm-svn: 237237
2015-05-13 08:58:03 +00:00
Michael Kuperstein
56a8e05a6b Use std::bitset for SubtargetFeatures
Previously, subtarget features were a bitfield with the underlying type being uint64_t. 
Since several targets (X86 and ARM, in particular) have hit or were very close to hitting this bound, switching the features to use a bitset.
No functional change.

The first two times this was committed (r229831, r233055), it caused several buildbot failures. 
At least some of the ARM and MIPS ones were due to gcc/binutils issues, and should now be fixed.

llvm-svn: 237234
2015-05-13 08:27:08 +00:00
Elena Demikhovsky
0803046ed4 AVX-512: fixed a bug in encoding of VPSRAQ instrcution,
added a bunch of encoding tests.

llvm-svn: 237232
2015-05-13 07:35:05 +00:00
Craig Topper
8641edf78d Use ArrayRef::slice instead of manually constructing an ArrayRef from ArrayRef iterators. NFC
llvm-svn: 237231
2015-05-13 06:57:51 +00:00
Pete Cooper
b5d9bccca3 Constify arguments to methods in LICM. NFC
llvm-svn: 237227
2015-05-13 01:12:18 +00:00
Pete Cooper
f82078997d Change LoadAndStorePromoter to take ArrayRef instead of SmallVectorImpl&.
The array passed to LoadAndStorePromoter's constructor was a constant reference to a SmallVectorImpl, which is just the same as passing an ArrayRef.

Also, the data in the array can be 'const Instruction*' instead of 'Instruction*'.  Its not possible to convert a SmallVectorImpl<T*> to SmallVectorImpl<const T*>, but ArrayRef does provide such a method.

Currently this added calls to makeArrayRef which should be a nop, but i'm going to kick off a discussion about improving ArrayRef to not need these.

llvm-svn: 237226
2015-05-13 01:12:16 +00:00
Pete Cooper
fa50da87a6 Constify arguments in AliasSetTracker methods. NFC
llvm-svn: 237225
2015-05-13 01:12:12 +00:00
Pete Cooper
40fc512802 Change a loop in LoopInfo to foreach. NFC
llvm-svn: 237224
2015-05-13 01:12:09 +00:00
Pete Cooper
400d94bb73 Constify arguments to methods in LoopInfo. NFC
llvm-svn: 237223
2015-05-13 01:12:06 +00:00
Philip Reames
c45c026eb8 [PlaceSafepoints] Reduce dominator tree recalculation
Reduce recalculation of the dominator tree by identifying all sites that will need a safepoint poll before doing any of the insertion. This allows us to invalidate the dominator info once, rather than once per safepoint poll inserted.

While I'm at it, update findLocationForEntrySafepoint to properly update the dom tree now that the interface has been made easy. When first written, it wasn't per comment in the code.

Differential Revision: http://reviews.llvm.org/D9727

llvm-svn: 237220
2015-05-13 00:32:23 +00:00
Jingyue Wu
a524afb93c [SLSR] handles non-canonicalized Mul candidates
such as (2 + B) * S.

Tested by @non_canonicalized in slsr-mul.ll

llvm-svn: 237216
2015-05-13 00:03:17 +00:00
Sanjoy Das
6d67db8c09 [Statepoints] Support for "patchable" statepoints.
Summary:
This change adds two new parameters to the statepoint intrinsic, `i64 id`
and `i32 num_patch_bytes`.  `id` gets propagated to the ID field
in the generated StackMap section.  If the `num_patch_bytes` is
non-zero then the statepoint is lowered to `num_patch_bytes` bytes of
nops instead of a call (the spill and reload code remains unchanged).
A non-zero `num_patch_bytes` is useful in situations where a language
runtime requires complete control over how a call is lowered.

This change brings statepoints one step closer to patchpoints.  With
some additional work (that is not part of this patch) it should be
possible to get rid of `TargetOpcode::STATEPOINT` altogether.

PlaceSafepoints generates `statepoint` wrappers with `id` set to
`0xABCDEF00` (the old default value for the ID reported in the stackmap)
and `num_patch_bytes` set to `0`.  This can be made more sophisticated
later.

Reviewers: reames, pgavlin, swaroop.sridhar, AndyAyers

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D9546

llvm-svn: 237214
2015-05-12 23:52:24 +00:00
Philip Reames
bd2093edaf [PlaceSafepoints] Followup to commit L237172
Responding to review feedback from http://reviews.llvm.org/D9585

1) Remove a variable shadow by converting the outer loop to a range for loop.  We never really used the 'i' variable which was being shadowed.
2) Reduce DominatorTree recalculations by passing the DT to SplitEdge.

llvm-svn: 237212
2015-05-12 23:39:23 +00:00
Saleem Abdulrasool
fa770f8269 CodeGen: ignore DEBUG_VALUE nodes in KILL tagging
DEBUG_VALUE nodes do not take part in code generation.  Ignore them when
performing KILL updates.  Addresses PR23486.

llvm-svn: 237211
2015-05-12 23:36:18 +00:00
Chandler Carruth
a9a05bbdfe Revert r237175: [X86] Always return the sret parameter in eax/rax ...
This commit broke an x86 test and the bots have been broken for well
over an hour now so I'm just reverting.

llvm-svn: 237210
2015-05-12 23:34:27 +00:00
Chandler Carruth
e7ef149711 [Unrolling] Refactor the start and step offsets to simplify overflow
checking and make the cache faster and smaller.

I had thought that using an APInt here would be useful, but I think
I was just wrong. Notably, we don't have to do any fancy overflow
checking, we can just bound the values as quite small and do the math in
a higher precision integer. I've switched to a signed integer so that
UBSan will even point out if we ever have integer overflow. I've added
various asserts to try to catch things as well and hoisted the overflow
checks so that we just leave the too-large offsets out of the SCEV-GEP
cache. This makes the value in the cache quite a bit smaller which is
probably worthwhile.

No functionality changed here (for trip counts under 1 billion).

llvm-svn: 237209
2015-05-12 23:32:56 +00:00
Kostya Serebryany
4abd8e053b [lib/Fuzzer] A simple script to synchronise a fuzz test corpus with an external git repository.
llvm-svn: 237208
2015-05-12 23:19:12 +00:00
Eric Fiselier
f17438b6f2 Allow the CMake option 'LLVM_ABI_BREAKING_CHECKS' to be undefined.
When building libc++abi in a standalone configuration the CMake option
'LLVM_ABI_BREAKING_CHECKS` will not be defined.

llvm-svn: 237204
2015-05-12 22:49:18 +00:00
Bjorn Steinbrink
5a77ea6a17 CVP: Improve handling of Selects used as incoming PHI values
Summary:
If the branch that leads to the PHI node and the Select instruction
depend on correlated conditions, we might be able to directly use the
corresponding value from the Select instruction as the incoming value
for the PHI node, allowing later removal of the select instruction.

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D9051

llvm-svn: 237201
2015-05-12 22:31:47 +00:00
Philip Reames
8743850d34 [RewriteStatepointsForGC] Extend base pointer to handle more cases w/vectors
When relocating a pointer, we need to determine a base pointer for the derived pointer being relocated. We have limited support for handling a pointer extracted from a vector; the current code only handled the case where the entire vector was known to contain base pointers. This patch extends the reasoning to handle chains of insertelements where the indices are constants. This case turns out to be fairly common in vectorized code. We can now handle vectors which contains mixtures of base and derived pointers provided the insertelements use constant indices.

Note that this doesn't solve the general problem. To handle variable indexed insertelements, we'd need to scalarize and introduce conditional branching based on the index. Alternatively, we could eagerly scalarize, but the code structure doesn't currently make either fix easy. The patch also doesn't handle shufflevector or other vector manipulation for much the same reasons. I plan to defer this work until I have a motivating test case.

Differential Revision: http://reviews.llvm.org/D9676

llvm-svn: 237200
2015-05-12 22:19:52 +00:00
Kostya Serebryany
35ac844218 [lib/Fuzzer] use sha1sum for the file hash
llvm-svn: 237198
2015-05-12 22:03:34 +00:00
Diego Novillo
501a284115 Tidy comments in SampleProfile header. NFC.
llvm-svn: 237197
2015-05-12 22:03:00 +00:00
Justin Bogner
22bf2c55c0 [PlaceSafepoints] Add missing "override" to PlaceBackedgeSafepointsImpl::runOnFunction
Pointed out by -Winconsistent-missing-override.

llvm-svn: 237196
2015-05-12 21:49:47 +00:00
Richard Smith
1a7ba091af Add missing #include and forward decl, found by modules build.
llvm-svn: 237195
2015-05-12 21:49:03 +00:00
Arnold Schwaighofer
f4e875470e MergeFunctions: Two different sized allocas are *not* the same
llvm-svn: 237193
2015-05-12 21:42:22 +00:00
Pat Gavlin
ddd8c2aa5e [Statepoints] Clean up statepoint argument accessors.
Differential Revision: http://reviews.llvm.org/D9622

llvm-svn: 237191
2015-05-12 21:33:48 +00:00
Matthias Braun
552ff1fcaf Revert "ARM: Remove Itineraries for swift CPU"
Reverting until I figure out the new lit failures.

This reverts commit r237179.

llvm-svn: 237189
2015-05-12 21:28:39 +00:00
Justin Bogner
84e3d3eece InstrProf: Update name of compiler-rt routine for setting filename
Patch by Teresa Johnson.

llvm-svn: 237186
2015-05-12 21:23:09 +00:00
Philip Reames
13a05b861d [PlaceSafepoints] Switch to being a FunctionPass
The pass doesn't actually modify the module outside of the function being processed. The only confusing piece is that it both inserts calls and then inlines the resulting calls. Given that, it definitely invalidates module level analysis results, but many FunctionPasses do that.

Differential Revision: http://reviews.llvm.org/D9590

llvm-svn: 237185
2015-05-12 21:21:18 +00:00
Sanjay Patel
2d29322b81 fix formatting; NFC
llvm-svn: 237181
2015-05-12 21:14:24 +00:00
Philip Reames
5e2544e967 [PlaceSafepoints] Make internal helper pass a FunctionPass
Switch from using a LoopPass to using a FunctionPass for the internal helper analysis pass. The next step is going to be to make this a true analysis pass which is required by the PlaceSafepoints pass itself.

p.s. The interesting semantic part here is that we're changing the iteration order over the loops. It shouldn't matter, but that's the reason to separate this into it's own distinct patch.

Differential Revision: http://reviews.llvm.org/D9588

llvm-svn: 237180
2015-05-12 21:09:36 +00:00
Matthias Braun
9727b417a6 ARM: Remove Itineraries for swift CPU
They do more harm than good when used in the MachineScheduler as they
tend to take preference to register pressure minimsation which is more
important for swift.

Differential Revision: http://reviews.llvm.org/D9718

llvm-svn: 237179
2015-05-12 21:07:54 +00:00
Philip Reames
d57659d3ff [PlaceSafepoints] Use analysis infrastructure to get dominator tree
The old code computed dominators for every loop. This was terribly slow with no good reason. Just use the standard infrastructure for analysis passes.

Differential Revision: http://reviews.llvm.org/D9586

llvm-svn: 237176
2015-05-12 20:56:33 +00:00
Reid Kleckner
170b30ec78 [X86] Always return the sret parameter in eax/rax, even on 32-bit
Summary:
This rule was always in the old SysV i386 ABI docs and the new ones that
H.J. Lu has put together, but we never noticed:

  EAX   scratch register; also used to return integer and pointer values
        from functions; also stores the address of a returned struct or union

Fixes PR23491.

Reviewers: majnemer

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D9715

llvm-svn: 237175
2015-05-12 20:56:32 +00:00
Philip Reames
f225ca9875 [PlaceSafepoints] Remove dependence on LoopSimplify
As a step towards getting rid of internal pass manager hack entirely, remove the need for loop simplify to run in the inner pass manager. The new code does produce slightly different loop structures, so this isn't technically NFC.

Differential Revision: http://reviews.llvm.org/D9585

llvm-svn: 237172
2015-05-12 20:43:48 +00:00
Sundeep Kushwaha
033e3e3b61 [PATCH] [HEXAGON] Add a test program to verify calling convention
for large struct return by value.

Differential Revision: http://reviews.llvm.org/D9709

llvm-svn: 237170
2015-05-12 20:13:10 +00:00
Pete Cooper
cd94898d6b Convert PHI getIncomingValue() to foreach over incoming_values(). NFC.
We already had a method to iterate over all the incoming values of a PHI.  This just changes all eligible code to use it.

Ineligible code included anything which cared about the index, or was also trying to get the i'th incoming BB.

llvm-svn: 237169
2015-05-12 20:05:31 +00:00
Pete Cooper
7cfaf3624a Add a const method to iterator over PHI incoming values.
This will be used in the next commit which converts code to use incoming_values().

llvm-svn: 237168
2015-05-12 20:05:23 +00:00
Pete Cooper
c814950de5 Constify method. NFC
llvm-svn: 237167
2015-05-12 20:05:20 +00:00
Pat Gavlin
f7cb0841d2 [Statepoints] Split the calling convention and statepoint flags operand to STATEPOINT into two separate operands.
Differential Revision: http://reviews.llvm.org/D9623

llvm-svn: 237166
2015-05-12 19:50:19 +00:00
Douglas Katzman
0a133ecd6e Strip trailing whitespace. NFC
llvm-svn: 237165
2015-05-12 19:42:31 +00:00
Tom Stellard
fb19f812d7 R600/SI: Fix bug in VGPR spilling
AMDGPU::SI_SPILL_V96_RESTORE was missing from a switch statement, which
caused the srsrc and soffset register to not be set correctly.

This commit replaces the switch statement with a SITargetInfo query
to make sure all spill instructions are covered.

Differential Revision: http://reviews.llvm.org/D9582

llvm-svn: 237164
2015-05-12 18:59:17 +00:00
Kostya Serebryany
354905a212 [lib/Fuzzer] guess the right number of workers if -jobs=N is given but -workers=M is not. Update the docs.
llvm-svn: 237163
2015-05-12 18:51:57 +00:00
Alex Lorenz
6fa936282c Revert r237157, "YAML: Fix typos. NFC".
'Iff' isn't a typo, it's a shorthand for 'if and only if'.

llvm-svn: 237160
2015-05-12 17:44:32 +00:00
Jozef Kolek
9b82015a7b [mips][microMIPSr6] Implement SELEQZ and SELNEZ instructions
This patch implements SELEQZ and SELNEZ instructions using mapping.

Differential Revision: http://reviews.llvm.org/D8497

llvm-svn: 237158
2015-05-12 17:39:32 +00:00
Alex Lorenz
2cdff95250 YAML: Fix typos. NFC.
llvm-svn: 237157
2015-05-12 17:31:17 +00:00
Michael Zolotukhin
56e82e59ff Reimplement heuristic for estimating complete-unroll optimization effects.
Summary:
This patch reimplements heuristic that tries to estimate optimization beneftis
from complete loop unrolling.

In this patch I kept the minimal changes - e.g. I removed code handling
branches and folding compares. That's a promising area, but now there
are too many questions to discuss before we can enable it.

Test Plan: Tests are included in the patch.

Reviewers: hfinkel, chandlerc

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D8816

llvm-svn: 237156
2015-05-12 17:20:03 +00:00
Petar Jovanovic
bd0b851f88 [Mips] Return false for isFPCloseToIncomingSP()
On Mips, frame pointer points to the same side of the frame as the stack
pointer. This function is used to decide where to put register scavenging
spill slot. So far, it was put on the wrong side of the frame, and thus it
was too far away from $fp when frame was larger than 2^15 bytes.

Patch by Vladimir Radosavljevic.

http://reviews.llvm.org/D8895

llvm-svn: 237153
2015-05-12 17:14:05 +00:00
Tom Stellard
db0893e43a R600/SI: add pass to mark CF live ranges as non-spillable
Spilling can insert instructions almost anywhere, and this can mess
up control flow lowering in a multitude of ways, due to instruction
reordering. Let's sort this out the easy way: never spill registers
involved with control flow, i.e. saved EXEC masks.

Unfortunately, this does not work at all with optimizations disabled,
as the register allocator ignores spill weights. This should be
addressed in a future commit.

The test was reduced from the "stacks" shader of [1]. Some issues
trigger the machine verifier while another one is checked manually.

[1] http://madebyevan.com/webgl-path-tracing/

v2: only insert pass with optimizations enabled, merge test runs.

Patch by: Grigori Goronzy

llvm-svn: 237152
2015-05-12 17:13:02 +00:00