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29 Commits

Author SHA1 Message Date
Evan Cheng
0fb8a935a5 Re-apply 105308 with fix. 
llvm-svn: 105502
 2010-06-04 23:28:13 +00:00
Bob Wilson
15a21b6b97 Revert 105308. 
llvm-svn: 105399
 2010-06-03 18:28:31 +00:00
Evan Cheng
b137439a0a Enable machine cse of instructions which define physical registers. 
llvm-svn: 105308
 2010-06-02 01:08:27 +00:00
Eric Christopher
8f296fd844 Make this LookAheadLimit, not the uninitialized LookAheadLeft. 
Evan please verify!

llvm-svn: 104408
 2010-05-21 23:40:03 +00:00
Evan Cheng
6a0784954a Allow machine cse to cse instructions which define physical registers. Controlled by option -machine-cse-phys-defs. 
llvm-svn: 104385
 2010-05-21 21:22:19 +00:00
Dan Gohman
223379b3a9 Add a utility function for conservatively clearing kill flags, and make 
use of it in MachineCSE.

llvm-svn: 103726
 2010-05-13 19:24:00 +00:00
Evan Cheng
69142a2a6a Rewrite machine cse to avoid recursion. 
llvm-svn: 101964
 2010-04-21 00:21:07 +00:00
Evan Cheng
ebe1fbf676 Typo. 
llvm-svn: 101914
 2010-04-20 17:27:38 +00:00
Evan Cheng
921fc2c77b After trivial coalescing, the MI being visited may have become a copy. Avoid adding it to CSE hash table since copies aren't being considered for CSE and they may be deleted. 
rdar://7819990

llvm-svn: 100170
 2010-04-02 02:21:24 +00:00
Evan Cheng
3ae9b98d7f dbg_value may end a block. 
llvm-svn: 99378
 2010-03-24 01:50:28 +00:00
Evan Cheng
268e78cd66 Code clean up. 
llvm-svn: 99319
 2010-03-23 20:33:48 +00:00
Dale Johannesen
15ff882aa1 Fix debug_value handling. 
llvm-svn: 98224
 2010-03-11 02:10:24 +00:00
Evan Cheng
f75338cfcb Add a couple more heuristics to neuter machine cse some more. 
1. Be careful with cse "cheap" expressions. e.g. constant materialization. Only cse them when the common expression is local or in a direct predecessor. We don't want cse of cheap instruction causing other expressions to be spilled.
2. Watch out for the case where the expression doesn't itself uses a virtual register. e.g. lea of frame object. If the common expression itself is used by copies (common for passing addresses to function calls), don't perform the cse. Since these expressions do not use a register, it creates a live range but doesn't close any, we want to be very careful with increasing register pressure.

Note these are heuristics so machine cse doesn't make register allocator unhappy. Once we have proper live range splitting and re-materialization support in place, these should be evaluated again.

Now machine cse is almost always a win on llvm nightly tests on x86 and x86_64.

llvm-svn: 98121
 2010-03-10 02:12:03 +00:00
Evan Cheng
625a7248d6 Allow more cross-rc coalescing. 
llvm-svn: 98048
 2010-03-09 06:38:17 +00:00
Jakob Stoklund Olesen
cc6b4fdf11 Don't do illegal cross-class coalescing. 
llvm-svn: 98044
 2010-03-09 03:56:06 +00:00
Evan Cheng
8277a90f75 - Make the machine cse dumb coalescer (as opposed to the more awesome simple 
coalescer) handle sub-register classes.
- Add heuristics to avoid non-profitable cse. Given the current lack of live
  range splitting, avoid cse when an expression has PHI use and the would be
  new use is in a BB where the expression wasn't already being used.

llvm-svn: 98043
 2010-03-09 03:21:12 +00:00
Evan Cheng
8afdea401a Don't waste time trying to CSE labels, phis, inline asm. Definitely avoid cse implicit-def for obvious performance reason. 
llvm-svn: 98009
 2010-03-08 23:49:12 +00:00
Evan Cheng
ca86fb517c Restrict machine cse to really trivial coalescing. Leave the heavy lifting to a real coalescer. 
llvm-svn: 98007
 2010-03-08 23:28:08 +00:00
Evan Cheng
d8e0138666 Don't update physical register def. 
llvm-svn: 97861
 2010-03-06 01:14:19 +00:00
Evan Cheng
a9828532ff Avoid cse load instructions unless they are known to be invariant loads. 
llvm-svn: 97747
 2010-03-04 21:18:08 +00:00
Evan Cheng
9120412740 Look ahead a bit to determine if a physical register def that is not marked dead is really alive. This is necessary to catch a lot of common cse opportunities for targets like x86. 
llvm-svn: 97706
 2010-03-04 01:33:55 +00:00
Evan Cheng
9729f2a2b4 Fix a logic error. An instruction that has a live physical register def cannot be CSE'ed, but it *can* be used to replace a common subexpression. 
llvm-svn: 97688
 2010-03-03 23:59:08 +00:00
Evan Cheng
36a7a94029 Re-apply r97667 but with a little bit of thought put into the patch. This implements a special DenseMapInfo trait for DenseMap<MachineInstr*> that compare the value of the MachineInstr rather than the pointer value. Since the hashing and equality test functions ignore defs it's useful for doing CSE kind optimization. 
llvm-svn: 97678
 2010-03-03 23:27:36 +00:00
Dan Gohman
fe6b41169a Revert 97667. It broke a bunch of tests. 
llvm-svn: 97673
 2010-03-03 22:40:03 +00:00
Evan Cheng
338c7aed4c Move DenseMapInfo for MachineInstr* to MachineInstr.h 
llvm-svn: 97667
 2010-03-03 21:47:16 +00:00
Evan Cheng
918ac5d21f Machine CSE work in progress. It's doing some CSE now. But implicit def of physical registers are getting in the way. 
llvm-svn: 97664
 2010-03-03 21:20:05 +00:00
Evan Cheng
13f096bf0a Work in progress. Finding some cse now. 
llvm-svn: 97635
 2010-03-03 02:48:20 +00:00
Evan Cheng
e335555959 Fix typo. 
llvm-svn: 97577
 2010-03-02 19:02:27 +00:00
Evan Cheng
291c815b10 Add skeleton of a machine level cse pass. 
llvm-svn: 97543
 2010-03-02 02:38:24 +00:00