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Commit Graph

148099 Commits

Author SHA1 Message Date
Igor Breger
cab811c046 [GlobalISel][X86] Lower FormalArgument/Ret using G_MERGE_VALUES/G_UNMERGE_VALUES.
Summary: [GlobalISel][X86] Lower FormalArgument/Ret using G_MERGE_VALUES/G_UNMERGE_VALUES.

Reviewers: zvi, t.p.northover, guyblank

Reviewed By: t.p.northover

Subscribers: dberris, rovka, llvm-commits, kristof.beyls

Differential Revision: https://reviews.llvm.org/D32288

llvm-svn: 301194
2017-04-24 17:05:52 +00:00
Simon Pilgrim
f059a49a99 [DAGCombiner] Updated bswap byte offset variable names to be more descriptive. NFC
As discussed on D32039, use MaskByteOffset to describe the variable and also pull out repeated getOpcode() calls.

llvm-svn: 301193
2017-04-24 17:05:14 +00:00
Craig Topper
837e80758c [APInt] Fix repeated word in comments. NFC
llvm-svn: 301192
2017-04-24 17:00:22 +00:00
Nicolai Haehnle
6702dd6007 AMDGPU: Fix crash when scheduling non-memory SMRD instructions
Summary: Fixes piglit spec/arb_shader_clock/execution/*

Reviewers: arsenm

Subscribers: kzhuravl, wdng, yaxunl, dstuttard, tpr, llvm-commits, t-tye

Differential Revision: https://reviews.llvm.org/D32345

llvm-svn: 301191
2017-04-24 16:53:52 +00:00
Nirav Dave
9d339c0df1 [SDAG] Teach Chain Analysis about BaseIndexOffset addressing.
While we use BaseIndexOffset in FindBetterNeighborChains to
appropriately realize they're almost the same address and should be
improved concurrently we do not use it in isAlias using the non-index
understanding FindBaseOffset instead. Adding a BaseIndexOffset check
in isAlias like should allow indexed stores to be merged.

FindBaseOffset to be excised in subsequent patch.

Reviewers: jyknight, aditya_nandakumar, bogner

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D31987

llvm-svn: 301187
2017-04-24 15:37:20 +00:00
Simon Pilgrim
41069de7fd [X86][AVX] Add scheduling latency/throughput tests for missing AVX1 instructions
Had to split btver2/znver1 checks as only btver2 suppresses zeroupper

llvm-svn: 301181
2017-04-24 14:26:30 +00:00
Jonas Paulsson
a537a87015 [SystemZ] Update kill-flag in splitMove().
EarlierMI needs to clear the kill flag on the first operand in case of a store.

Review: Ulrich Weigand
llvm-svn: 301177
2017-04-24 12:40:28 +00:00
Renato Golin
c3541c9811 [DWARF] Move test to x86 directory
llvm-svn: 301176
2017-04-24 12:37:11 +00:00
Philip Pfaffe
07010fd961 [RegionInfo] Fix dangling references created by moving RegionInfo objects
Summary: Region objects capture the address of the creating RegionInfo instance. Because the RegionInfo class is movable, moving a RegionInfo object creates dangling references. This patch fixes these references by walking the Regions post-move, and updating references to the new parent.

Reviewers: Meinersbur, grosser

Reviewed By: Meinersbur, grosser

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D31719

llvm-svn: 301175
2017-04-24 11:54:37 +00:00
Ismail Donmez
3bfc0de252 Add SUSE vendor
Summary: SUSE's ARM triples end with -gnueabi even though they are hard-float. This requires special handling of SUSE ARM triples. Hence we need a way to differentiate the SUSE as vendor. This CL adds that.

Reviewers: chandlerc, compnerd, echristo, rengolin

Reviewed By: rengolin

Subscribers: aemerson, rengolin, llvm-commits

Differential Revision: https://reviews.llvm.org/D32426

llvm-svn: 301174
2017-04-24 11:18:29 +00:00
Nitesh Jain
e92b868df0 [LLVM][MIPS] Fix different definition of off_t in LLDB and LLVM.
Reviewers: beanz

Subscribers: jaydeep, bhushan, lldb-commits, slthakur, llvm-commits, krytarowski, emaste

Differential Revision: https://reviews.llvm.org/D32125

llvm-svn: 301171
2017-04-24 10:36:46 +00:00
George Rimar
6c607daa04 [DWARF] - Take relocations in account when extracting ranges from .debug_ranges
I found this when investigated "Bug 32319 - .gdb_index is broken/incomplete" for LLD.

When we have object file with .debug_ranges section it may be filled with zeroes.
Relocations are exist in file to relocate this zeroes into real values later, but until that
a pair of zeroes is treated as terminator. And DWARF parser thinks there is no ranges at all
when I am trying to collect address ranges for building .gdb_index.

Solution implemented in this patch is to take relocations in account when parsing ranges.

Differential revision: https://reviews.llvm.org/D32228

llvm-svn: 301170
2017-04-24 10:19:45 +00:00
Diana Picus
a6fb1a669d [ARM] GlobalISel: Legalize s8 and s16 G_(S|U)DIV
We have to widen the operands to 32 bits and then we can either use
hardware division if it is available or lower to a libcall otherwise.

At the moment it is not enough to set the Legalizer action to
WidenScalar, since for libcalls it won't know what to do (it won't be
able to find what size to widen to, because it will find Libcall and not
Legal for 32 bits). To hack around this limitation, we request Custom
lowering, and as part of that we widen first and then we run another
legalizeInstrStep on the widened DIV.

llvm-svn: 301166
2017-04-24 09:12:19 +00:00
Sjoerd Meijer
02cf92d4d2 [Arch64AsmParser] better diagnostic for isb
Instruction isb takes as an operand either 'sy' or an immediate value. This
improves the diagnostic when the string is not 'sy' and adds a test case for
this which was missing. This also adds tests to check invalid inputs for dsb
and dmb.

Differential Revision: https://reviews.llvm.org/D32227

llvm-svn: 301165
2017-04-24 08:22:20 +00:00
Diana Picus
d55c2f0219 [ARM] GlobalISel: Support G_(S|U)DIV for s32
Add support for both targets with hardware division and without. For
hardware division we have to add support throughout the pipeline
(legalizer, reg bank select, instruction select). For targets without
hardware division, we only need to mark it as a libcall.

llvm-svn: 301164
2017-04-24 08:20:05 +00:00
Diana Picus
ceecfefcd4 [GlobalISel] Legalize G_(S|U)DIV libcalls
Treat them the same as the other binary operations that we have so far,
but on integers rather than floating point types. Extract the common
code into a helper.

This will be used in the ARM backend.

llvm-svn: 301163
2017-04-24 07:22:31 +00:00
Diana Picus
e0d798c47c [ARM] GlobalISel: Select G_CONSTANT with CImm operands
When selecting a G_CONSTANT to a MOVi, we need the value to be an Imm
operand. We used to just leave the G_CONSTANT operand unchanged, which
works in some cases (such as the GEP offsets that we create when
referring to stack slots). However, in many other places the G_CONSTANTs
are created with CImm operands. This patch makes sure to handle those as
well, and to error out gracefully if in the end we don't end up with an
Imm operand.

Thanks to Oliver Stannard for reporting this issue.

llvm-svn: 301162
2017-04-24 06:30:56 +00:00
Dean Michael Berris
2cd18f19be [XRay][tools] Fixup for pedantic and permissive errors/warnings
Remove extraneous semicolons and fully qualify the Trace type.

Follow-up to D29320.

llvm-svn: 301161
2017-04-24 06:15:53 +00:00
Dean Michael Berris
4e65f702e9 [XRay] A tool for Comparing xray function call graphs
Summary:
This is a tool for comparing the function graphs produced by the
llvm-xray graph too. It takes the form of a new subcommand of the
llvm-xray tool 'graph-diff'.

This initial version of the patch is very rough, but it is close to
feature complete.

Depends on D29363

Reviewers: dblaikie, dberris

Reviewed By: dberris

Subscribers: mgorny, llvm-commits

Differential Revision: https://reviews.llvm.org/D29320

llvm-svn: 301160
2017-04-24 05:54:33 +00:00
Craig Topper
09abb62b5d [APInt] Make behavior of ashr by BitWidth consistent between single and multi word.
Previously single word would always return 0 regardless of the original sign. Multi word would return all 0s or all 1s based on the original sign. Now single word takes into account the sign as well.

llvm-svn: 301159
2017-04-24 05:38:26 +00:00
Frederich Munch
f258c34ec2 Revert "Refactor DynamicLibrary so searching for a symbol will have a defined order.”
The changes are causing the i686-mingw32 build to fail.

This reverts commit r301153, and the changes for a separate warning on i686-mingw32 in r301155  and r301156.

llvm-svn: 301157
2017-04-24 03:33:30 +00:00
Frederich Munch
4c356cc43d Fix warning converting from boolean to pointer introduced in r301153.
This reverts commit r301155, which was incorrect.

llvm-svn: 301156
2017-04-24 03:12:16 +00:00
Frederich Munch
5f12ec7493 Fix warning converting from void* to boolean introduced in r301153.
llvm-svn: 301155
2017-04-24 02:51:40 +00:00
Sanjoy Das
1ed5e1a318 Revert "[SCEV] Enable SCEV verification by default in EXPENSIVE_CHECKS builds"
This reverts commit r301150.  It breaks CodeGen/Hexagon/hwloop-wrap2.ll, reverting
while I investigate.

llvm-svn: 301154
2017-04-24 02:35:19 +00:00
Frederich Munch
f573935fa8 Refactor DynamicLibrary so searching for a symbol will have a defined order and
libraries are properly unloaded when llvm_shutdown is called.

Summary:
This was mostly affecting usage of the JIT, where storing the library handles in
a set made iteration unordered/undefined. This lead to disagreement between the
JIT and native code as to what the address and implementation of particularly on
Windows with stdlib functions:

JIT: putenv_s("TEST", "VALUE") // called msvcrt.dll, putenv_s
JIT: getenv("TEST") -> "VALUE" // called msvcrt.dll, getenv
Native: getenv("TEST") -> NULL // called ucrt.dll, getenv

Also fixed is the issue of DynamicLibrary::getPermanentLibrary(0,0) on Windows
not giving priority to the process' symbols as it did on Unix.

Reviewers: chapuni, v.g.vassilev, lhames

Reviewed By: lhames

Subscribers: danalbert, srhines, mgorny, vsk, llvm-commits

Differential Revision: https://reviews.llvm.org/D30107

llvm-svn: 301153
2017-04-24 02:30:12 +00:00
Lang Hames
465dcf977f [Orc] Fix a warning by removing an unused lambda capture.
llvm-svn: 301152
2017-04-24 01:21:23 +00:00
Sanjoy Das
dba0b2f0a6 Fix unused variables / fields warnings in release builds
llvm-svn: 301151
2017-04-24 00:46:40 +00:00
Sanjoy Das
c57af6bcec [SCEV] Enable SCEV verification by default in EXPENSIVE_CHECKS builds
llvm-svn: 301150
2017-04-24 00:41:58 +00:00
Sanjoy Das
4248d2608d [SCEV] Fix exponential time complexity by caching
llvm-svn: 301149
2017-04-24 00:09:46 +00:00
Xinliang David Li
6667c7a71e [PartialInine]: add triaging options
There are more bugs (runtime failures) triggered when partial
inlining is turned on. Add options to help triaging problems.

llvm-svn: 301148
2017-04-23 23:39:04 +00:00
Lang Hames
1df976be58 [Orc] Use recursive mutexes for Error serialization.
Errors can be nested, so we need recursive locking for serialization /
deserialization.

llvm-svn: 301147
2017-04-23 23:36:13 +00:00
Sanjoy Das
bb0d5dcd12 [SCEV] Move towards a verifier without false positives
This change reboots SCEV's current (off by default) verification logic
to avoid false failures.  Instead of stringifying trip counts, it maps
old and new trip counts to the same ScalarEvolution "universe" and
asks ScalarEvolution to compute the difference between them.  If the
difference comes out to be a non-zero constant, then (barring some
corner cases) we *know* we messed up.

I've not yet enabled this by default since it hits an exponential time
issue in SCEV, but once I fix that, I'll flip it on by default in
EXPENSIVE_CHECKS builds.

llvm-svn: 301146
2017-04-23 23:04:45 +00:00
Simon Pilgrim
e271b29b6c [X86][AVX] Add scheduling latency/throughput tests for some AVX1 instructions
More instructions will be added in future commits

llvm-svn: 301145
2017-04-23 22:08:17 +00:00
Sanjay Patel
e588bc6051 [InstCombine] add/move folds for [not]-xor
We handled all of the commuted variants for plain xor already,
although they were scattered around and sometimes folded less
efficiently using distributive laws. We had no folds for not-xor.

Handling all of these patterns consistently is part of trying to 
reinstate:
https://reviews.llvm.org/rL300977

llvm-svn: 301144
2017-04-23 22:00:02 +00:00
Xinliang David Li
1831498677 [PartialInlining] Add optimization remark support
Differential Revision: http://reviews.llvm.org/D32387

llvm-svn: 301143
2017-04-23 21:40:58 +00:00
Simon Pilgrim
ecc6705135 [X86][SSE] Add scheduler class support for SSE42 (PCMPGT) instructions
llvm-svn: 301142
2017-04-23 21:23:27 +00:00
Simon Pilgrim
2398eb0f11 [X86][SSE] Add scheduling latency/throughput tests for (most) SSE42 instructions
llvm-svn: 301141
2017-04-23 21:00:25 +00:00
Sanjay Patel
f3994ea6e0 [InstCombine] add tests for not-xor and remove redundant tests; NFC
llvm-svn: 301140
2017-04-23 20:59:00 +00:00
Xin Tong
7ecccb8fa5 [JumpThread] We want to fold (not thread) when all predecessor go to single BB's successor.
Summary:
In case all predecessor go to a single successor of current BB. We want to fold (not thread).

I failed to update the phi nodes properly in the last patch https://reviews.llvm.org/rL300657.

Phi nodes values are per predecessor in LLVM.

Reviewers: sanjoy

Reviewed By: sanjoy

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D32400

llvm-svn: 301139
2017-04-23 20:56:29 +00:00
Simon Pilgrim
8d4f151d43 [X86][SSE] Add scheduling latency/throughput tests for (most) SSE41 instructions
llvm-svn: 301137
2017-04-23 20:05:21 +00:00
Simon Pilgrim
8057e39265 [X86][SSE] Add missing scheduling latency/throughput test for PINSRW
llvm-svn: 301136
2017-04-23 19:56:49 +00:00
Xin Tong
5f61c231a3 Correct grammar. NFC
llvm-svn: 301135
2017-04-23 17:36:25 +00:00
Craig Topper
72d61a457f [APInt] Make clearUnusedBits branch free.
This makes the WordBits calculation calculate a value between 1 and 64 for the number of bits in the last word. Previously if the BitWidth was a multiple of 64 bits the WordBits value was 0 and we had to bail out early to avoid an undefined shift. Now with a value of 64 we no longer have an undefined shift issue.

This shows a 15-16k reduction in the size of the opt binary on my local x86-64 build.

llvm-svn: 301134
2017-04-23 17:16:26 +00:00
Craig Topper
976b7b2cf5 [APInt] In sext single word case, use SignExtend64 and let the APInt constructor mask off any excess bits.
The current code is trying to be clever with shifts to avoid needing to clear unused bits. But it looks like the compiler is unable to optimize out the unused bit handling in the APInt constructor. Given this its better to just use SignExtend64 and have more readable code.

llvm-svn: 301133
2017-04-23 17:16:24 +00:00
Sanjay Patel
d4fdc9c84f [InstCombine] add tests for or-to-xor; NFC
llvm-svn: 301131
2017-04-23 16:37:36 +00:00
Sanjay Patel
1b2ac9d42a [InstCombine] add pattern matches for commuted variants of xor-to-xor
There's probably some better way to write this that eliminates the
code duplication without hurting readability, but at least this
eliminates the logic holes and is hopefully slightly more efficient
than creating new instructions.

llvm-svn: 301129
2017-04-23 16:03:00 +00:00
Sanjay Patel
8ce55e5408 [InstCombine] add tests for xor-to-xor; NFC
Besides missing 2 commuted patterns, the way we handle these folds is inefficient.

llvm-svn: 301128
2017-04-23 14:51:03 +00:00
Simon Pilgrim
1880f3a51b [X86][SSE] Add scheduling latency/throughput tests for SSSE3 instructions
llvm-svn: 301127
2017-04-23 14:01:55 +00:00
Simon Pilgrim
d982b4748e [X86][SSE] Add scheduling latency/throughput tests for SSE3 instructions
llvm-svn: 301126
2017-04-23 13:59:29 +00:00
Sanjay Patel
aa7c20c0c0 [InstCombine] add tests for add-to-xor commuted variants; NFC
1 out of the 4 tests commuted the operands, so there's an asymmetry
somewhere under this in how we handle these transforms.

llvm-svn: 301125
2017-04-23 13:37:05 +00:00