Jakob Stoklund Olesen
44949b2e1b
Remove the isMoveInstr() hook.
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llvm-svn: 108567
2010-07-16 22:35:46 +00:00
Jakob Stoklund Olesen
7af3eff94d
RISC architectures get their memory operand folding for free.
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The only folding these load/store architectures can do is converting COPY into a
load or store, and the target independent part of foldMemoryOperand already
knows how to do that.
llvm-svn: 108099
2010-07-11 19:19:13 +00:00
Jakob Stoklund Olesen
0fc69a96b7
Replace copyRegToReg with copyPhysReg for Alpha.
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llvm-svn: 108065
2010-07-11 01:08:23 +00:00
Stuart Hastings
bd7194d21c
Add a DebugLoc parameter to TargetInstrInfo::InsertBranch(). This
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addresses a longstanding deficiency noted in many FIXMEs scattered
across all the targets.
This effectively moves the problem up one level, replacing eleven
FIXMEs in the targets with eight FIXMEs in CodeGen, plus one path
through FastISel where we actually supply a DebugLoc, fixing Radar
7421831.
llvm-svn: 106243
2010-06-17 22:43:56 +00:00
Dan Gohman
497e752655
Add a DebugLoc argument to TargetInstrInfo::copyRegToReg, so that it
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doesn't have to guess.
llvm-svn: 103194
2010-05-06 20:33:48 +00:00
Evan Cheng
80f3051bb7
Add argument TargetRegisterInfo to loadRegFromStackSlot and storeRegToStackSlot.
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llvm-svn: 103193
2010-05-06 19:06:44 +00:00
Dan Gohman
f9654e9258
Remove the target hook TargetInstrInfo::BlockHasNoFallThrough in favor of
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MachineBasicBlock::canFallThrough(), which is target-independent and more
thorough.
llvm-svn: 90634
2009-12-05 00:44:40 +00:00
Eli Friedman
1be7dfb1aa
Remove unused member functions.
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llvm-svn: 76960
2009-07-24 07:43:59 +00:00
Dan Gohman
fcdb0d4193
Convert Alpha and Mips to use a MachineFunctionInfo subclass to
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carry GlobalBaseReg, and GlobalRetAddr too in Alpha's case. This
eliminates the need for them to search through the
MachineRegisterInfo livein list in order to identify these
virtual registers. EmitLiveInCopies is now the only user of the
virtual register portion of MachineRegisterInfo's livein data.
llvm-svn: 72802
2009-06-03 20:30:14 +00:00
Evan Cheng
9dc1507838
Turns out AnalyzeBranch can modify the mbb being analyzed. This is a nasty
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suprise to some callers, e.g. register coalescer. For now, add an parameter
that tells AnalyzeBranch whether it's safe to modify the mbb. A better
solution is out there, but I don't have time to deal with it right now.
llvm-svn: 64124
2009-02-09 07:14:22 +00:00
Evan Cheng
b3c82db63d
Change TargetInstrInfo::isMoveInstr to return source and destination sub-register indices as well.
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llvm-svn: 62600
2009-01-20 19:12:24 +00:00
Dan Gohman
74529a2226
Split foldMemoryOperand into public non-virtual and protected virtual
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parts, and add target-independent code to add/preserve
MachineMemOperands.
llvm-svn: 60488
2008-12-03 18:43:12 +00:00
Dan Gohman
04e99d0f3f
Add more const qualifiers. This fixes build breakage from r59540.
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llvm-svn: 59542
2008-11-18 19:49:32 +00:00
Dan Gohman
86527c1834
Const-ify several TargetInstrInfo methods.
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llvm-svn: 57622
2008-10-16 01:49:15 +00:00
Owen Anderson
5fef19facf
Make TargetInstrInfo::copyRegToReg return a bool indicating whether the copy requested
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was inserted or not. This allows bitcast in fast isel to properly handle the case
where an appropriate reg-to-reg copy is not available.
llvm-svn: 55375
2008-08-26 18:03:31 +00:00
Owen Anderson
600a8ca0d5
Convert uses of std::vector in TargetInstrInfo to SmallVector. This change had to be propoagated down into all the targets and up into all clients of this API.
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llvm-svn: 54802
2008-08-14 22:49:33 +00:00
Dan Gohman
f9d5689496
Change target-specific classes to use more precise static types.
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This eliminates the need for several awkward casts, including
the last dynamic_cast under lib/Target.
llvm-svn: 51091
2008-05-14 01:58:56 +00:00
Dan Gohman
cabaec582f
Rename MRegisterInfo to TargetRegisterInfo.
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llvm-svn: 46930
2008-02-10 18:45:23 +00:00
Evan Cheng
90f03a0b88
It's not always safe to fold movsd into xorpd, etc. Check the alignment of the load address first to make sure it's 16 byte aligned.
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llvm-svn: 46893
2008-02-08 21:20:40 +00:00
Owen Anderson
f19692b2f6
Move even more functionality from MRegisterInfo into TargetInstrInfo.
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Some day I'll get it all moved over...
llvm-svn: 45672
2008-01-07 01:35:02 +00:00
Owen Anderson
e6856128ab
Move some more instruction creation methods from RegisterInfo into InstrInfo.
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llvm-svn: 45484
2008-01-01 21:11:32 +00:00
Chris Lattner
1285ec2ae7
Fix a problem where lib/Target/TargetInstrInfo.h would include and use
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a header file from libcodegen. This violates a layering order: codegen
depends on target, not the other way around. The fix to this is to
split TII into two classes, TII and TargetInstrInfoImpl, which defines
stuff that depends on libcodegen. It is defined in libcodegen, where
the base is not.
llvm-svn: 45475
2008-01-01 01:03:04 +00:00
Owen Anderson
ae7e2c1e03
Move copyRegToReg from MRegisterInfo to TargetInstrInfo. This is part of the
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Machine-level API cleanup instigated by Chris.
llvm-svn: 45470
2007-12-31 06:32:00 +00:00
Chris Lattner
ad9a6ccb83
Remove attribution from file headers, per discussion on llvmdev.
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llvm-svn: 45418
2007-12-29 20:36:04 +00:00
Evan Cheng
234aab208a
RemoveBranch() and InsertBranch() now returns number of instructions deleted / inserted.
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llvm-svn: 37192
2007-05-18 00:05:48 +00:00
Andrew Lenharth
c4f8836525
Add all that branch mangling niftiness
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llvm-svn: 31313
2006-10-31 16:49:55 +00:00
Chris Lattner
27b79c117a
implement uncond branch insertion so alpha works work branchfolding.
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llvm-svn: 31158
2006-10-24 16:41:36 +00:00
Andrew Lenharth
c879542ab0
isStoreToStackSlot
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llvm-svn: 25925
2006-02-03 03:07:37 +00:00
Chris Lattner
15cb732cd7
Move isLoadFrom/StoreToStackSlot from MRegisterInfo to TargetInstrInfo,a far more logical place. Other methods should also be moved if anyoneis interested. :)
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llvm-svn: 25913
2006-02-02 20:12:32 +00:00
Misha Brukman
1fdf39f2ea
Remove trailing whitespace
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llvm-svn: 21424
2005-04-21 23:13:11 +00:00
Misha Brukman
74be40e1d2
Make file header comment consistent: extend the whole 80 cols to fill the line
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llvm-svn: 20039
2005-02-04 20:25:52 +00:00
Andrew Lenharth
f5b9a8fe57
Let me introduce you to the early stages of the llvm backend for the alpha processor
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llvm-svn: 19764
2005-01-22 23:41:55 +00:00