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2 Commits

Author SHA1 Message Date
Cameron Zwarich
c05412175e Split a store of a VMOVDRR into two integer stores to avoid mixing NEON and ARM 
stores of arguments in the same cache line. This fixes the second half of
<rdar://problem/8674845>.

llvm-svn: 129345
 2011-04-12 02:24:17 +00:00
Cameron Zwarich
9573b6277e Do some peephole optimizations to remove pointless VMOVs from Neon to integer 
registers that arise from argument shuffling with the soft float ABI. These
instructions are particularly slow on Cortex A8. This fixes one half of
<rdar://problem/8674845>.

llvm-svn: 128759
 2011-04-02 02:40:43 +00:00