Andrew Lenharth
87cf023175
stack and rpcc
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llvm-svn: 25369
2006-01-16 21:22:38 +00:00
Andrew Lenharth
33a683c939
Move brcond over and fix some imm patterns. This may be the last change before changing the default alpha isel.
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llvm-svn: 25057
2006-01-01 22:16:14 +00:00
Andrew Lenharth
f8a6d19367
add br pattern, unify JSR and BSR ISel instrs, and add BSR support for DAG
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llvm-svn: 25011
2005-12-25 17:36:48 +00:00
Andrew Lenharth
588bd3f659
Unify the patterns for loads and stores. Now offset addressing should be
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supported. This almost completes memory operations.
llvm-svn: 25002
2005-12-24 07:34:33 +00:00
Andrew Lenharth
5ce2a6c2cf
move loads and stores over. Smart addr selection comming
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llvm-svn: 25000
2005-12-24 03:41:56 +00:00
Andrew Lenharth
b294ecae1b
OK, this does wonders for broken stuff
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llvm-svn: 24624
2005-12-06 20:40:34 +00:00
Andrew Lenharth
b86d70f50a
added instructions with inverted immediates
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llvm-svn: 24614
2005-12-06 00:33:53 +00:00
Andrew Lenharth
0fdfe40762
These never trigger, but whatever
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llvm-svn: 24612
2005-12-05 23:19:44 +00:00
Andrew Lenharth
dd3477b285
All sorts of stuff.
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Getting in on the custom lowering thing, yay
evilness with fp setcc, yuck
trivial int select, hmmm
in memory args for functions, yay
DIV and REM, always handy. They should be custom lowered though.
Lots more stuff compiles now (go go single source!). Of course, none of it
probably works, but that is what the nightly tester can find out :)
llvm-svn: 24533
2005-11-30 07:19:56 +00:00
Andrew Lenharth
33e8022557
massive DAGISel patch. lots and lots more stuff compiles now
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llvm-svn: 24483
2005-11-22 04:20:06 +00:00
Andrew Lenharth
dca2f13e76
continued readcyclecounter support
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llvm-svn: 24300
2005-11-11 16:47:30 +00:00
Andrew Lenharth
1acb71df32
whatever. Intermediate patch to see what breaks. Seems ok.
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llvm-svn: 24260
2005-11-09 19:17:08 +00:00
Andrew Lenharth
de7df19b83
Simplify instinfo, set random bits on more fp insts, and fix 1 opcode
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llvm-svn: 24014
2005-10-26 17:41:46 +00:00
Andrew Lenharth
4d5b664423
Well, the Constant matching pattern works. Can't say much about calls or globals yet.
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llvm-svn: 23884
2005-10-22 22:06:58 +00:00
Andrew Lenharth
065fe477eb
Inst cleanup. As a bonus, operands are in the correct order for cmovs. Expect new stuff to pass in the JIT tonight
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llvm-svn: 23852
2005-10-20 23:58:36 +00:00
Andrew Lenharth
0856abb644
added a few 1 operand form stuff. Seems to break regalloc on alpha. sigh
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llvm-svn: 23849
2005-10-20 19:39:24 +00:00
Andrew Lenharth
a7554852b3
ret 0; works, not much else
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still lots of uglyness.
Maybe calls will come soon.
Fixing the return value of things will be necessary to make alpha work.
llvm-svn: 23832
2005-10-20 00:28:31 +00:00
Andrew Lenharth
0fcc129f80
support bsr, and more .td simplification
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llvm-svn: 22543
2005-07-28 18:14:47 +00:00
Andrew Lenharth
653f21b2cd
simpilfy instruction encoding (and make the lines way shorter, aka Misha happification)
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llvm-svn: 22499
2005-07-22 20:50:29 +00:00
Misha Brukman
75da90f127
Make the rest of file header comments consistent in format and style
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llvm-svn: 20048
2005-02-05 02:24:26 +00:00
Andrew Lenharth
1f0b710fb6
initial fp support
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llvm-svn: 19847
2005-01-26 21:54:09 +00:00
Andrew Lenharth
3b44cfa26d
Clean ups, and taught the instruction selector about immediate forms
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llvm-svn: 19816
2005-01-24 19:44:07 +00:00
Andrew Lenharth
f5b9a8fe57
Let me introduce you to the early stages of the llvm backend for the alpha processor
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llvm-svn: 19764
2005-01-22 23:41:55 +00:00
