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514 Commits

Author SHA1 Message Date
Evan Cheng
d9bab93a44 If both parts of smul_lohi, etc. are used, don't simplify. If only one part is used, try simplify it. 
llvm-svn: 43888
 2007-11-08 09:25:29 +00:00
Evan Cheng
3764ad2bac Add pseudo dependency to force two-address instruction to be scheduled after 
other uses. There was a overly restricted check that prevented some obvious
cases.

llvm-svn: 43762
 2007-11-06 08:44:59 +00:00
Dan Gohman
6255ce9f5d Add support for vector remainder operations. 
llvm-svn: 43744
 2007-11-05 23:35:22 +00:00
Dale Johannesen
1f70f86c7a Make labels work in asm blocks; allow labels as 
parameters.  Rename ValueRefList to ParamList
in AsmParser, since its only use is for parameters.

llvm-svn: 43734
 2007-11-05 21:20:28 +00:00
Lauro Ramos Venancio
f5081ba980 [ARM] Fix code generation for: 
static __thread struct {
    int a;
    int b;
} teste = {0, 0};

llvm-svn: 43722
 2007-11-05 18:33:37 +00:00
Evan Cheng
28c61e33a4 Skip over deleted val#'s. 
llvm-svn: 43700
 2007-11-05 06:46:45 +00:00
Evan Cheng
e5eac2c5ac Handle cases where a register and one of its super-register are both marked as 
defined on the same instruction. This fixes PR1767.

llvm-svn: 43699
 2007-11-05 03:11:55 +00:00
Evan Cheng
bc39e175c4 Fix test case. Chris didn't do make check. :-) 
llvm-svn: 43698
 2007-11-05 03:04:26 +00:00
Evan Cheng
947c271e37 Doh. PR1187 -> PR1766. 
llvm-svn: 43693
 2007-11-05 01:00:44 +00:00
Evan Cheng
13d79ab67a Fix PR1187. 
llvm-svn: 43692
 2007-11-05 00:59:10 +00:00
Chris Lattner
8fac63c8b5 Fix PR1761 by not printing (rip) suffix when in -static mode. 
Evan, please review this.

llvm-svn: 43680
 2007-11-04 19:23:28 +00:00
Chris Lattner
67cd357fb8 Fix PR1763 by allowing the 'q' constraint to work with 64-bit 
regs on x86-64.

llvm-svn: 43669
 2007-11-04 06:51:12 +00:00
Evan Cheng
1771f6da9c There are times when the coalescer would not coalesce away a copy but the copy 
can be eliminated by the allocator is the destination and source targets the
same register. The most common case is when the source and destination registers
are in different class. For example, on x86 mov32to32_ targets GR32_ which
contains a subset of the registers in GR32.

The allocator can do 2 things:
1. Set the preferred allocation for the destination of a copy to that of its source.
2. After allocation is done, change the allocation of a copy destination (if
   legal) so the copy can be eliminated.

This eliminates 443 extra moves from 403.gcc.

llvm-svn: 43662
 2007-11-03 07:20:12 +00:00
Evan Cheng
8d473f667d Add run line. 
llvm-svn: 43645
 2007-11-02 17:36:58 +00:00
Evan Cheng
65a07e73e2 One more extract_subreg coalescing bug. 
llvm-svn: 43644
 2007-11-02 17:35:08 +00:00
Evan Cheng
b50cc64eb0 Missing a getNumOperands check. 
llvm-svn: 43630
 2007-11-02 01:26:22 +00:00
Dale Johannesen
c125d9b4e8 Test that expand_vector_elt(v2i64) works in 32-bit mode. 
llvm-svn: 43598
 2007-11-01 02:38:24 +00:00
Evan Cheng
5e058e94b5 It's not safe to tell SplitCriticalEdge to merge identical edges. It may delete the phi instruction that's being processed. 
llvm-svn: 43524
 2007-10-30 22:27:26 +00:00
Evan Cheng
633cd3e84d - Bug fixes. 
- Allow icmp rewrite using an iv / stride of a smaller integer type.

llvm-svn: 43480
 2007-10-29 22:07:18 +00:00
Dan Gohman
02b8beff5f Fix a DAGCombiner abort on a bitcast from a scalar to a vector. 
llvm-svn: 43470
 2007-10-29 20:44:42 +00:00
Evan Cheng
5fe81cf64e Enable more fold (sext (load x)) -> (sext (truncate (sextload x))) 
transformation. Previously, it's restricted by ensuring the number of load uses
is one. Now the restriction is loosened up by allowing setcc uses to be
"extended" (e.g. setcc x, c, eq -> setcc sext(x), sext(c), eq).

llvm-svn: 43465
 2007-10-29 19:58:20 +00:00
Chris Lattner
1503362624 Add support for the x86-64 'q' regigster modifier, and add support for the 
b/h/w/k/q inline asm memory modifiers, which are just ignored.  This fixes
PR1748 and CodeGen/X86/2007-10-28-inlineasm-q-modifier.ll

llvm-svn: 43430
 2007-10-29 03:09:07 +00:00
Bill Wendling
18b6321020 On second thought. Remove this as it should never be generated in the first 
place.

llvm-svn: 43400
 2007-10-26 20:34:37 +00:00
Bill Wendling
8d329ff809 - Remove the hacky code that forces a memcpy. Alignment is taken care of in the 
FE.
- Explicitly pass in the alignment of the load & store.
- XFAIL 2007-10-23-UnalignedMemcpy.ll because llc has a bug that crashes on
  unaligned pointers.

llvm-svn: 43398
 2007-10-26 20:24:42 +00:00
Evan Cheng
53696b7e9f Loosen up iv reuse to allow reuse of the same stride but a larger type when truncating from the larger type to smaller type is free. 
e.g.
Turns this loop:
LBB1_1: # entry.bb_crit_edge
        xorl    %ecx, %ecx
        xorw    %dx, %dx
        movw    %dx, %si
LBB1_2: # bb
        movl    L_X$non_lazy_ptr, %edi
        movw    %si, (%edi)
        movl    L_Y$non_lazy_ptr, %edi
        movw    %dx, (%edi)
		addw    $4, %dx
		incw    %si
		incl    %ecx
		cmpl    %eax, %ecx
		jne     LBB1_2  # bb
	
into

LBB1_1: # entry.bb_crit_edge
        xorl    %ecx, %ecx
        xorw    %dx, %dx
LBB1_2: # bb
        movl    L_X$non_lazy_ptr, %esi
        movw    %cx, (%esi)
        movl    L_Y$non_lazy_ptr, %esi
        movw    %dx, (%esi)
        addw    $4, %dx
		incl    %ecx
        cmpl    %eax, %ecx
        jne     LBB1_2  # bb

llvm-svn: 43375
 2007-10-26 01:56:11 +00:00
Evan Cheng
66cbf54030 If a loop termination compare instruction is the only use of its stride, 
and the compaison is against a constant value, try eliminate the stride
by moving the compare instruction to another stride and change its
constant operand accordingly. e.g.

loop:
...
v1 = v1 + 3
v2 = v2 + 1
if (v2 < 10) goto loop
=>
loop:
...
v1 = v1 + 3
if (v1 < 30) goto loop

llvm-svn: 43336
 2007-10-25 09:11:16 +00:00
Dale Johannesen
402c11966a This was failing on Darwin, which defaults to PIC; 
no lea was generated.  I think this follows the intent.

llvm-svn: 43312
 2007-10-24 20:58:14 +00:00
Bill Wendling
a420d660c8 If there's an unaligned memcpy to/from the stack, don't lower it. Just call the 
memcpy library function instead.

llvm-svn: 43270
 2007-10-23 23:32:40 +00:00
Evan Cheng
0590c75f18 Temporary solution: added a different set of BCTRL_Macho / BCTRL_ELF with right callee-saved defs set for ppc64. 
llvm-svn: 43248
 2007-10-23 06:42:42 +00:00
Evan Cheng
252d9ddb4d Fix memcpy lowering when addresses are 4-byte aligned but size is not multiple of 4. 
llvm-svn: 43234
 2007-10-22 22:11:27 +00:00
Dan Gohman
df1f166e4a Strength reduction improvements. 
- Avoid attempting stride-reuse in the case that there are users that
   aren't addresses. In that case, there will be places where the
   multiplications won't be folded away, so it's better to try to
   strength-reduce them.

 - Several SSE intrinsics have operands that strength-reduction can
   treat as addresses. The previous item makes this more visible, as
   any non-address use of an IV can inhibit stride-reuse.

 - Make ValidStride aware of whether there's likely to be a base
   register in the address computation. This prevents it from thinking
   that things like stride 9 are valid on x86 when the base register is
   already occupied.

Also, XFAIL the 2007-08-10-LEA16Use32.ll test; the new logic to avoid
stride-reuse elimintes the LEA in the loop, so the test is no longer
testing what it was intended to test.

llvm-svn: 43231
 2007-10-22 20:40:42 +00:00
Dan Gohman
76e104c8ad Fix the folding of multiplication into addresses on x86, which was broken 
by the recent {U,S}MUL_LOHI changes.

llvm-svn: 43230
 2007-10-22 20:22:24 +00:00
Evan Cheng
85eb733eff Use ptr type in the immediate field of a BxA instruction so we don't end up selecting 32-bit call instruction for ppc64. 
llvm-svn: 43228
 2007-10-22 19:46:19 +00:00
Evan Cheng
2d53c3f15e New test case. 
llvm-svn: 43193
 2007-10-19 22:05:00 +00:00
Rafael Espindola
2b5b200b9f Test byval with a 8 bit aligned struct 
llvm-svn: 43173
 2007-10-19 11:29:21 +00:00
Rafael Espindola
d8d4372845 Add support for byval function whose argument is not 32 bit aligned. 
To do this it is necessary to add a "always inline" argument to the
memcpy node. For completeness I have also added this node to memmove
and memset.  I have also added getMem* functions, because the extra
argument makes it cumbersome to use getNode and because I get confused
by it :-)

llvm-svn: 43172
 2007-10-19 10:41:11 +00:00
Bill Wendling
32c9cd9e94 Pointer arithmetic should be done with the index the same size as the pointer. 
llvm-svn: 43120
 2007-10-18 08:32:37 +00:00
Evan Cheng
f6d1c7be14 Really fix PR1734. Carefully track which register uses are sub-register uses by 
traversing inverse register coalescing map.

llvm-svn: 43118
 2007-10-18 07:49:59 +00:00
Dan Gohman
2903f7fc26 Add support for ISD::SELECT in SplitVectorOp. 
llvm-svn: 43072
 2007-10-17 14:48:28 +00:00
Evan Cheng
524c0e6c3d Yet another test case for extract_subreg coalescing crash. 
llvm-svn: 43063
 2007-10-17 02:15:06 +00:00
Evan Cheng
09fa6ed483 Fix PR1734. 
llvm-svn: 43035
 2007-10-16 19:29:47 +00:00
Dale Johannesen
dd254c4efa New test for svn rev 43033, radar 5538745. 
llvm-svn: 43034
 2007-10-16 18:10:14 +00:00
Chris Lattner
45d9c7aa07 Fix a bug handling frame references in ppc inline asm when the frame offset 
doesn't fit into 16 bits.

llvm-svn: 43032
 2007-10-16 18:00:18 +00:00
Evan Cheng
f5bcd3d737 LowerFP_TO_SINT must not create a stack object if it's not needed. 
llvm-svn: 43004
 2007-10-15 20:11:21 +00:00
Dan Gohman
2dc6099def Reapply the fix in 42908 for this file. This changes the function names 
from "test" to "foo" so that they don't match the grep -i ST.

llvm-svn: 43001
 2007-10-15 19:22:17 +00:00
Evan Cheng
43887d3714 Fix PR1729: watch out for val# with no def. 
llvm-svn: 42996
 2007-10-15 18:33:50 +00:00
Tanya Lattner
3a64752342 Fix run line. 
llvm-svn: 42990
 2007-10-15 16:35:13 +00:00
Evan Cheng
850c8739dc New test case. 
llvm-svn: 42963
 2007-10-14 10:15:03 +00:00
Evan Cheng
33df6a6bed Revert 42908 for now. 
llvm-svn: 42960
 2007-10-14 05:57:21 +00:00
Chris Lattner
a7666b08ad new testcase 
llvm-svn: 42953
 2007-10-13 06:56:18 +00:00