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Commit Graph

4006 Commits

Author SHA1 Message Date
David Greene
dad0944642 Speed up cycle checking significantly by caching results.
llvm-svn: 96956
2010-02-23 17:37:50 +00:00
Duncan Sands
5d5cce2e19 Revert commits 96556 and 96640, because commit 96556 breaks the
dragonegg self-host build.  I reverted 96640 in order to revert
96556 (96640 goes on top of 96556), but it also looks like with
both of them applied the breakage happens even earlier.  The
symptom of the 96556 miscompile is the following crash:

  llvm[3]: Compiling AlphaISelLowering.cpp for Release build
  cc1plus: /home/duncan/tmp/tmp/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp:4982: void llvm::SelectionDAG::ReplaceAllUsesWith(llvm::SDNode*, llvm::SDNode*, llvm::SelectionDAG::DAGUpdateListener*): Assertion `(!From->hasAnyUseOfValue(i) || From->getValueType(i) == To->getValueType(i)) && "Cannot use this version of ReplaceAllUsesWith!"' failed.
  Stack dump:
  0.	Running pass 'X86 DAG->DAG Instruction Selection' on function '@_ZN4llvm19AlphaTargetLowering14LowerOperationENS_7SDValueERNS_12SelectionDAGE'
  g++: Internal error: Aborted (program cc1plus)

This occurs when building LLVM using LLVM built by LLVM (via
dragonegg).  Probably LLVM has miscompiled itself, though it
may have miscompiled GCC and/or dragonegg itself: at this point
of the self-host build, all of GCC, LLVM and dragonegg were built
using LLVM.  Unfortunately this kind of thing is extremely hard
to debug, and while I did rummage around a bit I didn't find any
smoking guns, aka obviously miscompiled code.

Found by bisection.

r96556 | evancheng | 2010-02-18 03:13:50 +0100 (Thu, 18 Feb 2010) | 5 lines

Some dag combiner goodness:
Transform br (xor (x, y)) -> br (x != y)
Transform br (xor (xor (x,y), 1)) -> br (x == y)
Also normalize (and (X, 1) == / != 1 -> (and (X, 1)) != / == 0 to match to "test on x86" and "tst on arm"

r96640 | evancheng | 2010-02-19 01:34:39 +0100 (Fri, 19 Feb 2010) | 16 lines

Transform (xor (setcc), (setcc)) == / != 1 to
(xor (setcc), (setcc)) != / == 1.

e.g. On x86_64
  %0 = icmp eq i32 %x, 0
  %1 = icmp eq i32 %y, 0
  %2 = xor i1 %1, %0
  br i1 %2, label %bb, label %return
=>
	testl   %edi, %edi
	sete    %al
	testl   %esi, %esi
	sete    %cl
	cmpb    %al, %cl
	je      LBB1_2

llvm-svn: 96672
2010-02-19 11:30:41 +00:00
Evan Cheng
32031f7404 Transform (xor (setcc), (setcc)) == / != 1 to
(xor (setcc), (setcc)) != / == 1.

e.g. On x86_64
  %0 = icmp eq i32 %x, 0
  %1 = icmp eq i32 %y, 0
  %2 = xor i1 %1, %0
  br i1 %2, label %bb, label %return
=>
	testl   %edi, %edi
	sete    %al
	testl   %esi, %esi
	sete    %cl
	cmpb    %al, %cl
	je      LBB1_2

llvm-svn: 96640
2010-02-19 00:34:39 +00:00
Evan Cheng
9af06dfc83 Some dag combiner goodness:
Transform br (xor (x, y)) -> br (x != y)
Transform br (xor (xor (x,y), 1)) -> br (x == y)
Also normalize (and (X, 1) == / != 1 -> (and (X, 1)) != / == 0 to match to "test on x86" and "tst on arm"

llvm-svn: 96556
2010-02-18 02:13:50 +00:00
David Greene
d93fb1f15d Make the non-temporal bit "significant" in MemSDNodes so they aren't
CSE'd or otherwise combined with temporal MemSDNodes.

llvm-svn: 96505
2010-02-17 20:21:42 +00:00
Chris Lattner
955ce23e27 sink special case "cannotyetselect" for intrinsics out of the
tblgen splatted code into the implementation.

llvm-svn: 96460
2010-02-17 06:28:22 +00:00
Duncan Sands
1b33dd3c83 There are two ways of checking for a given type, for example isa<PointerType>(T)
and T->isPointerTy().  Convert most instances of the first form to the second form.
Requested by Chris.

llvm-svn: 96344
2010-02-16 11:11:14 +00:00
Evan Cheng
df9a8c9d49 Fix a memory leak. Patch by Nicolas Geoffray.
llvm-svn: 96295
2010-02-15 23:16:53 +00:00
Evan Cheng
b5fe25544c Split SelectionDAGISel::IsLegalAndProfitableToFold to
IsLegalToFold and IsProfitableToFold. The generic version of the later simply checks whether the folding candidate has a single use.

This allows the target isel routines more flexibility in deciding whether folding makes sense. The specific case we are interested in is folding constant pool loads with multiple uses.

llvm-svn: 96255
2010-02-15 19:41:07 +00:00
David Greene
4f983d569c Add non-temporal flags and remove an assumption of default arguments.
llvm-svn: 96240
2010-02-15 17:00:31 +00:00
Duncan Sands
2acaf3609c Uniformize the names of type predicates: rather than having isFloatTy and
isInteger, we now have isFloatTy and isIntegerTy.  Requested by Chris!

llvm-svn: 96223
2010-02-15 16:12:20 +00:00
Jakob Stoklund Olesen
3aca1b0249 Use array_pod_sort instead of std::sort for improved code size.
Use SmallVector instead of std::vector for better speed when indirectbr has
few successors.

llvm-svn: 95879
2010-02-11 18:06:56 +00:00
Jakob Stoklund Olesen
215d9f3898 Remove duplicate successors from indirectbr instructions before building the machine CFG.
This makes early tail duplication run 60 times faster when compiling the Firefox
JavaScript interpreter, see PR6186.

llvm-svn: 95831
2010-02-11 00:34:18 +00:00
Mon P Wang
c17e781f35 The previous fix of widening divides that trap was too fragile as it depends on custom
lowering and requires that certain types exist in ValueTypes.h.  Modified widening to
check if an op can trap and if so, the widening algorithm will apply only the op on
the defined elements.  It is safer to do this in widening because the optimizer can't
guarantee removing unused ops in some cases.

llvm-svn: 95823
2010-02-10 23:37:45 +00:00
Dan Gohman
92b6122204 Fix "the the" and similar typos.
llvm-svn: 95781
2010-02-10 16:03:48 +00:00
Evan Cheng
8bee7fb61d Now that ShrinkDemandedOps() is separated out from DAG combine. It sometimes leave some obvious nops which dag combine used to clean up afterwards e.g. (trunk (ext n)) -> n. Look for them and squash them.
llvm-svn: 95757
2010-02-10 02:17:34 +00:00
Evan Cheng
8c2662f96a Emit an error for illegal inline asm constraint (which uses illegal type) rather than asserting.
llvm-svn: 95746
2010-02-10 01:21:02 +00:00
Dale Johannesen
c9f253214e Fix comments to reflect renaming elsewhere.
llvm-svn: 95730
2010-02-10 00:11:11 +00:00
David Greene
d2c34ce826 Only dump output in debug mode.
llvm-svn: 95711
2010-02-09 23:03:05 +00:00
Chris Lattner
7acf9be6c4 move target-independent opcodes out of TargetInstrInfo
into TargetOpcodes.h.  #include the new TargetOpcodes.h
into MachineInstr.  Add new inline accessors (like isPHI())
to MachineInstr, and start using them throughout the 
codebase.

llvm-svn: 95687
2010-02-09 19:54:29 +00:00
Dale Johannesen
5ddd318b03 Apply the 95471 fix to SelectionDAGBuilder as well;
we can get in here if FastISel gives up in a block.
(Actually the two copies of this need to be unified.  Later.)

llvm-svn: 95579
2010-02-08 21:53:27 +00:00
Dan Gohman
f113e5466c In guaranteed tailcall mode, don't decline the tailcall optimization
for blocks ending in "unreachable".

llvm-svn: 95565
2010-02-08 20:34:14 +00:00
Dale Johannesen
83f31d3511 After Victor's latest commits I am seeing null
addresses in dbg.declare; ignore this for the
moment to prevent things from breaking.

llvm-svn: 95471
2010-02-06 02:26:02 +00:00
Evan Cheng
94fe5501b7 When the scheduler unfold a load folding instruction it move some of the predecessors to the unfolded load. It decides what gets moved to the load by checking whether the new load is using the predecessor as an operand. The check neglects the cases whether the predecessor is a flagged scheduling unit.
rdar://7604000

llvm-svn: 95339
2010-02-05 01:27:11 +00:00
Evan Cheng
ce5962aaf9 Fix typo Duncan noticed.
llvm-svn: 95322
2010-02-04 19:07:06 +00:00
Evan Cheng
3c93245a64 It's too risky to eliminate sext / zext of call results for tail call optimization even if the caller / callee attributes completely match. The callee may have been bitcast'ed (or otherwise lied about what it's doing).
llvm-svn: 95282
2010-02-04 02:45:02 +00:00
Evan Cheng
e273e42195 Revert 94937 and move the noreturn check to codegen.
llvm-svn: 95198
2010-02-03 03:55:59 +00:00
Evan Cheng
d9cf09b0d6 Allow all types of callee's to be tail called. But avoid automatic tailcall if the callee is a result of bitcast to avoid losing necessary zext / sext etc.
llvm-svn: 95195
2010-02-03 03:28:02 +00:00
Evan Cheng
9057fea7ef Revert 95130.
llvm-svn: 95160
2010-02-02 23:55:14 +00:00
Evan Cheng
48375fbf4f Pass callsite return type to TargetLowering::LowerCall and use that to check sibcall eligibility.
llvm-svn: 95130
2010-02-02 21:29:10 +00:00
Mon P Wang
65b01b6ce7 Improve EXTRACT_VECTOR_ELT patch based on comments from Duncan
llvm-svn: 95012
2010-02-01 22:15:09 +00:00
Chris Lattner
af2e10ddef eliminate a bunch of pointless LLVMContext arguments.
llvm-svn: 95001
2010-02-01 20:48:08 +00:00
Dale Johannesen
1483e87700 fix PR 6157. Testcase pending.
llvm-svn: 94996
2010-02-01 19:54:53 +00:00
Mon P Wang
f9fa3aa2c0 Fixed a couple of optimization with EXTRACT_VECTOR_ELT that assumes the result
type is the same as the element type of the vector.  EXTRACT_VECTOR_ELT can
be used to extended the width of an integer type.  This fixes a bug for
Generic/vector-casts.ll on a ppc750.

llvm-svn: 94990
2010-02-01 19:03:18 +00:00
Duncan Sands
6b277c2823 Change the SREM case to match the logic in the IR version ComputeMaskedBits.
llvm-svn: 94805
2010-01-29 09:45:26 +00:00
Bill Wendling
d408e7be4e Assign the ordering of SDNodes in a much less intrusive fashion. After the
"visit*" method is called, take the newly created nodes, walk them in a DFS
fashion, and if they don't have an ordering set, then give it one.

llvm-svn: 94757
2010-01-28 21:51:40 +00:00
Jim Grosbach
7474937004 Update of 94055 to track the IR level call site information via an intrinsic.
This allows code gen and the exception table writer to cooperate to make sure
landing pads are associated with the correct invoke locations.

llvm-svn: 94726
2010-01-28 01:45:32 +00:00
Evan Cheng
237629e476 Eliminate target hook IsEligibleForTailCallOptimization.
Target independent isel should always pass along the "tail call" property. Change
target hook LowerCall's parameter "isTailCall" into a refernce. If the target
decides it's impossible to honor the tail call request, it should set isTailCall
to false to make target independent isel happy.

llvm-svn: 94626
2010-01-27 00:07:07 +00:00
Evan Cheng
c674548602 Allow some automatic tailcall optimization without changing ABI.
llvm-svn: 94611
2010-01-26 23:13:04 +00:00
Chris Lattner
967a37fb26 eliminate the TargetLowering::UsesGlobalOffsetTable bool, which is
subsumed by TargetLowering::getJumpTableEncoding().  Change uses of
it to be more specific.

llvm-svn: 94529
2010-01-26 06:53:37 +00:00
Chris Lattner
d87c50833a Move getJTISymbol from MachineJumpTableInfo to MachineFunction,
which is more convenient, and change getPICJumpTableRelocBaseExpr
to take a MachineFunction to match.

Next, move the X86 code that create a PICBase symbol to
X86TargetLowering::getPICBaseSymbol from 
X86MCInstLower::GetPICBaseSymbol, which was an asmprinter specific 
library.  This eliminates a 'gross hack', and allows us to
implement X86ISelLowering::getPICJumpTableRelocBaseExpr which now
calls it.

This in turn allows us to eliminate the 
X86AsmPrinter::printPICJumpTableSetLabel method, which was the
only overload of printPICJumpTableSetLabel.

llvm-svn: 94526
2010-01-26 06:28:43 +00:00
Chris Lattner
a9b1ea03e9 add a new MachineJumpTableInfo::getJTISymbol method,
use it to implement the default TargetLowering::getPICJumpTableRelocBaseExpr

llvm-svn: 94523
2010-01-26 05:58:28 +00:00
Chris Lattner
3b2bf7ab66 stub out a new target hook, need some refactoring before I can
implement it.

llvm-svn: 94521
2010-01-26 05:30:30 +00:00
Evan Cheng
548d00d77c Implement cond ? -1 : 0 with sbb.
llvm-svn: 94490
2010-01-26 02:00:44 +00:00
Dale Johannesen
d75f9dc3ff Generate DEBUG_VALUE comments on x86. The (limited)
dbg.declare's we currently generate go through both
register allocators without perturbing the results.

llvm-svn: 94480
2010-01-26 00:09:58 +00:00
Chris Lattner
efdc572e44 Rearrange handling of jump tables. Highlights:
1. MachineJumpTableInfo is now created lazily for a function the first time
   it actually makes a jump table instead of for every function.
2. The encoding of jump table entries is now described by the
   MachineJumpTableInfo::JTEntryKind enum.  This enum is determined by the
   TLI::getJumpTableEncoding() hook, instead of by lots of code scattered
   throughout the compiler that "knows" that jump table entries are always
   32-bits in pic mode (for example).
3. The size and alignment of jump table entries is now calculated based on
   their kind, instead of at machinefunction creation time.

Future work includes using the EntryKind in more places in the compiler,
eliminating other logic that "knows" the layout of jump tables in various
situations.

llvm-svn: 94470
2010-01-25 23:26:13 +00:00
Chris Lattner
5a57121631 make -fno-rtti the default unless a directory builds with REQUIRES_RTTI.
llvm-svn: 94378
2010-01-24 20:43:08 +00:00
Mon P Wang
d4d1cbb72b It seems better to scalarize vectors of size 1 instead of widening them.
Add support to widen SETCC.

llvm-svn: 94342
2010-01-24 00:24:43 +00:00
Mon P Wang
871ea08e40 Improved widening loads by adding support for wider loads if
the alignment allows.  Fixed a bug where we didn't use a
vector load/store for PR5626.

llvm-svn: 94338
2010-01-24 00:05:03 +00:00
Bill Wendling
7449bb010b Remove the '-disable-scheduling' flag and replace it with the 'source' option of
the '-pre-RA-sched' flag. It actually makes more sense to do it this way. Also,
keep track of the SDNode ordering by default. Eventually, we would like to make
this ordering a way to break a "tie" in the scheduler. However, doing that now
breaks the "CodeGen/X86/abi-isel.ll" test for 32-bit Linux.

llvm-svn: 94308
2010-01-23 10:26:57 +00:00