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db07ac46f0
Commit Graph

195 Commits

Author SHA1 Message Date
Brian Gaeke
db07ac46f0 Remove dependency on MRegisterInfo::getRegClass 
llvm-svn: 17346
 2004-10-29 21:42:27 +00:00
Misha Brukman
2493cb2a2a Adjust rules for building .inc files due to Reid's changes of Makefile.rules 
llvm-svn: 17169
 2004-10-22 22:16:24 +00:00
Misha Brukman
9113553178 * Add baseline structural JIT code, but disable the JIT to allow llvm-gcc builds 
- Support added for functions, basic blocks, constant pool, constants,
    registers, and some basic support for globals, all untested
* Turn assert()s into abort()s so that unimplemented functions fail in release

llvm-svn: 17143
 2004-10-19 19:49:42 +00:00
Chris Lattner
bb5b3f0b2f Add support for unreachable and undef 
llvm-svn: 17074
 2004-10-17 02:42:42 +00:00
Misha Brukman
e05e5f0655 The field is called imm22', not simply imm' 
llvm-svn: 17003
 2004-10-14 22:33:32 +00:00
Misha Brukman
4932cb0e94 Synthetic instructions RET and RETL need to have all 3 parameters specified 
llvm-svn: 17002
 2004-10-14 22:32:49 +00:00
Misha Brukman
7b29a7bc80 Class F2_1 already inherits the imm22 field from class F2 
llvm-svn: 17001
 2004-10-14 22:32:24 +00:00
Misha Brukman
4e691d2adb Generate the SparcV8 code emitter from .td files 
llvm-svn: 17000
 2004-10-14 21:57:19 +00:00
Misha Brukman
5bc4009783 * In the F3_1 class, default asi to 0 because it's not currently used 
* In the F3_3 class, remove mention of asi because it's not part of the format

llvm-svn: 16999
 2004-10-14 21:53:39 +00:00
Brian Gaeke
ce6dcb0713 Add FSTOI, FDTOI (fp to integer cast) instructions. 
llvm-svn: 16996
 2004-10-14 19:39:35 +00:00
Brian Gaeke
ba65401a4d Rewrite emitCastOperation, refactoring parts of it into emitIntegerCast, and 
adding emitFPToIntegerCast.

llvm-svn: 16995
 2004-10-14 19:39:34 +00:00
Brian Gaeke
31fa12ece7 Add list of libc procedures we'll use, at some point. 
Update list of currently failing tests.
ADJCALLSTACK* support is done.

llvm-svn: 16994
 2004-10-14 19:39:33 +00:00
Brian Gaeke
26b353ebd6 Fix assertion failure when calling or returning from a function which 
returns 'bool' type.

llvm-svn: 16884
 2004-10-10 20:34:17 +00:00
Brian Gaeke
3af0547680 Implement eliminateCallFramePseudoInstr(). 
Wrap a long comment line.

llvm-svn: 16883
 2004-10-10 19:57:21 +00:00
Brian Gaeke
b6239cd5ed Model calls as *both* using *and* killing O0..O5, because callees use the 
argument values passed in (so they're not dead until *after* the call),
and callees are free to modify those registers.

llvm-svn: 16882
 2004-10-10 19:57:20 +00:00
Brian Gaeke
245a073aa6 Fix whitespace and wrap some long lines. 
Deal with allocating stack space for outgoing args and copying them into the
correct stack slots (at least, we can copy <=32-bit int args).
We now correctly generate ADJCALLSTACK* instructions.

llvm-svn: 16881
 2004-10-10 19:57:18 +00:00
Brian Gaeke
ba13791a01 update according to tonight's info 
llvm-svn: 16866
 2004-10-09 05:58:27 +00:00
Brian Gaeke
3abdd11420 Implement getModuleMatchQuality and getJITMatchQuality so that v8 will be the 
default 32/BE target on sparc hosts, and ppc will continue to be the default
on other hosts.

llvm-svn: 16865
 2004-10-09 05:57:01 +00:00
Brian Gaeke
c667e351ed I think this will handle double args. 
llvm-svn: 16618
 2004-09-30 19:44:32 +00:00
Brian Gaeke
0d4d060dbd Mark the instructions that have delay slots with the hasDelaySlot flag. 
Add some comments.

llvm-svn: 16611
 2004-09-30 04:04:48 +00:00
Brian Gaeke
738005408e Use TargetMachine::hasDelaySlot() instead of our old switch statement 
to find instrs that have delay slots.

llvm-svn: 16610
 2004-09-30 04:04:47 +00:00
Brian Gaeke
ee2dab29f9 Update list of shootout programs that should be working. 
llvm-svn: 16595
 2004-09-29 20:45:06 +00:00
Brian Gaeke
d4c38d8c4b Tell the target description that calls clobber registers O0...O5. 
llvm-svn: 16594
 2004-09-29 20:45:05 +00:00
Brian Gaeke
5bca3b8e5f FITOD is spelled "fitod", not "fitos". Ouch. 
llvm-svn: 16591
 2004-09-29 19:59:07 +00:00
Brian Gaeke
e9aabee09d Don't use .quad to output double constants. The assembler must have a bug or 
something, because the wrong bit patterns get output.

llvm-svn: 16590
 2004-09-29 19:59:06 +00:00
Brian Gaeke
b8237dfbb9 Recognize FpMOVD as a move. 
llvm-svn: 16586
 2004-09-29 16:45:47 +00:00
Brian Gaeke
25154c9580 add results 
llvm-svn: 16579
 2004-09-29 03:48:55 +00:00
Brian Gaeke
bad755c1d1 Simplify copyConstantToRegister() for longs, using a pair of recursive calls. 
Copy constant-pool entries' addresses into registers before loading out of them,
to avoid errors from the assembler.
Handle loading call args past the 6th one off the stack.
Add IMPLICIT_DEF pseudo-instrs for double and long arguments passed in register
pairs.
Use FpMOVD to copy doubles around instead of the horrible store-load thing we
were doing before.
Handle 'ret double' and 'ret long'.
Fix a bug in handling 'and/or/xor long'.

llvm-svn: 16577
 2004-09-29 03:34:41 +00:00
Brian Gaeke
279e98a3b4 Fix bug recognizing moves: isMoveInstr should only treat ORs with %g0 as 
moves, not all ORs.

llvm-svn: 16576
 2004-09-29 03:28:15 +00:00
Brian Gaeke
86aaed6a34 Use FpMOVD pseudo-instruction to move doubles around. 
llvm-svn: 16575
 2004-09-29 03:27:30 +00:00
Brian Gaeke
02c3d2f588 Add new FpMOVD pseudo-instruction, used to move doubles around. 
llvm-svn: 16574
 2004-09-29 03:27:29 +00:00
Brian Gaeke
42a0b9a05c Fix double and long alignment. 
Call the FPMover pass after register allocation.

llvm-svn: 16573
 2004-09-29 03:26:27 +00:00
Brian Gaeke
ab7ac780bb Put quotes around argument to .section directive. 
llvm-svn: 16572
 2004-09-29 03:25:40 +00:00
Brian Gaeke
8d39e108a5 Add createSparcV8FPMoverPass(). 
llvm-svn: 16571
 2004-09-29 03:25:39 +00:00
Brian Gaeke
81597f52ff Pass which converts FpMOVD (double move pseudoinstructions) to pairs 
of FMOVS instrs.

llvm-svn: 16570
 2004-09-29 03:24:34 +00:00
Misha Brukman
88a1e0aba4 SparcV8 int regs are not only 32-bits in width, but they are 32-bit aligned! 
llvm-svn: 16526
 2004-09-27 18:22:18 +00:00
Misha Brukman
84e238e5ed Fix the copy-pasto that Brian noticed: V8 int regs are 32-bits wide, not 64. 
llvm-svn: 16518
 2004-09-26 21:07:43 +00:00
Misha Brukman
a59d95f2ed Use the V8/V9 shared register file description 
llvm-svn: 16485
 2004-09-22 21:48:50 +00:00
Misha Brukman
72c0988b77 Combine the F2 and F3 instruction classes into one file for simplicity 
llvm-svn: 16484
 2004-09-22 21:38:42 +00:00
Misha Brukman
5290581b39 Fix file header path 
llvm-svn: 16483
 2004-09-22 21:29:12 +00:00
Misha Brukman
3f8390a72f Prettify formatting of the file, adjust paths to making V8 a subdir of Sparc 
llvm-svn: 16482
 2004-09-22 20:09:29 +00:00
Misha Brukman
f8a2aee058 V8 is now a subdirectory of Sparc; adjust paths accordingly 
llvm-svn: 16481
 2004-09-22 20:08:52 +00:00
Chris Lattner
3cfb801817 Changes to make this work with Jason's patch. I checked this by hand, but 
would appreciate if others would also look at this to make sure I didn't
botch something obvious

llvm-svn: 16312
 2004-09-13 21:32:03 +00:00
Misha Brukman
587a924177 Renamed file to SparcV8ISelSimple.cpp 
llvm-svn: 16267
 2004-09-10 18:51:12 +00:00
Brian Gaeke
3229885493 This file does not need <iostream>, I think. 
llvm-svn: 16245
 2004-09-08 04:10:52 +00:00
Brian Gaeke
79802222d1 Back to compiling land for v8 
llvm-svn: 16138
 2004-09-02 02:37:43 +00:00
Chris Lattner
484126d8f8 Convert bytes to bits in alignment 
llvm-svn: 15971
 2004-08-21 20:09:46 +00:00
Chris Lattner
59e19bf141 V8 never used the instrselectorgenerator 
llvm-svn: 15791
 2004-08-15 23:07:40 +00:00
Chris Lattner
555a585fd8 Code insertion methods now return void instead of an int. 
llvm-svn: 15780
 2004-08-15 22:15:11 +00:00
Chris Lattner
e58190f5f6 These methods no longer take a TargetRegisterClass* operand. 
llvm-svn: 15774
 2004-08-15 21:56:44 +00:00