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Commit Graph

140177 Commits

Author SHA1 Message Date
Vedant Kumar
db9f622823 [llvm-cov] Turn line numbers in html reports into clickable links
llvm-svn: 285853
2016-11-02 19:44:13 +00:00
Krzysztof Parzyszek
5025db4c30 [Hexagon] Remove registers coalesced in expand-condsets from live intervals
llvm-svn: 285846
2016-11-02 17:59:54 +00:00
Artem Tamazov
489ca8373d [AMDGPU][mc] Improve test of special asm symbols.
Test simplified. Coverage extended.

Differential Revision: https://reviews.llvm.org/D26198

llvm-svn: 285844
2016-11-02 17:45:58 +00:00
Davide Italiano
aea53921fc [lli/COFF] Set the correct alignment for common symbols
Otherwise we set it always to zero, which is not correct,
and we assert inside alignTo (Assertion failed:
Align != 0u && "Align can't be 0.").

Differential Revision:  https://reviews.llvm.org/D26173

llvm-svn: 285841
2016-11-02 17:32:19 +00:00
Matt Arsenault
96da489c5b AMDGPU: Cleanup some xfailed tests
Some of these are already fixed or tested somewhere else.

llvm-svn: 285840
2016-11-02 17:24:54 +00:00
Zachary Turner
02cc0a6701 Fix build due to missing definition.
llvm-svn: 285837
2016-11-02 17:10:55 +00:00
Zachary Turner
efbbdd9c6c Add CodeViewRecordIO for reading and writing.
Using a pattern similar to that of YamlIO, this allows
us to have a single codepath for translating codeview
records to and from serialized byte streams.  The
current patch only hooks this up to the reading of
CodeView type records.  A subsequent patch will hook
it up for writing of CodeView type records, and then a
third patch will hook up the reading and writing of
CodeView symbols.

Differential Revision: https://reviews.llvm.org/D26040

llvm-svn: 285836
2016-11-02 17:05:19 +00:00
Nicolai Haehnle
f8cd283595 AMDGPU: Allow additional implicit operands on MOVRELS instructions
Summary:
The post-RA scheduler occasionally uses additional implicit operands when
the vector implicit operand as a whole is killed, but some subregisters
are still live because they are directly referenced later. Unfortunately,
this seems incredibly subtle to reproduce.

Fixes piglit spec/glsl-110/execution/variable-indexing/vs-temp-array-mat2-index-wr.shader_test
and others.

Reviewers: arsenm, tstellarAMD

Subscribers: kzhuravl, wdng, yaxunl, tony-tye, llvm-commits

Differential Revision: https://reviews.llvm.org/D25656

llvm-svn: 285835
2016-11-02 17:03:11 +00:00
Malcolm Parsons
79b7702948 Fix Clang-tidy readability-redundant-string-cstr warnings
Reviewers: beanz, lattner, jlebar

Subscribers: jholewinski, llvm-commits, mehdi_amini

Differential Revision: https://reviews.llvm.org/D26235

llvm-svn: 285832
2016-11-02 16:43:50 +00:00
Nirav Dave
3bc0a0e24a [ARM][MC] Cleanup ARM Target Assembly Parser
Summary:
Correctly parse end-of-statement tokens and handle preprocessor
end-of-line comments in ARM assembly processor.

Reviewers: rnk, majnemer

Subscribers: aemerson, rengolin, llvm-commits

Differential Revision: https://reviews.llvm.org/D26152

llvm-svn: 285830
2016-11-02 16:22:51 +00:00
Adrian Prantl
595bf62c6c Improve and cleanup comments in DwarfExpression.h
llvm-svn: 285829
2016-11-02 16:20:37 +00:00
Matt Arsenault
32eddf271b BranchRelaxation: Fix computing indirect branch block size
llvm-svn: 285828
2016-11-02 16:18:29 +00:00
Adrian Prantl
71d3bd986b Simplify control flow in the the DWARF expression compiler
by refactoring common code into a DwarfExpressionCursor wrapper.

llvm-svn: 285827
2016-11-02 16:12:20 +00:00
Adrian Prantl
755fe459a2 Emit DW_OP_piece also if the previous value was a constant.
This fixes a bug in the DWARF backend.

llvm-svn: 285826
2016-11-02 16:12:16 +00:00
Simon Pilgrim
650379ed5b Use !operator to test if APInt is zero/non-zero. NFCI.
Avoids APInt construction and slower comparisons.

llvm-svn: 285822
2016-11-02 15:41:15 +00:00
Rafael Espindola
e5a7a54be7 Simplify typedefs. NFC.
llvm-svn: 285819
2016-11-02 15:33:59 +00:00
Rafael Espindola
67bbb02ec9 Inline a version of getSectionStringTable into the only use.
llvm-svn: 285817
2016-11-02 15:23:32 +00:00
Rafael Espindola
e509649666 Compute the section table lazily.
As a consequence this move a bunch of error checking out of the constructor.

llvm-svn: 285815
2016-11-02 15:15:59 +00:00
Vasileios Kalintiris
a63b0d284c [mips] Always run the MipsOptimizePICCall pass.
Summary:
Remove this pass from addMachineSSAOptimization() and register it unconditionally in through addPreRegAlloc(). This pass is required for generating correct PIC calls.

Reviewers: sdardis

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D26036

llvm-svn: 285814
2016-11-02 15:11:27 +00:00
Joerg Sonnenberger
c71771b919 Create the virtual register for the global base in the intersection of
GPRC and GPRC_NOR0 (or the 64bit equivalent) and not just the latter.
GPRC_NOR0 contains ZERO as alternative meaning of r0 and is therefore
not a true subclass of GPRC.

llvm-svn: 285813
2016-11-02 15:00:31 +00:00
Rafael Espindola
9b9c4774a2 Inline getSectionStringTableIndex() into only caller. NFC.
llvm-svn: 285812
2016-11-02 14:52:50 +00:00
Rafael Espindola
036854fbd0 Avoid a report_fatal_error in sections().
Have it return a ErrorOr<Range> and delete section_begin and
section_end.

llvm-svn: 285807
2016-11-02 14:10:57 +00:00
Aaron Ballman
fb1ac9442e Removing a switch statement that contains a default label, but no case labels. Silences an MSVC warning; NFC.
llvm-svn: 285806
2016-11-02 13:58:57 +00:00
Rafael Espindola
3b1d6f743f getNumSections should return a uintX_t. NFC.
llvm-svn: 285804
2016-11-02 13:07:38 +00:00
Rafael Espindola
993db8494b Simplify getSection. NFC.
llvm-svn: 285803
2016-11-02 12:49:55 +00:00
Joerg Sonnenberger
c38e0986df Simplify.
llvm-svn: 285802
2016-11-02 12:45:28 +00:00
Ulrich Weigand
f5a6992cfd [SystemZ] Fix compiler warnings introduced by r285574
SystemZAsmParser::parseOperand returns a bool, not an enum.

llvm-svn: 285800
2016-11-02 11:32:28 +00:00
Kirill Bobyrev
1b49e93486 [llvm] FIx if-clause -Wmisleading-indentation issue.
While bootstrapping Clang with recent `gcc 6.2.0` I found a bug related to misleading indentation.

I believe, a pair of `{}` was forgotten, especially given the above similar piece of code:

```
      if (!RDef || !HII->isPredicable(*RDef)) {
        Done = coalesceRegisters(RD, RegisterRef(S1));
        if (Done) {
          UpdRegs.insert(RD.Reg);
          UpdRegs.insert(S1.getReg());
        }
      }
```

Reviewers: kparzysz

Differential Revision: https://reviews.llvm.org/D26204

llvm-svn: 285794
2016-11-02 10:00:40 +00:00
Bjorn Pettersson
f9a3ecf57f [Reassociate] Skip analysis of dead code to avoid infinite loop.
Summary:
It was detected that the reassociate pass could enter an inifite
loop when analysing dead code. Simply skipping to analyse basic
blocks that are dead avoids such problems (and as a side effect
we avoid spending time on optimising dead code).

The solution is using the same Reverse Post Order ordering of the
basic blocks when doing the optimisations, as when building the
precalculated rank map. A nice side-effect of this solution is
that we now know that we only try to do optimisations for blocks
with ranked instructions.

Fixes https://llvm.org/bugs/show_bug.cgi?id=30818

Reviewers: llvm-commits, davide, eli.friedman, mehdi_amini

Subscribers: dberlin

Differential Revision: https://reviews.llvm.org/D26154

llvm-svn: 285793
2016-11-02 08:55:19 +00:00
Dylan McKay
35c1d0025e [AVR] Add instruction selection lowering code
Summary: This adds AVRISelLowering.cpp

Reviewers: arsenm, kparzysz

Subscribers: llvm-commits, modocache, japaric, wdng, beanz, mgorny

Differential Revision: https://reviews.llvm.org/D25034

llvm-svn: 285790
2016-11-02 06:47:40 +00:00
Shoaib Meenai
cc318d3604 [CMake] Set default build type correctly
At least with cmake 3.6.1, the default build type setting was having no
effect; the generated CMakeCache.txt still had an empty CMAKE_BUILD_TYPE.
Force the variable to be set to achieve the desired behavior.

Differential Revision: https://reviews.llvm.org/D26200

llvm-svn: 285789
2016-11-02 06:10:03 +00:00
Peter Collingbourne
a01989574b Bitcode: Fix short read implementation.
We need to zero extend the byte in order to correctly shift it into a
64-bit value.

llvm-svn: 285785
2016-11-02 02:58:47 +00:00
Brad Smith
932954ed4f Disable the use of std::call_once on OpenBSD with libstdc++.
It was noticed this caused performance regressions and deadlocks. PR30768.

Reorder the code to make it clearer what is tested.

PPC now disables the use of std::call_once only with libstdc++ with
the reordering of the code, as was the original intent.

llvm-svn: 285782
2016-11-02 01:39:01 +00:00
Michael Gottesman
faf00da81c [ilist_node] Add a getReverseIterator() method and a unittest for it.
This is the reverse_iterator analogue of getIterator().

llvm-svn: 285780
2016-11-02 00:59:58 +00:00
Peter Collingbourne
0bff92205e Bitcode: Check file size before reading bitcode header.
Should unbreak ocaml binding tests.

Also added an llvm-dis test that checks for the same thing.

llvm-svn: 285777
2016-11-02 00:39:11 +00:00
Peter Collingbourne
dad5df2ecb Support: Remove MemoryObject and DataStreamer interfaces.
These interfaces are no longer used.

Differential Revision: https://reviews.llvm.org/D26222

llvm-svn: 285774
2016-11-02 00:08:37 +00:00
Peter Collingbourne
352f695def Bitcode: Change reader interface to take memory buffers.
As proposed on llvm-dev:
http://lists.llvm.org/pipermail/llvm-dev/2016-October/106595.html

This change also fixes an API oddity where BitstreamCursor::Read() would
return zero for the first read past the end of the bitstream, but would
report_fatal_error for subsequent reads. Now we always report_fatal_error
for all reads past the end. Updated clients to check for the end of the
bitstream before reading from it.

I also needed to add padding to the invalid bitcode tests in
test/Bitcode/. This is because the streaming interface was not checking that
the file size is a multiple of 4.

Differential Revision: https://reviews.llvm.org/D26219

llvm-svn: 285773
2016-11-02 00:08:19 +00:00
Vedant Kumar
f672212590 [docs] Fix some typos. NFC.
llvm-svn: 285772
2016-11-01 23:55:50 +00:00
Alex Bradbury
2903b8e615 [RISCV] Add bare-bones RISC-V MCTargetDesc
This is enough to compile and link but doesn't yet do anything particularly 
useful. Once an ASM parser and printer are added in the next two patches, the 
whole thing can be usefully tested.

Differential Revision: https://reviews.llvm.org/D23562

llvm-svn: 285770
2016-11-01 23:47:30 +00:00
Alex Bradbury
b5fde80c0e [RISCV 4/10] Add basic RISCV{InstrFormats,InstrInfo,RegisterInfo,}.td
For now, only add instruction definitions for basic ALU operations. Our 
initial target is a working MC layer rather than codegen, so appropriate 
SelectionDAG patterns will come later.

Differential Revision: https://reviews.llvm.org/D23561

llvm-svn: 285769
2016-11-01 23:40:28 +00:00
Matt Arsenault
3fd81027a1 AMDGPU: Handle CopyToReg in getOperandRegClass
llvm-svn: 285768
2016-11-01 23:22:17 +00:00
Matt Arsenault
269a08f691 AMDGPU: Use brev for materializing SGPR constants
This is already done with VGPR immediates and saves 4 bytes.

llvm-svn: 285765
2016-11-01 23:14:20 +00:00
Matt Arsenault
930d9b8579 AMDGPU: Default to using scalar mov to materialize immediate
This is the conservatively correct way because it's easy to
move or replace a scalar immediate. This was incorrect in the case
when the register class wasn't known from the static instruction
definition, but still needed to be an SGPR. The main example of this
is inlineasm has an SGPR constraint.

Also start verifying the register classes of inlineasm operands.

llvm-svn: 285762
2016-11-01 22:55:07 +00:00
Eric Christopher
8d60ed5dbe Move the initialization of PreferredLoopExit into runOnMachineFunction to be near the other function specific initializations.
llvm-svn: 285758
2016-11-01 22:15:50 +00:00
Sam McCall
6ebbc9c300 Fix uninitialized access in MachineBlockPlacement.
Summary:
Currently PreferredLoopExit is set only in buildLoopChains, which is
never called if there are no MachineLoops.

MSan is currently broken by this:
http://lab.llvm.org:8011/builders/sanitizer-x86_64-linux-fast/builds/145/steps/check-llvm%20msan/logs/stdio

This is a naive fix to get things green again. iteratee: you may have a better fix.

This change will also mean PreferredLoopExit will not carry over if
buildCFGChains() is called a second time in runOnMachineFunction, this
appears to be the right thing.

Reviewers: bkramer, iteratee, echristo

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D26069

llvm-svn: 285757
2016-11-01 22:02:14 +00:00
Matt Arsenault
3085819547 AMDGPU: Stop creating unused virtual registers
These are only used in the spill to VMEM path. Move them to
the one use.

llvm-svn: 285756
2016-11-01 21:58:07 +00:00
Rafael Espindola
8fa747aa78 Don't compute DotShstrtab eagerly.
This saves a field that is not always used. It also avoids failing a
program that doesn't need the section names.

llvm-svn: 285753
2016-11-01 21:33:55 +00:00
George Burgess IV
1f539103d7 [MemorySSA] Tighten up types to make our API prettier. NFC.
Patch by bryant.

Differential Revision: https://reviews.llvm.org/D26126

llvm-svn: 285750
2016-11-01 21:17:46 +00:00
Rafael Espindola
333ba0caaa Simplify getStringTableIndex.
The description in the ELF spec is just

---------------------------
If the section name string table section index is greater than or
equal to SHN_LORESERVE (0xff00), this member has the value SHN_XINDEX
(0xffff) and the actual index of the section name string table section
is contained in the sh_link field of the section header at index 0.
---------------------------

So we only have to check for it being SHN_XINDEX. Also, sh_link is
always 32 bits, so don't return an uintX_t.

llvm-svn: 285747
2016-11-01 20:56:15 +00:00
Sanjay Patel
3c52fdbd3d [ValueTracking] remove TODO comment; NFC
InstCombine should always canonicalize patterns like the one shown in the comment
when visiting 'select' insts in adjustMinMax().

Scalars were already handled there, and vector splats are handled after:
https://reviews.llvm.org/rL285732

llvm-svn: 285744
2016-11-01 20:43:00 +00:00