Chris Lattner
dbbbabb17b
More coverity fixes
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llvm-svn: 28266
2006-05-12 21:14:20 +00:00
Chris Lattner
db8caed257
Dead variable
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llvm-svn: 28265
2006-05-12 21:12:22 +00:00
Chris Lattner
adcb0582d8
Remove dead var, fix bad override.
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llvm-svn: 28264
2006-05-12 21:09:57 +00:00
Evan Cheng
871a83d4d0
Remove dead code
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llvm-svn: 28261
2006-05-12 19:03:56 +00:00
Chris Lattner
04a8ddfd68
Actually override the right method. :)
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Bug identified by coverity.
llvm-svn: 28259
2006-05-12 18:19:25 +00:00
Chris Lattner
f741502e85
remove dead variable.
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llvm-svn: 28258
2006-05-12 18:17:25 +00:00
Chris Lattner
9789688d36
remove dead variable.
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llvm-svn: 28248
2006-05-12 17:33:59 +00:00
Chris Lattner
2c316c91e8
Remove dead variable.
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llvm-svn: 28247
2006-05-12 17:31:21 +00:00
Chris Lattner
bcd2c4f32d
Fix PowerPC/2006-05-12-rlwimi-crash.ll
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Nate, please verify that if InsertMask is 0, rlwimi shouldn't be used.
This fixes the crash and causes no PPC testsuite regressions.
llvm-svn: 28243
2006-05-12 16:29:37 +00:00
Owen Anderson
1245bd420e
Add a method to generate a string representation from a TargetData.
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This continues the work on PR 761.
llvm-svn: 28239
2006-05-12 07:01:44 +00:00
Owen Anderson
29e4d70aed
Refactor a bunch of includes so that TargetMachine.h doesn't have to include
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TargetData.h. This should make recompiles a bit faster with my current
TargetData tinkering.
llvm-svn: 28238
2006-05-12 06:33:49 +00:00
Owen Anderson
a0a9e4584a
Fix some tabbing issues.
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llvm-svn: 28237
2006-05-12 06:06:55 +00:00
Owen Anderson
30ffff31f2
Add a new constructor to TargetData that builds a TargetData from its
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string representation.
This is part of PR 761.
llvm-svn: 28234
2006-05-12 05:49:47 +00:00
Evan Cheng
eb67c0f664
Typo! How did we commute nodes before?!
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llvm-svn: 28229
2006-05-12 01:46:26 +00:00
Evan Cheng
6a08dd641a
Add MOV16_rm / MOV32_rm and MOV16_mr / MOV32_mr to isLoadFromStackSlot and isStoreToStackSlot
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llvm-svn: 28223
2006-05-11 07:33:49 +00:00
Chris Lattner
085cfba0ca
Fix the PowerPC JIT-only failure on UnitTests/Vector/sumarray-dbl, which is
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really a bad codegen bug that LLC happens to get lucky with. I must chat with
Nate for the proper fix.
llvm-svn: 28213
2006-05-10 06:38:32 +00:00
Chris Lattner
56680711dc
Indent .data/.text in the .s file
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llvm-svn: 28204
2006-05-09 16:15:00 +00:00
Evan Cheng
1f5c530d04
Remove a completed entry.
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llvm-svn: 28199
2006-05-09 06:54:05 +00:00
Chris Lattner
b7152b0b42
Implement MASM sections correctly, without a "has masm sections flag" and a bunch of special case code.
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llvm-svn: 28194
2006-05-09 05:33:48 +00:00
Chris Lattner
85032c8c5c
MASM doesn't have one of these.
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llvm-svn: 28190
2006-05-09 05:21:47 +00:00
Chris Lattner
8301da3ffe
Preserve prior behavior
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llvm-svn: 28187
2006-05-09 05:15:24 +00:00
Chris Lattner
0c4a1e56f4
Fix the MASM asmprinter's lies. It does not want to emit code to .text/.data
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it wants it emitted to _text/_data.
llvm-svn: 28185
2006-05-09 05:12:53 +00:00
Chris Lattner
f45b6d5c08
Split SwitchSection into SwitchTo{Text|Data}Section methods.
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llvm-svn: 28184
2006-05-09 04:59:56 +00:00
Chris Lattner
71c68064f9
Some notes and thoughts to myself
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llvm-svn: 28182
2006-05-09 04:58:46 +00:00
Chris Lattner
5609ba71a5
Another bad case I noticed
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llvm-svn: 28177
2006-05-08 21:39:45 +00:00
Chris Lattner
4f3345f1f1
add a note
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llvm-svn: 28176
2006-05-08 21:24:21 +00:00
Nate Begeman
db854c6772
Yet more readme updating
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llvm-svn: 28172
2006-05-08 20:54:02 +00:00
Nate Begeman
1ff4d8f2fe
New note about something bad happening in target independent optimizers
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llvm-svn: 28170
2006-05-08 20:08:28 +00:00
Nate Begeman
b8fa6337df
Proving once again that I am not as smart as the compiler
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llvm-svn: 28169
2006-05-08 19:09:24 +00:00
Nate Begeman
a706539a72
Fold more shifts into inserts, and update the README
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llvm-svn: 28168
2006-05-08 17:38:32 +00:00
Chris Lattner
6cac867da1
When tracking demanded bits, if any bits from the sext of an SRA are demanded,
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then so is the input sign bit. This fixes mediabench/g721 on X86.
llvm-svn: 28166
2006-05-08 17:22:53 +00:00
Evan Cheng
0fb3fc3626
Fixing truncate. Previously we were emitting truncate from r16 to r8 as
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movw. That is we promote the destination operand to r16. So
%CH = TRUNC_R16_R8 %BP
is emitted as
movw %bp, %cx.
This is incorrect. If %cl is live, it would be clobbered.
Ideally we want to do the opposite, that is emitted it as
movb ??, %ch
But this is not possible since %bp does not have a r8 sub-register.
We are now defining a new register class R16_ which is a subclass of R16
containing only those 16-bit registers that have r8 sub-registers (i.e.
AX - DX). We isel the truncate to two instructions, a MOV16to16_ to copy the
value to the R16_ class, followed by a TRUNC_R16_R8.
Due to bug 770, the register colaescer is not going to coalesce between R16 and
R16_. That will be fixed later so we can eliminate the MOV16to16_. Right now, it
can only be eliminated if we are lucky that source and destination registers are
the same.
llvm-svn: 28164
2006-05-08 08:01:26 +00:00
Nate Begeman
591488077e
Update some stuff now that the new rlwimi code has gone in
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llvm-svn: 28162
2006-05-08 02:52:38 +00:00
Evan Cheng
698b0517b5
Typo's
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llvm-svn: 28158
2006-05-07 10:10:20 +00:00
Nate Begeman
dc94b738d0
New rlwimi implementation, which is superior to the old one. There are
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still a couple missed optimizations, but we now generate all the possible
rlwimis for multiple inserts into the same bitfield. More regression tests
to come.
llvm-svn: 28156
2006-05-07 00:23:38 +00:00
Chris Lattner
5c9c9f0eb6
Use ComputeMaskedBits to determine # sign bits as a fallback. This allows us
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to handle all kinds of stuff, including silly things like:
sextinreg(setcc,i16) -> setcc.
llvm-svn: 28155
2006-05-06 23:48:13 +00:00
Chris Lattner
8b8093dea2
Add some more sign propagation cases
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llvm-svn: 28154
2006-05-06 23:40:29 +00:00
Chris Lattner
1fce346023
Add some more simple sign bit propagation cases.
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llvm-svn: 28149
2006-05-06 22:39:59 +00:00
Jeff Cohen
248e133255
Fix some loose ends in MASM support.
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llvm-svn: 28148
2006-05-06 21:27:14 +00:00
Chris Lattner
3a77411d76
Add some really really simple code for computing sign-bit propagation.
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This will certainly be enhanced in the future.
llvm-svn: 28145
2006-05-06 09:27:13 +00:00
Chris Lattner
89fa42b51e
Teach the X86 backend about non-i32 inline asm register classes.
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llvm-svn: 28139
2006-05-06 00:29:37 +00:00
Chris Lattner
fd1923bfa6
Fold (trunc (srl x, c)) -> (srl (trunc x), c)
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llvm-svn: 28138
2006-05-06 00:11:52 +00:00
Chris Lattner
2f0d27a72a
Implement ComputeMaskedBits/SimplifyDemandedBits for ISD::TRUNCATE
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llvm-svn: 28135
2006-05-05 22:32:12 +00:00
Chris Lattner
daae9ee503
Print a grouping around inline asm blocks so that we can tell when we are
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using them.
llvm-svn: 28134
2006-05-05 21:50:04 +00:00
Chris Lattner
12bb901c93
Print *some* grouping around inline asm blocks so we know where they are.
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llvm-svn: 28133
2006-05-05 21:48:50 +00:00
Chris Lattner
a03676690b
Teach the code generator to use cvtss2sd as extload f32 -> f64
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llvm-svn: 28131
2006-05-05 21:35:18 +00:00
Evan Cheng
0e9ec8d566
Need extload patterns after Chris' DAG combiner changes
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llvm-svn: 28127
2006-05-05 08:23:07 +00:00
Evan Cheng
84612a59c2
Better implementation of truncate. ISel matches it to a pseudo instruction
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that gets emitted as movl (for r32 to i16, i8) or a movw (for r16 to i8). And
if the destination gets allocated a subregister of the source operand, then
the instruction will not be emitted at all.
llvm-svn: 28119
2006-05-05 05:40:20 +00:00
Chris Lattner
4978a4f2f4
New note, Nate, please check to see if I'm full of it :)
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llvm-svn: 28118
2006-05-05 05:36:15 +00:00
Chris Lattner
075404adaa
Remove and simplify some more machineinstr/machineoperand stuff.
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llvm-svn: 28105
2006-05-04 18:16:01 +00:00