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Author SHA1 Message Date
Dan Gohman
dcc3634e46 Constant-fold certain comparisons with infinity and negative infinity. 
llvm-svn: 96777
 2010-02-22 04:06:03 +00:00
Dan Gohman
7804dbce6e Rename a variable to avoid a -Wshadow warning. 
llvm-svn: 96776
 2010-02-22 04:04:24 +00:00
Dan Gohman
c281a5da15 Remove the logic for reasoning about NaNs from the code that forms 
SSE min and max instructions. The real thing this code needs to be
concerned about is negative zero.

Update the sse-minmax.ll test accordingly, and add tests for
-enable-unsafe-fp-math mode as well.

llvm-svn: 96775
 2010-02-22 04:03:39 +00:00
Dan Gohman
c44dee5fbd When emitting an instruction which depends on both a post-incremented 
induction variable value and a loop-variant value, don't force the
insert position to be at the post-increment position, because it may
not be dominated by the loop-variant value. This fixes a
use-before-def problem noticed on PPC.

llvm-svn: 96774
 2010-02-22 03:59:54 +00:00
Dan Gohman
8c51905154 This cast<Instruction> is unnecessary. 
llvm-svn: 96771
 2010-02-22 02:07:36 +00:00
Chris Lattner
8b7f191696 enhance my hack for flags handling, this allows us to pass 
CodeGen/X86/pr2182.ll.  Down to 13 x86 failures out of ~1100

llvm-svn: 96770
 2010-02-22 00:47:38 +00:00
Chris Lattner
a739bef2eb fix an incorrect VT: eflags is always i32. The bug was causing us to 
create an X86ISD::Cmp node with result type i64 on the 
CodeGen/X86/shift-i256.ll testcase and the new isel was assert on it
downstream.

llvm-svn: 96768
 2010-02-22 00:28:59 +00:00
Chris Lattner
85fa3173ff fix most of the failures in the x86 suite by handling multiple 
result nodes correctly.  Note that this includes a horrible hack
in DAGISelHeader which cannot be fixed reasonably without 
eliminating (parallel) from input patterns.  That, in turn,
can't be done until we support writing multiple result patterns
for the X86and_flag and related multiple-result nodes.

llvm-svn: 96767
 2010-02-21 23:54:05 +00:00
Daniel Dunbar
a6d1ef6ee9 MC/X86: Add stub AsmBackend. 
llvm-svn: 96763
 2010-02-21 21:54:14 +00:00
Daniel Dunbar
b6b58bff88 MC: Sketch registry support for target specific assembler backends. 
llvm-svn: 96762
 2010-02-21 21:53:53 +00:00
Daniel Dunbar
518e9cbe46 Formatting tweaks (trailing whitespace, ordering, comments). 
llvm-svn: 96761
 2010-02-21 21:53:37 +00:00
Chris Lattner
1918d5b0aa fix an odd thinko in an assertion, all arm tests pass now. 
llvm-svn: 96758
 2010-02-21 20:57:28 +00:00
Chris Lattner
691dcb90a4 Always emit register class id references as i32 like 
DAGISelEmitter does.  This fixes 11 arm failures (8 
left).

llvm-svn: 96757
 2010-02-21 20:53:45 +00:00
Chris Lattner
37f20c29c8 add some no-unwinds, other minor cleanups. 
llvm-svn: 96756
 2010-02-21 20:33:20 +00:00
Anton Korobeynikov
0b402e1a61 It turned out that we failed to emit proper symbol stubs on non-x86/darwin for ages (we emitted a reference to a stub, but no stub was emitted). The code inside x86-32/macho target objfile lowering should actually be the generic one - move it there. 
This (I really, really hope) should fix EH issues on ppc/darwin
and arm/darwin.

llvm-svn: 96755
 2010-02-21 20:28:15 +00:00
Chris Lattner
4473066b55 speculatively teach OPC_CheckValueType and OPC_EmitNode to handle 
MVT::iPTR.

llvm-svn: 96753
 2010-02-21 20:15:25 +00:00
Chris Lattner
11ea2e1578 teach OPC_CheckType to handle MVT::iPTR, down to 2 ppc failures. 
llvm-svn: 96752
 2010-02-21 20:10:43 +00:00
Chris Lattner
26215565bf make this check a bit more generous, it may be outliving its 
utility.  Down to 6 ppc failures.

llvm-svn: 96751
 2010-02-21 20:02:15 +00:00
Chris Lattner
3d7cc59f2c Relax an assertion a bit. We allow replacing things like 
<4 x i32> with <4 x float> values if they end up the same
register class.  This gets us up to 231 passes on the ppc
tests (only 7 fails).

llvm-svn: 96750
 2010-02-21 19:35:07 +00:00
Chris Lattner
fa1fdcf146 add a triple so that this doesn't fail due to linux/ppc register printing 
syntax.

llvm-svn: 96748
 2010-02-21 19:27:38 +00:00
Chris Lattner
fc00a4e6b8 Sort the patterns before adding them to the FA so that we get the 
least cost matches.  This gets us from 195 -> 208 passes on the ppc codegen tests.

llvm-svn: 96747
 2010-02-21 19:22:06 +00:00
Duncan Sands
23f728e995 Remove a bunch of duplicated code, where there was one version taking a std::ostream 
and another taking a raw_ostream, but otherwise identical.  Use raw_ostream everywhere.

llvm-svn: 96746
 2010-02-21 19:15:19 +00:00
Chris Lattner
654f38165b filecheckize and add nouwinds. 
llvm-svn: 96745
 2010-02-21 18:53:28 +00:00
Jakob Stoklund Olesen
3a434bf60d Enable assertion to detect cyclic valno references. 
This changes the stack overflow in PR6363 to an assertion failure.

llvm-svn: 96744
 2010-02-21 18:51:48 +00:00
Anton Korobeynikov
fe0d6453ec IT turns out that during jumpless setcc lowering eq and ne were swapped. 
This fixes PR6348

llvm-svn: 96734
 2010-02-21 12:28:58 +00:00
Chris Lattner
c7fac8c8b2 when a match fails and we have to rollback, make sure to keep 'N' in 
sync with the top of stack.  This fixes a bunch of failures on larger
testcases.

llvm-svn: 96732
 2010-02-21 07:55:48 +00:00
Chris Lattner
e8842eb260 handle optional in flags that aren't present. 
llvm-svn: 96731
 2010-02-21 07:19:06 +00:00
Chris Lattner
4a9c3615f8 emit table indexes before each row so that it is debuggable. 
llvm-svn: 96730
 2010-02-21 07:16:41 +00:00
Chris Lattner
8a969fb824 fix two bugs in OPC_EmitRegister, which makes ppc happier. 
llvm-svn: 96728
 2010-02-21 06:58:27 +00:00
Chris Lattner
594803ba50 fix a table size miscomputation, target opcodes are 2 bytes. 
With this, the matcher actually works reasonably well, but
crashes on larger examples in the scheduler.

llvm-svn: 96727
 2010-02-21 06:44:29 +00:00
Chris Lattner
98d6a38236 emit to the right streams, to avoid emitting the push 
body before the push.

llvm-svn: 96726
 2010-02-21 06:30:04 +00:00
Chris Lattner
359c75b60c oops don't turn this on for everyone yet. 
llvm-svn: 96725
 2010-02-21 06:03:56 +00:00
Chris Lattner
0164635dad implement the last known missing feature: updating uses of results 
of the matched pattern to use the newly created node results.  Onto
the "making it actually work" phase!

llvm-svn: 96724
 2010-02-21 06:03:07 +00:00
Chris Lattner
b328c57aa4 fix and un-xfail X86/vec_ss_load_fold.ll 
llvm-svn: 96720
 2010-02-21 04:53:34 +00:00
Johnny Chen
abea29dc85 Undo r96654. The printing of ARM shift instructions in canonical forms can be 
handled in ARMInstPrinter.cpp.

And added PLD/PLDW/PLI (Preload Data/Instruction) for disassembly only.

llvm-svn: 96719
 2010-02-21 04:42:01 +00:00
Charles Davis
9dbf8d7899 Reduce size of 'StackAlignment' field from 5 to 3 bits. Seriously, who needs a 
2GB-aligned stack anyway? 256 bytes is plenty. Requested by Chris.

llvm-svn: 96718
 2010-02-21 04:26:06 +00:00
Chris Lattner
b28cf9f8d9 temporarily disable this. 
llvm-svn: 96717
 2010-02-21 03:24:41 +00:00
Chris Lattner
8983077c87 Lots of improvements to the new dagisel emitter. This gets it to 
the point where it is to the 95% feature complete mark, it just
needs result updating to be done (then testing, optimization 
etc).

More specificallly, this adds support for chain and flag handling
on the result nodes, support for sdnodexforms, support for variadic
nodes, memrefs, pinned physreg inputs, and probably lots of other
stuff.

In the old DAGISelEmitter, this deletes the dead code related to
OperatorMap, cleans up a variety of dead stuff handling "implicit
remapping" from things like globaladdr -> targetglobaladdr (which
is no longer used because globaladdr always needs to be legalized),
and some minor formatting fixes.

llvm-svn: 96716
 2010-02-21 03:22:59 +00:00
Chris Lattner
fe81834e6e rename SelectScalarSSELoad -> SelectScalarSSELoadXXX and rewrite 
it to follow the mode needed by the new isel.  Instead of returning
the input and output chains, it just returns the (currently only one,
which is a silly limitation) node that has input and output chains.

Since we want the old thing to still work, add a new 
SelectScalarSSELoad to emulate the old interface.  The XXX suffix
and the wrapper will eventually go away.

llvm-svn: 96715
 2010-02-21 03:17:59 +00:00
Chris Lattner
bb364c9b46 add a hook so that the new isel can run SDNodeXForms. 
llvm-svn: 96714
 2010-02-21 03:15:11 +00:00
Chris Lattner
ad9fa2075b Eliminate some uses of immAllOnes, just use -1, it does 
the same thing and is more efficient for the matcher.

llvm-svn: 96713
 2010-02-21 03:13:10 +00:00
Chris Lattner
ce7be2638a Eliminate some uses of immAllOnes, just use -1, it does 
the same thing and is more efficient for the matcher.

llvm-svn: 96712
 2010-02-21 03:12:16 +00:00
Tanya Lattner
8664bf0d0b Test commit. 
llvm-svn: 96711
 2010-02-21 03:01:05 +00:00
Tanya Lattner
24f73d5814 Test commit 
llvm-svn: 96710
 2010-02-21 02:59:05 +00:00
Dan Gohman
220c2212c1 Rename getSDiv to getExactSDiv to reflect its behavior in cases where 
the division would have a remainder.

llvm-svn: 96693
 2010-02-19 19:35:48 +00:00
Dan Gohman
9db0689627 Check for overflow when scaling up an add or an addrec for 
scaled reuse.

llvm-svn: 96692
 2010-02-19 19:32:49 +00:00
Bob Wilson
df432a30b2 Revert 96634. It causes assertion failures for 126.gcc and 176.gcc in 
the armv6 nightly tests.

llvm-svn: 96691
 2010-02-19 18:59:53 +00:00
Dan Gohman
39b7e5961e Add a comment. 
llvm-svn: 96688
 2010-02-19 18:49:22 +00:00
Charles Davis
a64fc8c41b Add support for the 'alignstack' attribute to the x86 backend. Fixes PR5254. 
Also, FileCheck'ize a test.

llvm-svn: 96686
 2010-02-19 18:17:13 +00:00
Dan Gohman
9268d67079 Teach ScalarEvolution how to compute a tripcount for a loop with 
true or false as its exit condition. These are usually eliminated by
SimplifyCFG, but the may be left around during a pass which wishes
to preserve the CFG.

llvm-svn: 96683
 2010-02-19 18:12:07 +00:00