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Commit Graph

21668 Commits

Author SHA1 Message Date
Dale Johannesen
de53aaec39 Remove warning about 64-bit code on processor
that doesn't support it.  Per Chris.

llvm-svn: 47162
2008-02-15 18:09:51 +00:00
Lauro Ramos Venancio
4fcf9513f1 It is not safe to call fork in PrintStackTrace. Sometimes it freezes the program.
llvm-svn: 47161
2008-02-15 18:05:54 +00:00
Devang Patel
01f9252f73 Fix PR2028
llvm-svn: 47150
2008-02-15 01:24:49 +00:00
Dale Johannesen
da9de4b3f0 nocona, core2 and penryn support 64 bit.
llvm-svn: 47149
2008-02-15 01:22:41 +00:00
Chris Lattner
3bac9de032 Support vector constant zeros, thanks to Zack Rusin for the testcase.
llvm-svn: 47148
2008-02-15 00:57:28 +00:00
Dale Johannesen
6cb8a628a2 Rewrite tblgen handling of subtarget features so
it follows the order of the enum, not alphabetical.
The motivation is to make -mattr=+ssse3,+sse41
select SSE41 as it ought to.  Added "ignored"
enum values of 0 to PPC and SPU to avoid compiler
warnings.

llvm-svn: 47143
2008-02-14 23:35:16 +00:00
Devang Patel
8af92b942c If loop header is also loop exiting block then OrigPN is incoming value for B loop header.
Fixes PR 2030.

llvm-svn: 47141
2008-02-14 23:18:47 +00:00
Dan Gohman
9ca30afc39 Fix a warning about comparison between signed and unsigned,
being consistent with the rest of the APInt implementation.

llvm-svn: 47138
2008-02-14 22:38:45 +00:00
Chris Lattner
b8bf200b77 Fix PR2029
llvm-svn: 47129
2008-02-14 19:18:13 +00:00
Chris Lattner
9c24f3ec37 Fix a miscompilation from Dan's recent apintification.
llvm-svn: 47128
2008-02-14 18:48:56 +00:00
Nate Begeman
9deedb0114 Fix single precision FP constants on SPU. They are actually legal,
which allows us to kill a target-specific node.

llvm-svn: 47127
2008-02-14 18:43:04 +00:00
Duncan Sands
0056f1e823 In TargetLowering::LowerCallTo, don't assert that
the return value is zero-extended if it isn't
sign-extended.  It may also be any-extended.
Also, if a floating point value was returned
in a larger floating point type, pass 1 as the
second operand to FP_ROUND, which tells it
that all the precision is in the original type.
I think this is right but I could be wrong.
Finally, when doing libcalls, set isZExt on
a parameter if it is "unsigned".  Currently
isSExt is set when signed, and nothing is
set otherwise.  This should be right for all
calls to standard library routines.

llvm-svn: 47122
2008-02-14 17:28:50 +00:00
Nate Begeman
1ef1013b6c Change how FP immediates are handled.
1) ConstantFP is now expand by default
2) ConstantFP is not turned into TargetConstantFP during Legalize
   if it is legal.

This allows ConstantFP to be handled like Constant, allowing for 
targets that can encode FP immediates as MachineOperands.

As a bonus, fix up Itanium FP constants, which now correctly match,
and match more constants!  Hooray.

llvm-svn: 47121
2008-02-14 08:57:00 +00:00
Nate Begeman
8352abdd98 Support a new type of MachineOperand, MO_FPImmediate, used for holding
FP Immediates, crazily enough

llvm-svn: 47117
2008-02-14 07:39:30 +00:00
Chris Lattner
5005b4d0d8 simplify code, no functionality change.
llvm-svn: 47116
2008-02-14 07:39:01 +00:00
Nate Begeman
5d61361bb9 Move some useful operands up into the all-targets .td
llvm-svn: 47115
2008-02-14 07:25:46 +00:00
Nick Lewycky
0dd6ce5d3a Fix PR2032. Inform the alias analysis of changes to the underlying program.
llvm-svn: 47111
2008-02-14 07:11:24 +00:00
Chris Lattner
b714906acf upgrade some entries, remove stuff that is done.
llvm-svn: 47109
2008-02-14 06:19:02 +00:00
Chris Lattner
037aa64987 the mid-level optimizer removes this stuff.
llvm-svn: 47108
2008-02-14 05:43:18 +00:00
Chris Lattner
10dc770a36 this one is easy.
llvm-svn: 47107
2008-02-14 05:41:38 +00:00
Chris Lattner
d696c25db5 This readme entry is done, testcase here: CodeGen/X86/zero-remat.ll
llvm-svn: 47106
2008-02-14 05:39:46 +00:00
Dan Gohman
83374c9be5 Allow the APInt form of ComputeMaskedBits to operate on i128 types.
llvm-svn: 47101
2008-02-13 23:13:32 +00:00
Dan Gohman
737856bd0d Assigning an APInt to 0 with plain assignment gives it a one-bit
size. Initialize these APInts to properly-sized zero values.

llvm-svn: 47099
2008-02-13 23:07:24 +00:00
Dan Gohman
a5ad7ff23b Avoid setting bits that aren't demanded.
llvm-svn: 47098
2008-02-13 22:43:25 +00:00
Dan Gohman
99b38405e3 Simplify some logic in ComputeMaskedBits. And change ComputeMaskedBits
to pass the mask APInt by value, not by reference. 

llvm-svn: 47096
2008-02-13 22:28:48 +00:00
Devang Patel
38de2d11a5 A loop latch phi node may have uses inside loop, not just in loop header.
llvm-svn: 47093
2008-02-13 22:23:07 +00:00
Dan Gohman
588498082a Rename APInt's isPositive to isNonNegative, to reflect what it
actually does.

llvm-svn: 47090
2008-02-13 22:09:18 +00:00
Devang Patel
1e71afe2df While moving exit condition, do not drop loop latch on the floor.
llvm-svn: 47089
2008-02-13 22:06:36 +00:00
Dan Gohman
d22101a970 Add countTrailingOnes member functions to APInt.
llvm-svn: 47086
2008-02-13 21:11:05 +00:00
Devang Patel
d48bbbf07b Keep track of exit value operand number when operands are swapped.
llvm-svn: 47082
2008-02-13 19:48:48 +00:00
Nicolas Geoffray
72fa78e195 Enable exception handling int JIT
llvm-svn: 47079
2008-02-13 18:39:37 +00:00
Duncan Sands
2e9661573f Teach LegalizeTypes how to expand and promote CTLZ,
CTTZ and CTPOP.  The expansion code differs from
that in LegalizeDAG in that it chooses to take the
CTLZ/CTTZ count from the Hi/Lo part depending on
whether the Hi/Lo value is zero, not on whether
CTLZ/CTTZ of Hi/Lo returned 32 (or whatever the
width of the type is) for it.  I made this change
because the optimizers may well know that Hi/Lo
is zero and exploit it.  The promotion code for
CTTZ also differs from that in LegalizeDAG: it
uses an "or" to get the right result when the
original value is zero, rather than using a compare
and select.  This also means the value doesn't
need to be zero extended.

llvm-svn: 47075
2008-02-13 18:01:53 +00:00
Chris Lattner
80b3a56774 Fix the PPC JIT regressions by encoding zeroreg as 0 for BLR.
llvm-svn: 47067
2008-02-13 17:24:14 +00:00
Chris Lattner
c16c85444c remove some dead code.
llvm-svn: 47066
2008-02-13 17:18:26 +00:00
Devang Patel
8190e4fbe0 Remove use of ltdl
llvm-svn: 47065
2008-02-13 17:11:39 +00:00
Wojciech Matyjewicz
a62f8557d9 Fix typo. Thanks to Duncan for noticing.
llvm-svn: 47062
2008-02-13 12:21:32 +00:00
Wojciech Matyjewicz
86032c3a2f Add comments as per review feedback.
llvm-svn: 47061
2008-02-13 11:51:34 +00:00
Evan Cheng
d513437ce1 Some code clean up.
llvm-svn: 47060
2008-02-13 09:56:03 +00:00
Evan Cheng
84c503fdd4 Simplify.
llvm-svn: 47058
2008-02-13 09:13:21 +00:00
Evan Cheng
0e4d4f17cc Fix a potential serious problem where kills belonging to the val# defined by a two-address instruction is also on the val# that defines the input.
llvm-svn: 47057
2008-02-13 09:06:18 +00:00
Evan Cheng
e0cad13e5e * Cannot safely commute an instruction there are other defs which can reach its uses.
* Ignore copy instructions which have already been coalesced.

llvm-svn: 47056
2008-02-13 08:41:08 +00:00
Chris Lattner
a30946c576 In SDISel, for targets that support FORMAL_ARGUMENTS nodes, lower this
node as soon as we create it in SDISel.  Previously we would lower it in
legalize.  The problem with this is that it only exposes the argument
loads implied by FORMAL_ARGUMENTs after legalize, so that only dag combine 2
can hack on them.  This causes us to miss some optimizations because 
datatype expansion also happens here.

Exposing the loads early allows us to do optimizations on them.  For example
we now compile arg-cast.ll to:

_foo:
	movl	$2147483647, %eax
	andl	8(%esp), %eax
	ret

where we previously produced:

_foo:
	subl	$12, %esp
	movsd	16(%esp), %xmm0
	movsd	%xmm0, (%esp)
	movl	$2147483647, %eax
	andl	4(%esp), %eax
	addl	$12, %esp
	ret

It might also make sense to do this for ISD::CALL nodes, which have implicit
stores on many targets.

llvm-svn: 47054
2008-02-13 07:39:09 +00:00
Chris Lattner
57f2088225 don't try to avoid inserting loads when lowering FORMAL_ARGUMENTS.
DAGCombine is now quite good at zapifying them.

llvm-svn: 47053
2008-02-13 07:35:30 +00:00
Chris Lattner
c798882db7 teach dag combiner how to eliminate MERGE_VALUES nodes.
llvm-svn: 47052
2008-02-13 07:25:05 +00:00
Nate Begeman
5f18794295 readme updates
llvm-svn: 47051
2008-02-13 07:06:12 +00:00
Nate Begeman
f628b4b2a7 Support legalizing insert_vector_elt on targets where the element
type is not legal.

llvm-svn: 47048
2008-02-13 06:43:04 +00:00
Evan Cheng
d4ddda68fa Initial support for copy elimination by commuting its definition MI.
PR1877.
A3 = op A2 B0<kill>                                                                                                                                                                            
...                                                                                                                                                                                     
B1 = A3      <- this copy                                                                                                                                                                      
...                                                                                                                                                                                          
   = op A3   <- more uses                                                                                                                                                                      
                                                                                                                                                                                                 
==>                                                                                                                                                                                             
                                                                                                                                                                                            
B2 = op B0 A2<kill>                                                                                                                                                                            
...                                                                                                                                                                                          
B1 = B2      <- now an identify copy                                                                                                                                                           
...                                                                                                                                                                                          
   = op B2   <- more uses

This speeds up FreeBench/neural by 29%, Olden/bh by 12%, oopack_v1p8 by 53%.

llvm-svn: 47046
2008-02-13 03:01:43 +00:00
Nate Begeman
1867c6c264 Make register scavenging happy by not using a reg (CR0) that isn't defined
llvm-svn: 47045
2008-02-13 02:58:33 +00:00
Evan Cheng
da24989368 - Added removeValNo() to remove all live ranges of a particular value#.
- removeRange() can now update value# information.

llvm-svn: 47044
2008-02-13 02:48:26 +00:00
Evan Cheng
4b37f5ff05 commuteInstr() can now commute non-ssa machine instrs.
llvm-svn: 47043
2008-02-13 02:46:49 +00:00