Tom Stellard
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cf58aac74c
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DAGCombiner: Pass the correct type to TargetLowering::isF(Abs|Neg)Free
This commit also implements these functions for R600 and removes a test
case that was relying on the buggy behavior.
llvm-svn: 187007
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2013-07-23 23:55:03 +00:00 |
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Vincent Lejeune
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cc7d08e974
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R600: Schedule copy from phys register at beginning of block
It allows regalloc pass to remove them by trivially assigning associated reg
llvm-svn: 183336
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2013-06-05 20:27:35 +00:00 |
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Vincent Lejeune
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55871f8f8a
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R600: use capital letter for PV channel
llvm-svn: 183107
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2013-06-03 15:44:35 +00:00 |
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Vincent Lejeune
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5a2e018ab6
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R600: Use bottom up scheduling algorithm
llvm-svn: 182129
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2013-05-17 16:50:56 +00:00 |
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Vincent Lejeune
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62da1453e1
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R600: Prettier asmPrint of Alu
llvm-svn: 180956
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2013-05-02 21:52:30 +00:00 |
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Tom Stellard
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6f17e7033b
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Add R600 backend
A new backend supporting AMD GPUs: Radeon HD2XXX - HD7XXX
llvm-svn: 169915
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2012-12-11 21:25:42 +00:00 |
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