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8539 Commits

Author SHA1 Message Date
Craig Topper
3bc01e8fa4 Only perform DAG combine on FMAs of legal types. 
llvm-svn: 162892
 2012-08-30 06:56:15 +00:00
Michael Liao
0e40defe86 Fix PR13727 
- The root cause is that target constant materialization in X86 fast-isel
  creates a PC-rel addressing which may overflow 32-bit range in non-Small code
  model if .rodata section is allocated too far away from code segment in
  MCJIT, which uses Large code model so far.
- Follow the similar logic to fix non-Small code model in fast-isel by skipping
  non-Small code model.

llvm-svn: 162881
 2012-08-30 00:30:16 +00:00
Benjamin Kramer
49d736fb29 Make helper function static. 
llvm-svn: 162843
 2012-08-29 16:17:01 +00:00
Craig Topper
aa2444a397 Convert FMA4 patterns to use target specific nodes instead of intrinsics to align with FMA3. 
llvm-svn: 162829
 2012-08-29 07:18:25 +00:00
Chad Rosier
eed9ef7a03 Typo. 
llvm-svn: 162807
 2012-08-28 23:57:47 +00:00
Michael Liao
2136b1b1ed Add comments on the literal value used. 
llvm-svn: 162805
 2012-08-28 23:42:17 +00:00
Michael Liao
32ad80c81f Explicitly update the number of nodes to be traversed 
llvm-svn: 162780
 2012-08-28 19:20:29 +00:00
Bill Wendling
6488dc22bb The commutative flag is already correctly set within the multiclass. If we set 
it here, then a 'register-memory' version would wrongly get the commutative
flag.
<rdar://problem/12180135>

llvm-svn: 162741
 2012-08-28 07:36:46 +00:00
Craig Topper
803047a9bb Convert V_SETALLONES/AVX_SETALLONES/AVX2_SETALLONES to Post-RA pseudos. 
llvm-svn: 162740
 2012-08-28 07:30:47 +00:00
Craig Topper
02bb8ce5e0 Merge AVX_SET0PSY/AVX_SET0PDY/AVX2_SET0 into a single post-RA pseudo. 
llvm-svn: 162738
 2012-08-28 07:05:28 +00:00
Michael Liao
1f793b9c47 Fix PR12312 
- Add a target-specific DAG optimization to recognize a pattern PTEST-able.
  Such a pattern is a OR'd tree with X86ISD::OR as the root node. When
  X86ISD::OR node has only its flag result being used as a boolean value and
  all its leaves are extracted from the same vector, it could be folded into an
  X86ISD::PTEST node.

llvm-svn: 162735
 2012-08-28 03:34:40 +00:00
Jakob Stoklund Olesen
882cb360be More missing mayLoad flags on AVX multiclasses. 
llvm-svn: 162714
 2012-08-28 00:02:01 +00:00
Craig Topper
3e5376d85a Remove MMX shift intrinsic handling code that also exists in SelectionDAGBuilder. 
llvm-svn: 162661
 2012-08-27 08:08:30 +00:00
Craig Topper
bbee14ad9d Don't allow vextractf128 to be folded with unaligned stores. We don't fold unaligned loads so shouldn't fold unaligned stores as it can cause an alignment fault to occur. 
llvm-svn: 162658
 2012-08-27 07:19:59 +00:00
Craig Topper
57dd6db42e Fold some patterns into instruction definitons so tablegen can infer flags removing the need for an explicit 'neverHasSideEffects = 1' 
llvm-svn: 162656
 2012-08-27 07:04:50 +00:00
Craig Topper
b524d2e36d Add HasAVX1Only predicate and use it for patterns that have an AVX1 instruction and an AVX2 instruction rather than relying on AddedComplexity. 
llvm-svn: 162654
 2012-08-27 06:08:57 +00:00
Richard Smith
865f47cbb6 Fix integer undefined behavior due to signed left shift overflow in LLVM. 
Reviewed offline by chandlerc.

llvm-svn: 162623
 2012-08-24 23:29:28 +00:00
Jakob Stoklund Olesen
d1820cea0b Add missing mayLoad flags to a large class of AVX *_Int instructions. 
llvm-svn: 162622
 2012-08-24 23:29:07 +00:00
Jakob Stoklund Olesen
9ebe947bb0 Mark X86::RET and RETI instructions as variadic. 
There is special magic happening when returning floating point values on
the x87 stack. The RET instructions get extra f80 operands.

llvm-svn: 162592
 2012-08-24 20:52:44 +00:00
Jakob Stoklund Olesen
48bb81b28a Remove more mayLoad workarounds. 
llvm-svn: 162556
 2012-08-24 14:43:22 +00:00
Craig Topper
aa57ba3944 Custom lower FMA intrinsics to target specific nodes and remove the patterns. 
llvm-svn: 162534
 2012-08-24 04:03:22 +00:00
Jakob Stoklund Olesen
3739d6ca99 Remove some spurious mayLoad = 0 flags. 
They were inserted to silence TableGen's warning about
redundant properties. That warning is now gone.

llvm-svn: 162517
 2012-08-24 00:31:20 +00:00
Jakob Stoklund Olesen
2f512d8eba X86MemBarrier has unmodeled side effects. 
llvm-svn: 162514
 2012-08-24 00:31:10 +00:00
Jakob Stoklund Olesen
16126ffe0d Preserve operand flags in convertToThreeAddress() by copying operands. 
No test case, this is a generalization of r160260.

llvm-svn: 162485
 2012-08-23 22:36:31 +00:00
Craig Topper
3d4254e5b4 Favor FMA3 over FMA4 if both are enabled. 
llvm-svn: 162454
 2012-08-23 18:14:30 +00:00
Craig Topper
528004fc78 Use a switch statement instead of a bunch of if-else checks and pull out the common function call. 
llvm-svn: 162428
 2012-08-23 04:57:36 +00:00
Chad Rosier
437076336a [ms-inline asm] Avoid a false positive assertion 
Assertion failed: (Start.isValid() == End.isValid() && "Start and end should 
either both be valid or both be invalid!")

when parsing inline asm.  SMLoc assumes that the first char * in the source is
invalid.  However, when parsing an inline asm the mnemonic is at this location.
I don't want to change SMLoc, so use a trivial workaround.

llvm-svn: 162381
 2012-08-22 19:14:29 +00:00
Craig Topper
d66ff79b2c Add a getName function to MachineFunction. Use it in places that previously did getFunction()->getName(). Remove includes of Function.h that are no longer needed. 
llvm-svn: 162347
 2012-08-22 06:07:19 +00:00
Craig Topper
ba3d5bef9f Don't cache the MBB in the class. Its only used by one function. Change a for loop over operands to use unsigned instead of int. 
llvm-svn: 162344
 2012-08-22 05:59:59 +00:00
Craig Topper
37bdfa3177 Mark a function as static since it doesn't use anything in the class. 
llvm-svn: 162342
 2012-08-22 05:36:44 +00:00
Richard Smith
d1addbb679 Fix unaligned memory accesses when performing relocations in X86 JIT. There's 
no cost to using memcpy here: the fixed code is optimized by LLVM to perfect
machine code.

llvm-svn: 162311
 2012-08-21 20:48:36 +00:00
Chad Rosier
92debd58d9 [ms-inline asm] Do not report a Parser error when matching inline assembly. 
llvm-svn: 162306
 2012-08-21 19:36:59 +00:00
Chad Rosier
72a2747c53 [ms-inline asm] Expose the ErrorInfo from the MatchInstructionImpl. In general, 
this is the index of the operand that failed to match.

Note: This may cause a buildbot failure due to an API mismatch in clang.  Should
recover with my next commit to clang.

llvm-svn: 162295
 2012-08-21 18:14:59 +00:00
Craig Topper
45eeb13dea Fix up indentation and remove a couple else's after returns. 
llvm-svn: 162270
 2012-08-21 08:29:51 +00:00
Craig Topper
aba5024223 Use uint16_t for tables of opcodes. 
llvm-svn: 162267
 2012-08-21 08:23:21 +00:00
Craig Topper
9831045ed8 Fix up indentation. No functional change. 
llvm-svn: 162264
 2012-08-21 08:17:07 +00:00
Craig Topper
63ef1d8341 Add a couple llvm_unreachables. Add a message to several others. 
llvm-svn: 162263
 2012-08-21 08:16:16 +00:00
Craig Topper
3ba0ae7ec3 Replace a break with llvm_unreachable in the default case of a nested switch. Condense code a bit. No functional change. 
llvm-svn: 162261
 2012-08-21 07:32:16 +00:00
Craig Topper
e432edabf1 Cleanup the scalar FMA3 definitions. Add patterns to fold loads with scalar forms. 
llvm-svn: 162260
 2012-08-21 07:11:11 +00:00
Craig Topper
2e63b3ea18 Merge FMA3 instructions with and without patterns into single classes using null_frag. 
llvm-svn: 162257
 2012-08-21 05:56:45 +00:00
Michael Liao
3d421a0c4d fix a case where all operands of BUILD_VECTOR are undefined 
llvm-svn: 162214
 2012-08-20 17:59:18 +00:00
Craig Topper
77406bef3b Remove FMA3 intrinsic instructions in favor of patterns. 
llvm-svn: 162194
 2012-08-20 06:21:25 +00:00
Craig Topper
64c93f9d07 Use correct intrinsic for 256-bit VFMSUBADDPS. 
llvm-svn: 162193
 2012-08-20 06:03:04 +00:00
Craig Topper
832951e7da Remove trailing white space and tab characters. No functional change. 
llvm-svn: 162192
 2012-08-19 23:37:46 +00:00
Nadav Rotem
589dc766e0 When unsafe math is used, we can use commutative FMAX and FMIN. In some cases 
this allows for better code generation.

Added a new DAGCombine transformation to convert FMAX and FMIN to FMANC and
FMINC, which are commutative.

For example:

  movaps  %xmm0, %xmm1
  movsd LC(%rip), %xmm0
  minsd %xmm1, %xmm0

becomes:

  minsd LC(%rip), %xmm0

llvm-svn: 162187
 2012-08-19 13:06:16 +00:00
Nadav Rotem
d01a7b5942 Reapply r162160 with a fix: Optimize Arith->Trunc->SETCC sequence to allow better compare/branch code. 
llvm-svn: 162172
 2012-08-18 17:53:03 +00:00
Craig Topper
e341db552a Refactor code a bit to reduce number of calls in the final compiled code. No functional change intended. 
llvm-svn: 162166
 2012-08-18 06:39:34 +00:00
Nadav Rotem
e9cdefa762 Revert r162160 because it made a few buildbots fail. 
llvm-svn: 162164
 2012-08-18 05:02:36 +00:00
Nadav Rotem
76f1b84f58 The X86 backend has a number of optimizations for SETCC nodes which use 
arithmetic instructions. However, when small data types are used, a truncate
node appears between the SETCC node and the arithmetic operation. This patch
adds support for this pattern.

Before:
  xorl  %esi, %edi
  testb %dil, %dil
  setne %al
  ret

After:
  xorb  %dil, %sil
  setne %al
  ret

rdar://12081007

llvm-svn: 162160
 2012-08-18 02:43:28 +00:00
Craig Topper
efc1bf9ee1 Use nested switch to select arguments to reduce calls to EmitPCMP. 
llvm-svn: 162089
 2012-08-17 07:15:56 +00:00