4 Commits

Author	SHA1	Message	Date
Kazushi (Jam) Marukawa	f1ff8145c5	[VE] Change calling convention to follow ABI ... Change to expand all arguments and return values to i64 to follow ABI. Update regression tests also. Reviewed By: simoll Differential Revision: https://reviews.llvm.org/D84581	2020-08-01 10:08:54 +09:00
Kazushi (Jam) Marukawa	1606ebb720	[VE] Update branch instructions ... Summary: Changing all mnemonic to match assembly instructions to simplify mnemonic naming rules. This time update all branch instructions. This also change to use %s10 register consistently. Differential Revision: https://reviews.llvm.org/D78889	2020-04-28 09:41:01 +02:00
Kazushi (Jam) Marukawa	50f1e24f05	[VE] Update lea/load/store instructions ... Summary: Modify lea/load/store instructions to accept `disp(index, base)` style addressing mode (called ASX format). Also, uniform the number of DAG nodes to have 3 operands for this ASX format instructions, and update selectADDR functions to lower appropriate MI. Reviewers: arsenm, simoll, k-ishizaka Reviewed By: simoll Differential Revision: https://reviews.llvm.org/D76822	2020-04-06 11:49:46 +02:00
Kazushi (Jam) Marukawa	8a8a4f905c	[VE] Support for PIC (global data and calls) ... Summary: Support for PIC with tests for global variables and function calls. Reviewed By: arsenm Differential Revision: https://reviews.llvm.org/D74536	2020-02-14 09:50:02 +01:00