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1559 Commits

Author SHA1 Message Date
Chris Lattner
b3b7cf3be6 wrap long lines 
llvm-svn: 30662
 2006-09-28 23:32:43 +00:00
Chris Lattner
c1adb2f1d3 Shift amounts are always 32-bits, even in 64-bit mode. This fixes 
CodeGen/PowerPC/2006-09-28-shift_64.ll

llvm-svn: 30652
 2006-09-28 20:48:45 +00:00
Chris Lattner
26213b40aa Use abstract private/comment directives, to increase portability to ppc/linux 
llvm-svn: 30621
 2006-09-27 02:55:21 +00:00
Chris Lattner
09176ab54f Compile: 
int x __attribute__((used));

to:

        .data
.comm _x,4              ; 'x'
        .no_dead_strip  _x

on both x86 and ppc darwin targets.

llvm-svn: 30605
 2006-09-26 03:39:53 +00:00
Nate Begeman
7bcce1a7f6 Fold AND and ROTL more often 
llvm-svn: 30577
 2006-09-22 05:01:56 +00:00
Chris Lattner
663748827c The DarwinAsmPrinter need not check for isDarwin. createPPCAsmPrinterPass 
should create the right asmprinter subclass.

llvm-svn: 30542
 2006-09-20 17:12:19 +00:00
Chris Lattner
6d66264a5f Wrap some darwin'isms with isDarwin checks. 
llvm-svn: 30541
 2006-09-20 17:07:15 +00:00
Chris Lattner
6b434ee662 item done 
llvm-svn: 30518
 2006-09-20 06:41:56 +00:00
Chris Lattner
102718b1b2 This is already done 
llvm-svn: 30512
 2006-09-20 04:59:33 +00:00
Chris Lattner
4d97247875 Improve PPC64 equality comparisons like PPC32 comparisons. 
llvm-svn: 30510
 2006-09-20 04:33:27 +00:00
Chris Lattner
69390a3f80 Two improvements: 
1. Codegen this comparison:
     if (X == 0x8000)

as:

        cmplwi cr0, r3, 32768
        bne cr0, LBB1_2 ;cond_next

instead of:

        lis r2, 0
        ori r2, r2, 32768
        cmpw cr0, r3, r2
        bne cr0, LBB1_2 ;cond_next


2. Codegen this comparison:
      if (X == 0x12345678)

as:

        xoris r2, r3, 4660
        cmplwi cr0, r2, 22136
        bne cr0, LBB1_2 ;cond_next

instead of:

        lis r2, 4660
        ori r2, r2, 22136
        cmpw cr0, r3, r2
        bne cr0, LBB1_2 ;cond_next

llvm-svn: 30509
 2006-09-20 04:25:47 +00:00
Chris Lattner
ee42b9ae24 Add a note that we should match rlwnm better 
llvm-svn: 30508
 2006-09-20 03:59:25 +00:00
Chris Lattner
3057944738 Legalize is no longer limited to cleverness with just constant shift amounts. 
Allow it to be clever when possible and fall back to the gross code when needed.

This allows us to compile:

long long foo1(long long X, int C) {
  return X << (C|32);
}
long long foo2(long long X, int C) {
  return X << (C&~32);
}

to:
_foo1:
        rlwinm r2, r5, 0, 27, 31
        slw r3, r4, r2
        li r4, 0
        blr


        .globl  _foo2
        .align  4
_foo2:
        rlwinm r2, r5, 0, 27, 25
        subfic r5, r2, 32
        slw r3, r3, r2
        srw r5, r4, r5
        or r3, r3, r5
        slw r4, r4, r2
        blr

instead of:

_foo1:
        ori r2, r5, 32
        subfic r5, r2, 32
        addi r6, r2, -32
        srw r5, r4, r5
        slw r3, r3, r2
        slw r6, r4, r6
        or r3, r3, r5
        slw r4, r4, r2
        or r3, r3, r6
        blr


        .globl  _foo2
        .align  4
_foo2:
        rlwinm r2, r5, 0, 27, 25
        subfic r5, r2, 32
        addi r6, r2, -32
        srw r5, r4, r5
        slw r3, r3, r2
        slw r6, r4, r6
        or r3, r3, r5
        slw r4, r4, r2
        or r3, r3, r6
        blr

llvm-svn: 30507
 2006-09-20 03:47:40 +00:00
Chris Lattner
92c8924309 Fold the PPCISD shifts when presented with 0 inputs. This occurs for code 
like:
long long test(long long X, int Y) {
  return 1ULL << Y;
}
long long test2(long long X, int Y) {
  return -1LL << Y;
}

which we used to compile to:

_test:
        li r2, 1
        subfic r3, r5, 32
        li r4, 0
        addi r6, r5, -32
        srw r3, r2, r3
        slw r4, r4, r5
        slw r6, r2, r6
        or r3, r4, r3
        slw r4, r2, r5
        or r3, r3, r6
        blr
_test2:
        li r2, -1
        subfic r3, r5, 32
        addi r6, r5, -32
        srw r3, r2, r3
        slw r4, r2, r5
        slw r2, r2, r6
        or r3, r4, r3
        or r3, r3, r2
        blr

Now we produce:

_test:
        li r2, 1
        addi r3, r5, -32
        subfic r4, r5, 32
        slw r3, r2, r3
        srw r4, r2, r4
        or r3, r4, r3
        slw r4, r2, r5
        blr
_test2:
        li r2, -1
        subfic r3, r5, 32
        addi r6, r5, -32
        srw r3, r2, r3
        slw r4, r2, r5
        slw r2, r2, r6
        or r3, r4, r3
        or r3, r3, r2
        blr

llvm-svn: 30479
 2006-09-19 05:22:59 +00:00
Chris Lattner
ce85ffa396 add a note 
llvm-svn: 30377
 2006-09-14 20:56:30 +00:00
Evan Cheng
dd52a60189 Reflects MachineConstantPoolEntry changes. 
llvm-svn: 30279
 2006-09-12 21:04:05 +00:00
Nate Begeman
1109e4a222 Behold, more work on relocations. Things are looking pretty good now. 
llvm-svn: 30240
 2006-09-10 23:03:44 +00:00
Nate Begeman
2dfa13e74f First pass at supporting relocations. Relocations are written correctly to 
the file now, however the relocated address is currently wrong.  Fixing
that will require some deep pondering.

llvm-svn: 30207
 2006-09-08 22:42:09 +00:00
Jim Laskey
8cbf601f06 Missing tab 
llvm-svn: 30188
 2006-09-08 13:06:56 +00:00
Nate Begeman
bb053826f9 We actually do support object file writing, so don't return true (error) 
llvm-svn: 30173
 2006-09-08 03:42:15 +00:00
Jim Laskey
160a8aa339 1. Remove condition on delete. 
2. Protect and outline createTargetAsmInfo.

3. Misc. kruft.

llvm-svn: 30169
 2006-09-07 23:39:26 +00:00
Jim Laskey
9da25f6119 Make target asm info a property of the target machine. 
llvm-svn: 30162
 2006-09-07 22:06:40 +00:00
Jim Laskey
a64fe8ccf2 Break out target asm info into separate files. 
llvm-svn: 30161
 2006-09-07 22:05:02 +00:00
Jim Laskey
6b86ef852c Separate target specific asm properties from the asm printers. 
llvm-svn: 30126
 2006-09-06 18:34:40 +00:00
Chris Lattner
9cd4e3429e Completely eliminate def&use operands. Now a register operand is EITHER a 
def operand or a use operand.

llvm-svn: 30109
 2006-09-05 02:31:13 +00:00
Chris Lattner
33c9ddc91d Completely rearchitect the interface between targets and the pass manager. 
This pass:

1. Splits TargetMachine into TargetMachine (generic targets, can be implemented
any way, like the CBE) and LLVMTargetMachine (subclass of TM that is used by
things using libcodegen and other support).
2. Instead of having each target fully populate the passmgr for file or JIT
   output, move all this to common code, and give targets hooks they can
   implement.
3. Commonalize the target population stuff between file emission and JIT
   emission.
4. All (native code) codegen stuff now happens in a FunctionPassManager, which
   paves the way for "fast -O0" stuff in the CFE later, and now LLC could
   lazily stream .bc files from disk to use less memory.
5. There are now many fewer #includes and the targets don't depend on the
   scalar xforms or libanalysis anymore (but codegen does).
6. Changing common code generator pass ordering stuff no longer requires
   touching all targets.
7. The JIT now has the option of "-fast" codegen or normal optimized codegen,
   which is now orthogonal to the fact that JIT'ing is being done.

llvm-svn: 30081
 2006-09-04 04:14:57 +00:00
Chris Lattner
fb12884be6 Simplify target construction. 
llvm-svn: 30070
 2006-09-03 18:44:02 +00:00
Jim Laskey
d44e9493e6 Handle callee saved registers in dwarf frame info (lead up to exception 
handling.)

llvm-svn: 29954
 2006-08-29 16:24:26 +00:00
Nate Begeman
a67a1ec1cd Make ppc64 jit kinda work right. About 2/3 of Olden passes with this, 
there are clearly some encoding bugs lurking in there somewhere.

llvm-svn: 29949
 2006-08-29 02:30:59 +00:00
Reid Spencer
2567610703 For PR387: 
Close out this long standing bug by removing the remaining overloaded
virtual functions in LLVM. The -Woverloaded-virtual option is now turned on.

llvm-svn: 29934
 2006-08-28 01:02:49 +00:00
Chris Lattner
33bd5dcfb7 s|llvm/Support/Visibility.h|llvm/Support/Compiler.h| 
llvm-svn: 29911
 2006-08-27 12:54:02 +00:00
Evan Cheng
a6f81f1863 Do not use getTargetNode() and SelectNodeTo() which takes more than 3 
SDOperand arguments. Use the variants which take an array and number instead.

llvm-svn: 29907
 2006-08-27 08:14:06 +00:00
Evan Cheng
1c3d571e4b SelectNodeTo now returns a SDNode*. 
llvm-svn: 29901
 2006-08-26 08:00:10 +00:00
Evan Cheng
2db7799507 Select() no longer require Result operand by reference. 
llvm-svn: 29898
 2006-08-26 05:34:46 +00:00
Evan Cheng
b246ad7b2f Match tblgen changes. 
llvm-svn: 29895
 2006-08-26 01:07:58 +00:00
Evan Cheng
92239fd096 Add a comment. 
llvm-svn: 29889
 2006-08-25 23:29:06 +00:00
Evan Cheng
ccbb645459 Encode pc-relative conditional branch offset as pc+(num of bytes / 4). The 
asm printer will print it as offset*4. e.g. bne cr0, $+8.

The PPC code emitter was expecting the offset to be number of instructions, not
number of bytes. This fixes a whole bunch of JIT failures.

llvm-svn: 29885
 2006-08-25 21:54:44 +00:00
Jim Laskey
c5bcc6d451 Fix some comments. 
llvm-svn: 29880
 2006-08-25 19:40:59 +00:00
Nate Begeman
1268d6cd46 Initial checkin of the Mach-O emitter. There's plenty of fixmes, but it 
does emit linkable .o files in very simple cases.

llvm-svn: 29850
 2006-08-23 21:08:52 +00:00
Chris Lattner
db290f7479 Constify some methods. Patch provided by Anton Vayvod, thanks! 
llvm-svn: 29756
 2006-08-17 22:00:08 +00:00
Chris Lattner
2c12a719c0 Fix PowerPC/2006-08-15-SelectionCrash.ll and simplify selection code. 
llvm-svn: 29715
 2006-08-15 23:48:22 +00:00
Nate Begeman
0e92042770 Emit .set directives for jump table entries when possible, which reduces 
the number of relocations in object files, shrinkifying them.

llvm-svn: 29650
 2006-08-12 21:29:52 +00:00
Chris Lattner
c482a5d057 Fix a bug in a recent refactoring that broke a bunch of stuff. 
llvm-svn: 29649
 2006-08-12 07:20:05 +00:00
Chris Lattner
8ca6e82bce Eliminate use of getNode that takes a vector. 
llvm-svn: 29614
 2006-08-11 17:38:39 +00:00
Chris Lattner
2f9c4426fc Convert vectors to fixed sized arrays and smallvectors. Eliminate use of getNode that takes a vector. 
llvm-svn: 29609
 2006-08-11 17:18:05 +00:00
Chris Lattner
7e905fba17 Fix miscompilation of float vector returns. Compile code to this: 
_func:
        vsldoi v2, v3, v2, 12
        vsldoi v2, v2, v2, 4
        blr

instead of:

_func:
        vsldoi v2, v3, v2, 12
        vsldoi v2, v2, v2, 4
***     vor f1, v2, v2
        blr

llvm-svn: 29607
 2006-08-11 16:47:32 +00:00
Evan Cheng
6053206580 Match tablegen changes. 
llvm-svn: 29604
 2006-08-11 09:08:15 +00:00
Evan Cheng
34a49551f5 CALLSEQ_* produces chain even if that's not needed. 
llvm-svn: 29603
 2006-08-11 09:03:33 +00:00
Chris Lattner
7b1362fa52 Start eliminating temporary vectors used to create DAG nodes. Instead, pass 
in the start of an array and a count of operands where applicable.  In many
cases, the number of operands is known, so this static array can be allocated
on the stack, avoiding the heap.  In many other cases, a SmallVector can be
used, which has the same benefit in the common cases.

I updated a lot of code calling getNode that takes a vector, but ran out of
time.  The rest of the code should be updated, and these methods should be
removed.

We should also do the same thing to eliminate the methods that take a
vector of MVT::ValueTypes.

It would be extra nice to convert the dagiselemitter to avoid creating vectors
for operands when calling getTargetNode.

llvm-svn: 29566
 2006-08-08 02:23:42 +00:00
Evan Cheng
d18be1d9c1 Match tablegen isel changes. 
llvm-svn: 29549
 2006-08-07 22:28:20 +00:00