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Commit Graph

156690 Commits

Author SHA1 Message Date
Mandeep Singh Grang
f387fa649a [RISCV] Silence an unused variable warning in release builds [NFC]
Summary:
Also minor cleanups:
1. Avoided multiple calls to Fixup.getKind()
2. Avoided multiple calls to getFixupKindInfo()
3. Removed a redundant return.

Reviewers: asb, apazos

Reviewed By: asb

Subscribers: rbar, johnrusso, llvm-commits

Differential Revision: https://reviews.llvm.org/D39881

llvm-svn: 317908
2017-11-10 19:09:28 +00:00
Craig Topper
382ee62e1f [X86] Add test case to demonstrate failure to fold the address computation of a simple gather from a global array. NFC
llvm-svn: 317905
2017-11-10 18:48:18 +00:00
Krzysztof Parzyszek
fd31de271f [Hexagon] Create HexagonISelDAGToDAG.h, NFC
llvm-svn: 317904
2017-11-10 18:39:45 +00:00
Krzysztof Parzyszek
a38d7036dc Allow separation of declarations and definitions in <Target>ISelDAGToDAG.inc
This patch adds the ability to include the member function declarations
in the instruction selector class separately from the member bodies.

Defining GET_DAGISEL_DECL macro to any value will only include the member
declarations. To include bodies, define GET_DAGISEL_BODY macro to be the
selector class name. Example:

  class FooDAGToDAGISel : public SelectionDAGISel {
    // Pull in declarations only.
    #define GET_DAGISEL_DECL
    #include "FooISelDAGToDAG.inc"
  };

  // Include the function bodies (with names qualified with the provided
  // class name).
  #define GET_DAGISEL_BODY FooDAGToDAGISel
  #include "FooISelDAGToDAG.inc"

When neither of the two macros are defined, the function bodies are emitted
inline (in the same way as before this patch).

Differential Revision: https://reviews.llvm.org/D39596

llvm-svn: 317903
2017-11-10 18:36:04 +00:00
Lang Hames
f8fa757956 [ADT] Rewrite mapped_iterator in terms of iterator_adaptor_base.
Summary:
This eliminates the boilerplate implementation of the iterator interface in
mapped_iterator.

This patch also adds unit tests that verify that the mapped function is applied
by operator* and operator->, and that references returned by the map function
are returned via operator*.

Reviewers: dblaikie, chandlerc

Subscribers: llvm-commits, mgorny

Differential Revision: https://reviews.llvm.org/D39855

llvm-svn: 317902
2017-11-10 17:41:28 +00:00
Craig Topper
f3eb90626c [X86] Add a def file to CPU vendor, type, and subtype encodings used by Host.cpp
Summary:
I want to leverage this to clean up some of the code in clang. This will allow us to simplify D39521 which was trying to do some of the same.

If we accurately keep the code in Host.cpp synced with new CPUs added to compile-rt/libgcc we should be able to use this file as a proxy for what's implemented in the libraries.

The entries for the CPUs recognized by the libraries use separate macros that define additional parameters like the name for __builtin_cpu_is and an alias string for the couple cases where __builtin_cpu_is accepts two different names.

All of the macros contain an ARCHNAME that is usually the same as the __builtin_cpu_is string, but sometimes isn't. This represents the name recognized by X86.td and -march.

I'm following the precedent set by ARM and AArch64 and adding this information to lib/Support/TargetParser.cpp

Reviewers: erichkeane, echristo, asbirlea

Reviewed By: echristo

Subscribers: llvm-commits, aemerson, kristof.beyls

Differential Revision: https://reviews.llvm.org/D39782

llvm-svn: 317900
2017-11-10 17:10:57 +00:00
Bob Haarman
50bb177930 LTO: don't fatal when value for cache key already exists
Summary:
LTO/Caching.cpp uses file rename to atomically set the value for a
cache key. On Windows, this fails when the destination file already
exists. Previously, LLVM would report_fatal_error in such
cases. However, because the old and the new value for the cache key
are supposed to be equivalent, it actually doesn't matter which one we
keep. This change makes it so that failing the rename when an openable
file with the desired name already exists causes us to report success
instead of fataling.

Reviewers: pcc, hans

Subscribers: mehdi_amini, llvm-commits, hiraditya

Differential Revision: https://reviews.llvm.org/D39874

llvm-svn: 317899
2017-11-10 17:08:21 +00:00
Adrian Prantl
cb6f1db18e Move test into X86 subdirectory.
llvm-svn: 317896
2017-11-10 16:36:04 +00:00
Jatin Bhateja
8e6a1223b6 [WebAssembly] Fix stack offsets of return values from call lowering.
Summary: Fixes PR35220

Reviewers: vadimcn, alexcrichton

Reviewed By: alexcrichton

Subscribers: pepyakin, alexcrichton, jfb, dschuff, sbc100, jgravelle-google, llvm-commits, aheejin

Differential Revision: https://reviews.llvm.org/D39866

llvm-svn: 317895
2017-11-10 16:26:04 +00:00
Florian Hahn
9f6d8068c3 [AArch64][SVE] Asm: More concise test format
Change the test format for SVE assembler/disassembler tests to be less verbose and have both tests in the same file.

The tests check the following:

 * All instructions are assembled correctly into the right encoding.
 * All instructions are disassembled correctly (into the preferred assembly format)
 * Without -mattr=+sve the instructions are not assembled.
 * Without -mattr=+sve the instructions are not disassembled.

This patch also adds several negative tests for SVE add/sub.


Patch by Sander De Smalen.

Reviewed by: rengolin, fhahn

Differential Revision: https://reviews.llvm.org/D39792

llvm-svn: 317894
2017-11-10 16:25:16 +00:00
Simon Pilgrim
83f7d663fd [X86] Add scheduling tests for DAA/DAS
llvm-svn: 317892
2017-11-10 15:49:41 +00:00
Igor Laevsky
7bf377f58b [llvm-opt-fuzzer] Add missed library dependence. Fir for rL317883
Differential Revision: https://reviews.llvm.org/D39555

llvm-svn: 317889
2017-11-10 15:08:14 +00:00
Simon Pilgrim
b1265ac91d [X86] Test non-i64 shld/shll tests on x86_64 targets as well as i686
llvm-svn: 317888
2017-11-10 13:43:04 +00:00
Igor Laevsky
96fd132acd [llvm-opt-fuzzer] Fix unused variable warning after rL317883
Differential Revision: https://reviews.llvm.org/D39555

llvm-svn: 317887
2017-11-10 13:19:14 +00:00
Simon Pilgrim
2568cc632c [X86] Add scheduling tests
- CBW etc sign extensions
 - CLC/CLD/CMC flag modifiers
 - CPUID

llvm-svn: 317885
2017-11-10 12:32:34 +00:00
Alexander Timofeev
5392608eb3 [AMDGPU] Prevent Machine Copy Propagation from replacing live copy with the dead one
Differential revision: https://reviews.llvm.org/D38754

llvm-svn: 317884
2017-11-10 12:21:10 +00:00
Igor Laevsky
7782f60123 [llvm-opt-fuzzer] Introduce llvm-opt-fuzzer for fuzzing optimization passes
This change adds generic fuzzing tools capable of running libFuzzer tests on
any optimization pass or combination of them.

Differential Revision: https://reviews.llvm.org/D39555

llvm-svn: 317883
2017-11-10 12:19:08 +00:00
Simon Pilgrim
4e493f2316 [X86] Added TODO list for missing generic x86 instruction scheduling tests.
Not sure if we want to add the more exotic system instructions (IRET etc.) as well?

llvm-svn: 317882
2017-11-10 12:04:39 +00:00
Karl-Johan Karlsson
b657959147 [RegisterCoalescer] Move debug value after rematerialize trivial def
Summary:
The associated debug value is updated when the virtual source register
of a copy is completely eliminated and replaced with a rematerialize
value in the defed register of the copy. As the debug value now is
associated with another register it also need to be moved, otherwise
the debug value isn't valid.

Reviewers: aprantl

Reviewed By: aprantl

Subscribers: MatzeB, llvm-commits, qcolombet

Differential Revision: https://reviews.llvm.org/D38024

llvm-svn: 317880
2017-11-10 09:48:40 +00:00
Jonas Paulsson
1b514619dd [RegAlloc, SystemZ] Increase number of LOCRs by passing "hard" regalloc hints.
* The method getRegAllocationHints() is now of bool type instead of void. If
true is returned, regalloc (AllocationOrder) will *only* try to allocate the
hints, as opposed to merely trying them before non-hinted registers.

* TargetRegisterInfo::getRegAllocationHints() is implemented for SystemZ with
an increase in number of LOCRs.

In this case, it is desired to force the hints even though there is a slight
increase in spilling, because if a non-hinted register would be allocated,
the LOCRMux pseudo would have to be expanded with a jump sequence. The LOCR
(Load On Condition) SystemZ instruction must have both operands in either the
low or high part of the 64 bit register.

Reviewers: Quentin Colombet and Ulrich Weigand
https://reviews.llvm.org/D36795

llvm-svn: 317879
2017-11-10 08:46:26 +00:00
Craig Topper
de1d072d04 [X86] Add support for combining FMADDSUB(A, B, FNEG(C))->FMSUBADD(A, B, C)
Support the opposite direction as well. Also add a TODO for not being able to combine FMSUB/FNMADD/FNMSUB with FNEG.

llvm-svn: 317878
2017-11-10 08:22:37 +00:00
Craig Topper
b7bb5eae93 [X86] Remove GCCBuiltin from intrinsics that are no longer used by clang.
I've also added TODOs for intrinsic removal.

llvm-svn: 317876
2017-11-10 06:07:37 +00:00
Yaxun Liu
f2debeba3c [AMDGPU] Fix pointer info for lowering load/store for r600 for amdgiz environment
r600 uses dummy pointer info for lowering load/store. Since dummy pointer info
assumes address space 0, this causes isel failure when temporary load/store SDNodes
are generated for amdgiz environment.

Since the offest is not constant, FixedStack pseudo source value cannot be used
to create the pointer info. This patch creates pointer info using llvm undef value.
At least this provides correct address space so that isel can be done correctly.

Differential Revision: https://reviews.llvm.org/D39698

llvm-svn: 317862
2017-11-10 02:03:28 +00:00
Yaxun Liu
a483fa88c1 [AMDGPU] Fix pointer info for pseudo source for r600
The pointer info for pseudo source for r600 is not correct when
alloca addr space is not 0, which causes invalid SDNode for r600---amdgiz.

This patch fixes that.

Differential Revision: https://reviews.llvm.org/D39670

llvm-svn: 317861
2017-11-10 01:53:24 +00:00
Tony Tye
34f9af3e72 [AMDGPU] Update code object description
- Use ELF header flags to identify processor.
 - Remove isa note record.
 - Add target feature section.
 - Make metadata for NumVGPRs, NumSGPRs and MaxFlatWorkGroupSize required.
 - Add FixedWorkGroupSize to CodeProps metadata.
 - Add ReqdWorkGroupSize* to kernel descriptor and move MaxFlatWorkGroupSize to be adjacent.
 - Move IsXNACKEnabled in the kernel descriptor to be at the end of the unused flags.
 - Remove IsDynamicCallStack from the metadata and kernel descriptor.
 - Remove legacy debugger metadata.
 - Remove old XNACK enabled processor names.

Differential Revision: https://reviews.llvm.org/D39828

llvm-svn: 317855
2017-11-10 01:00:54 +00:00
Volodymyr Sapsai
befcc521fc [ThinLTO] Fix missing call graph edges for calls with bitcasts.
This change doesn't fix the root cause of the miscompile PR34966 as the root
cause is in the linker ld64. This change makes call graph more complete
allowing to have better module imports/exports.

rdar://problem/35344706

Reviewers: tejohnson

Reviewed By: tejohnson

Subscribers: mehdi_amini, inglorion, eraman, llvm-commits, hiraditya

Differential Revision: https://reviews.llvm.org/D39356

llvm-svn: 317853
2017-11-10 00:47:47 +00:00
Bob Haarman
eca6346e71 [support] allocate exact size required for mapping in Support/Windws/Path.inc
Summary:
zturner suggested that mapped_file_region::init() on Windows seems to
create mappings that are larger than they need to be: Offset+Size
instead of Size. Indeed, that appears to be the case. I confirmed that
tests pass with mappings of just Size bytes, and fail with Size-1
bytes, suggesting that Size is indeed the correct value.

Reviewers: amccarth, zturner

Reviewed By: zturner

Subscribers: hiraditya, llvm-commits

Differential Revision: https://reviews.llvm.org/D39876

llvm-svn: 317850
2017-11-10 00:17:31 +00:00
Easwaran Raman
5c380db441 [SimplifyCFG] Fix a test case.
This was first committed in r317845, but had the order of branch weights
wrong and didn't properly check the output.

llvm-svn: 317848
2017-11-09 23:17:52 +00:00
Easwaran Raman
f6c9c0313c Add a wrapper function to set branch weights metadata.
Summary:
This wrapper checks if there is at least one non-zero weight before
setting the metadata.

Reviewers: davidxl

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D39872

llvm-svn: 317845
2017-11-09 22:52:20 +00:00
Sanjay Patel
13489de5da [Reassociate] regenerate test checks; NFC
llvm-svn: 317841
2017-11-09 22:41:39 +00:00
Kostya Serebryany
1433212fd3 [libFuzzer] update links in the docs
llvm-svn: 317837
2017-11-09 21:35:28 +00:00
Kostya Serebryany
e7a55e801f [libFuzzer] update the docs, document how to resume the merge
llvm-svn: 317836
2017-11-09 21:32:02 +00:00
Zachary Turner
d7b0abacde Add a Cross-compilation toolchain file for MSVC.
With this patch, you can now cross-compile for Windows
on non-Windows hosts.

Differential Revision: https://reviews.llvm.org/D39814

This allows cross-compiling for windows on other platforms.

llvm-svn: 317830
2017-11-09 20:38:16 +00:00
Paul Robinson
4494c25a38 Fix out-of-order stepping behavior in programs with hoisted constants.
When the Constant Hoisting pass moves expensive constants into a
common block, it would assign a debug location equal to the last use
of that constant. While this is certainly intuitive, it places the
constant in an out-of-order location, according to the debug location
information. This produces out-of-order stepping when debugging
programs affected by this pass.

This patch creates in-order stepping behavior by merging the debug
locations for hoisted constants, and the new insertion point.

Patch by Matthew Voss!

Differential Revision: https://reviews.llvm.org/D38088

llvm-svn: 317827
2017-11-09 20:01:31 +00:00
Alex Bradbury
b41889c358 [utils] Fix RISC-V support in update_llc_test_checks.py
scrub_asm_riscv now takes two arguments rather than one.

llvm-svn: 317826
2017-11-09 20:01:25 +00:00
Adrian Prantl
d77c420837 Preserve debug info when DAG-combinging (zext (truncate x)) -> (and x, mask).
rdar://problem/27139077

llvm-svn: 317825
2017-11-09 19:50:20 +00:00
Zachary Turner
61d980d677 [Support] Make llvm::Error and Expected faster.
Whenever LLVM_ENABLE_ABI_BREAKING_CHECKS is enabled, which
is usually the case for example when asserts are enabled,
Error's destructor does some additional checking to make sure
that that it does not represent an error condition and that it
was checked.

However, this is -- by definition -- not the likely codepath.
Some profiling shows that at least with some compilers, simply
calling assertIsChecked -- in a release build with full
optimizations -- can account for up to 15% of the entire
runtime of the program, even though this function should almost
literally be a no-op.

The problem is that the assertIsChecked function can be considered
too big to inline depending on the compiler's inliner.  Since it's
unlikely to ever need to failure path though, we can move it out
of line and force it to not be inlined, so that the fast path
can be inlined.

In my test (using lld to link clang with CMAKE_BUILD_TYPE=Release
and LLVM_ENABLE_ASSERTIONS=ON), this reduces link time from 27
seconds to 23.5 seconds, which is a solid 15% gain.

llvm-svn: 317824
2017-11-09 19:31:52 +00:00
Alexey Bataev
827225754a [SLP] Fix PR23510: Try to find best possible vectorizable stores.
Summary:
The analysis of the store sequence goes in straight order - from the
first store to the last. Bu the best opportunity for vectorization will
happen if we're going to use reverse order - from last store to the
first. It may be best because usually users have some initialization
part + further processing and this first initialization may confuse
SLP vectorizer.

Reviewers: RKSimon, hfinkel, mkuper, spatel

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D39606

llvm-svn: 317821
2017-11-09 19:07:16 +00:00
Sanjay Patel
4d3a024c41 [Reassociate] auto-generate test checks; NFC
llvm-svn: 317819
2017-11-09 18:26:49 +00:00
Sanjay Patel
96c9de8558 [Reassociate] don't name values "tmp"; NFCI
The toxic stew of created values named 'tmp' and tests that already have
values named 'tmp' and CHECK lines looking for values named 'tmp' causes
bad things to happen in our test line auto-generation scripts because it
wants to use 'TMP' as a prefix for unnamed values. Use less 'tmp' to 
avoid that.

llvm-svn: 317818
2017-11-09 18:14:24 +00:00
Mandeep Singh Grang
73b861566f [GlobalMerge] Stable sort GlobalSets to fix non-deterministic sort order
Summary: This fixes failure in CodeGen/AArch64/global-merge-group-by-use.ll uncovered by D39245.

Reviewers: ab, asl

Reviewed By: ab

Subscribers: aemerson, llvm-commits, kristof.beyls

Differential Revision: https://reviews.llvm.org/D39635

llvm-svn: 317817
2017-11-09 18:05:17 +00:00
Nuno Lopes
a74afab653 revert r317812 [BasicAA] fix build break by converting the previously introduced assert into an if stmt
The code has a bug, but some tests regress.
I'll discuss this further on the mailing list.

llvm-svn: 317815
2017-11-09 17:35:36 +00:00
Nuno Lopes
a2da14871b [BasicAA] fix build break by converting the previously introduced assert into an if stmt
Apparently V1Size == -1 doest imply V2Size == -1, which is a bit surprising to me.

llvm-svn: 317812
2017-11-09 17:06:42 +00:00
Sanjay Patel
e702925699 revert r317809 - [Reassociate] regenerate test checks; NFC
The reassociate pass generates named values such as "%tmp2" which trips up the script's regex's
because the script uses a 'TMP' prefix for unnamed values (%2).

llvm-svn: 317810
2017-11-09 16:46:04 +00:00
Sanjay Patel
ff281bbbbb [Reassociate] regenerate test checks; NFC
llvm-svn: 317809
2017-11-09 16:35:30 +00:00
Ulrich Weigand
c3b7f3ba61 [SystemZ] Add support for the "o" inline asm constraint
We don't really need any special handling of "offsettable"
memory addresses, but since some existing code uses inline
asm statements with the "o" constraint, add support for this
constraint for compatibility purposes.

llvm-svn: 317807
2017-11-09 16:31:57 +00:00
Sanjay Patel
e01649badd [Reassociate] regenerate test checks; NFC
llvm-svn: 317806
2017-11-09 16:30:19 +00:00
Sanjay Patel
d80997844a [Reassociate] add check lines; NFC
llvm-svn: 317805
2017-11-09 16:25:35 +00:00
Sanjay Patel
8be3f3e28c [Reassociate] add tests with 'reassoc' FMF and regenerate checks; NFC
llvm-svn: 317804
2017-11-09 16:23:32 +00:00
Nuno Lopes
ee4f30c74d [BasicAA] add assertion for corner case in aliasGEP()
llvm-svn: 317803
2017-11-09 16:16:46 +00:00