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Commit Graph

81753 Commits

Author SHA1 Message Date
Kevin Enderby
64c95fb56a Fixed a case of ARM disassembly getting an assert on a bad encoding
of a VST instruction.

llvm-svn: 154544
2012-04-11 22:40:17 +00:00
Akira Hatanaka
6636922675 Fix bugs in lowering of FCOPYSIGN nodes.
- FCOPYSIGN nodes that have operands of different types were not handled.
- Different code was generated depending on the endianness of the target.

Additionally, code is added that emits INS and EXT instructions, if they are
supported by target (they are R2 instructions).

llvm-svn: 154540
2012-04-11 22:13:04 +00:00
Jim Grosbach
8327980405 Remove incorrect comment.
llvm-svn: 154533
2012-04-11 21:09:54 +00:00
Jim Grosbach
80c9f4d837 Tidy up. Remove hard tab characters.
llvm-svn: 154532
2012-04-11 21:02:33 +00:00
Jim Grosbach
51aa44347a Tidy up. Whitespace.
llvm-svn: 154531
2012-04-11 21:02:30 +00:00
Benjamin Kramer
7341ba24fa Fix pasto.
llvm-svn: 154527
2012-04-11 20:20:37 +00:00
Chad Rosier
b41586c8e1 Typo.
llvm-svn: 154522
2012-04-11 19:21:58 +00:00
Andrew Trick
6d7aff8241 TableGen's regpressure: emit per-registerclass weight limits.
llvm-svn: 154518
2012-04-11 18:16:28 +00:00
Jim Grosbach
86b5cd7421 ARM 'vuzp.32 Dd, Dm' is a pseudo-instruction.
While there is an encoding for it in VUZP, the result of that is undefined,
so we should avoid it. Define the instruction as a pseudo for VTRN.32
instead, as the ARM ARM indicates.

rdar://11222366

llvm-svn: 154511
2012-04-11 17:40:18 +00:00
Andrew Trick
2628429e92 TableGen'd regpressure: register unit set pruning.
The pruning is more complete if it is not done incrementally. The code
is also a tad less convluted.

llvm-svn: 154510
2012-04-11 17:35:26 +00:00
Jim Grosbach
e54b48cd74 ARM 'vzip.32 Dd, Dm' is a pseudo-instruction.
While there is an encoding for it in VZIP, the result of that is undefined,
so we should avoid it. Define the instruction as a pseudo for VTRN.32
instead, as the ARM ARM indicates.

rdar://11221911

llvm-svn: 154505
2012-04-11 16:53:25 +00:00
Sylvestre Ledru
40d3066f8b Fix the build under Debian GNU/Hurd.
Thanks to Pino Toscano for the patch

llvm-svn: 154500
2012-04-11 15:35:36 +00:00
Benjamin Kramer
eba5ed591b Cache the hash value of the operands in the MDNode.
FoldingSet is implemented as a chained hash table. When there is a hash
collision during insertion, which is common as we fill the table until a
load factor of 2.0 is hit, we walk the chained elements, comparing every
operand with the new element's operands. This can be very expensive if the
MDNode has many operands.

We sacrifice a word of space in MDNode to cache the full hash value, reducing
compares on collision to a minimum. MDNode grows from 28 to 32 bytes + operands
on x86. On x86_64 the new bits fit nicely into existing padding, not growing
the struct at all.

The actual speedup depends a lot on the test case and is typically between
1% and 2% for C++ code with clang -c -O0 -g.

llvm-svn: 154497
2012-04-11 14:06:54 +00:00
Benjamin Kramer
c1e98c85e2 FoldingSet: Push the hash through FoldingSetTraits::Equals, so clients can use it.
llvm-svn: 154496
2012-04-11 14:06:47 +00:00
Benjamin Kramer
3a0f5a0df3 Compute hashes directly with hash_combine instead of taking a detour through FoldingSetNodeID.
llvm-svn: 154495
2012-04-11 14:06:39 +00:00
Nadav Rotem
210f92b306 remove unused argument
llvm-svn: 154494
2012-04-11 11:05:21 +00:00
Duncan Sands
da21cc27c0 Add a C binding to the Target and TargetMachine classes to allow for emitting
binary and assembly. Patch by Carlo Kok.  Emitting was inspired by but not based
on the D llvm bindings. 

llvm-svn: 154493
2012-04-11 10:25:24 +00:00
Chandler Carruth
80c3e3bbba Add two statistics to help track how we are computing the inline cost.
Yea, 'NumCallerCallersAnalyzed' isn't a great name, suggestions welcome.

llvm-svn: 154492
2012-04-11 10:15:10 +00:00
Nadav Rotem
b05ea8c9af Reapply 154397. Original message:
Fix a dagcombine optimization which assumes that the vsetcc result type is always
of the same size as the compared values. This is ture for SSE/AVX/NEON but not
for all targets.

llvm-svn: 154490
2012-04-11 08:26:11 +00:00
Duncan Sands
4f66d852d0 Comment typo fix.
llvm-svn: 154488
2012-04-11 08:13:47 +00:00
Evan Cheng
f138fb4599 Add more fused mul+add/sub patterns. rdar://10139676
llvm-svn: 154484
2012-04-11 06:59:47 +00:00
Nadav Rotem
c922b4f2a3 Reapply 154396 after fixing a test.
Original message:
Modify the code that lowers shuffles to blends from using blendvXX to vblendXX.
blendV uses a register for the selection while Vblend uses an immediate.
On sandybridge they still have the same latency and execute on the same execution ports.

llvm-svn: 154483
2012-04-11 06:40:27 +00:00
Evan Cheng
f9baff015d Clean up ARM fused multiply + add/sub support some more: rename some isel
predicates.
Also remove NEON2 since it's not really useful and it is confusing. If
NEON + VFP4 implies NEON2 but NEON2 doesn't imply NEON + VFP4, what does it
really mean?

rdar://10139676

llvm-svn: 154480
2012-04-11 05:33:07 +00:00
Craig Topper
28df4bf296 Fix an overly indented line. Remove an 'else' after an 'if' that returns.
llvm-svn: 154479
2012-04-11 04:55:51 +00:00
Craig Topper
82772b86d6 Inline implVisitAluOverflow by introducing a nested switch to convert the intrinsic to an nodetype.
llvm-svn: 154478
2012-04-11 04:34:11 +00:00
Andrew Trick
a2a5c3bb71 Tablegen'd regpressure: emit the weighted pressure limit.
llvm-svn: 154477
2012-04-11 04:31:33 +00:00
Andrew Trick
ccfe0f1fc6 Table-generated register pressure fixes.
Handle mixing allocatable and unallocatable register gracefully.
Simplify the pruning of register unit sets.

llvm-svn: 154474
2012-04-11 03:19:15 +00:00
Craig Topper
0590d2cdea Optimize code a bit by calling push_back only once in some loops. Reduces compiled code size a bit.
llvm-svn: 154473
2012-04-11 03:06:35 +00:00
Evan Cheng
b5291aea18 Match (fneg (fma) to vfnma. rdar://10139676
llvm-svn: 154469
2012-04-11 01:21:25 +00:00
Charles Davis
a5e1970cd0 Add retw and lretw instructions. Also, fix Intel syntax parsing for all
ret instructions.

llvm-svn: 154468
2012-04-11 01:10:53 +00:00
Evan Cheng
eaf8eba8c4 Merge fma.ll into fusedMAC.ll
llvm-svn: 154466
2012-04-11 01:03:11 +00:00
Kevin Enderby
304e4812bc Fix ARM disassembly of VLD instructions with writebacks.  And add test a case
for all opcodes handed by DecodeVLDInstruction() in ARMDisassembler.cpp .

llvm-svn: 154459
2012-04-11 00:25:40 +00:00
Jim Grosbach
b10b1b22cb ARM add missing Thumb1 two-operand aliases for shift-by-immediate.
rdar://11222742

llvm-svn: 154457
2012-04-11 00:15:16 +00:00
Evan Cheng
12bfe1150d Fix a number of problems with ARM fused multiply add/subtract instructions.
1. The new instruction itinerary entries are not properly described.
2. The asm parser can't handle vfms and vfnms.
3. There were no assembler, disassembler test cases.
4. HasNEON2 has the wrong assembler predicate.
rdar://10139676

llvm-svn: 154456
2012-04-11 00:13:00 +00:00
Jakob Stoklund Olesen
4bfc07ceb5 Tweak MachineLICM heuristics for cheap instructions.
Allow cheap instructions to be hoisted if they are register pressure
neutral or better. This happens if the instruction is the last loop use
of another virtual register.

Only expensive instructions are allowed to increase loop register
pressure.

llvm-svn: 154455
2012-04-11 00:00:28 +00:00
Jakob Stoklund Olesen
b1ec8d8548 Only check for PHI uses inside the current loop.
Hoisting a value that is used by a PHI in the loop will introduce a
copy because the live range is extended to cross the PHI.

The same applies to PHIs in exit blocks.

Also use this opportunity to make HasLoopPHIUse() non-recursive.

llvm-svn: 154454
2012-04-11 00:00:26 +00:00
Jakob Stoklund Olesen
4f44c26f15 Fix test to be register assignment invariant.
llvm-svn: 154453
2012-04-11 00:00:24 +00:00
Andrew Trick
0c60300f39 TableGen/reginfo potential bug: typo from previous checkin.
llvm-svn: 154452
2012-04-10 23:53:32 +00:00
Owen Anderson
a8319713a4 Move the constant-folding support for FP_ROUND in SelectionDAG from the one-operand version of getNode() to the two-operand version, since it became a two-operand node at sound point.
Zap a testcase that this allows us to completely fold away.

llvm-svn: 154447
2012-04-10 22:46:53 +00:00
Dylan Noblesmith
1e0746761c llvm-stress: stop abusing ConstantFP::get()
ConstantFP::get(Type*, double) is unreliably host-specific:
it can't handle a type like PPC128 on an x86 host. It even
has a comment to that effect: "This should only be used for
simple constant values like 2.0/1.0 etc, that are
known-valid both as host double and as the target format."

Instead, use APFloat. While we're at it, randomize the floating
point value more thoroughly; it was previously limited
to the range 0 to 2**19 - 1.

PR12451.

llvm-svn: 154446
2012-04-10 22:44:51 +00:00
Dylan Noblesmith
2e2de248b0 llvm-stress: don't make vectors of x86_mmx type
LangRef.html says:
"There are no arrays, vectors or constants of this type."

This was hitting assertions when passing the -generate-x86-mmx
option.

PR12452.

llvm-svn: 154445
2012-04-10 22:44:49 +00:00
Kostya Serebryany
3047a70ed9 [tsan] two more compile-time optimizations:
- don't isntrument reads from constant globals.
Saves ~1.5% of instrumented instructions on CPU2006
(counting static instructions, not their execution).
- don't insrument reads from vtable (which is a global constant too).
Saves ~5%.

I did not measure the run-time impact of this,
but it is certainly non-negative.

llvm-svn: 154444
2012-04-10 22:29:17 +00:00
Evan Cheng
f9617f7f54 Handle llvm.fma.* intrinsics. rdar://10914096
llvm-svn: 154439
2012-04-10 21:40:28 +00:00
Duncan Sands
6d360055c5 Add a comment noting that the fdiv -> fmul conversion won't generate
multiplication by a denormal, and some tests checking that.

llvm-svn: 154431
2012-04-10 20:35:27 +00:00
Bill Wendling
16712e549c The MDString class stored a StringRef to the string which was already in a
StringMap. This was redundant and unnecessarily bloated the MDString class.

Because the MDString class is a "Value" and will never have a "name", and
because the Name field in the Value class is a pointer to a StringMap entry, we
repurpose the Name field for an MDString. It stores the StringMap entry in the
Name field, and uses the normal methods to get the string (name) back.

PR12474

llvm-svn: 154429
2012-04-10 20:12:16 +00:00
Chad Rosier
b2ebb93f3c Whitespace.
llvm-svn: 154427
2012-04-10 19:42:07 +00:00
Chad Rosier
f3b2588ea8 Revert r154396, which looks to be the real culprit behind the bot failures.
llvm-svn: 154426
2012-04-10 19:39:18 +00:00
Eric Christopher
f8886e8f48 Temporarily revert this patch to see if it brings the buildbots back.
llvm-svn: 154425
2012-04-10 19:33:16 +00:00
Kostya Serebryany
01d463472d [tsan] compile-time instrumentation: do not instrument a read if
a write to the same temp follows in the same BB.
Also add stats printing.

On Spec CPU2006 this optimization saves roughly 4% of instrumented reads
(which is 3% of all instrumented accesses):
Writes            : 161216
Reads             : 446458
Reads-before-write: 18295

llvm-svn: 154418
2012-04-10 18:18:56 +00:00
Eric Christopher
ec1405e930 To ensure that we have more accurate line information for a block
don't elide the branch instruction if it's the only one in the block,
otherwise it's ok.

PR9796 and rdar://11215207

llvm-svn: 154417
2012-04-10 18:18:10 +00:00