RPCS3/llvm-mirror
1
0
Fork 0
mirror of https://github.com/RPCS3/llvm-mirror.git synced 2024-10-25 22:12:57 +02:00
Code Issues Projects Releases Wiki Activity
41,886 Commits 4 Branches 5 Tags 704 MiB
e7afdb2a42
Commit Graph

979 Commits

Author SHA1 Message Date
Evan Cheng
e7afdb2a42 Add RCBarriers to TargetInstrDesc. It's a list of register classes the given instruction can "clobber". For example, on x86 the call instruction can modify all of the XMM and fp stack registers. 
TableGen has been taught to generate the lists from instruction definitions.

llvm-svn: 57722
 2008-10-17 21:00:09 +00:00
Dan Gohman
1641e5e794 Use INT64_C to emit constant values, to avoid problems with 
constants that don't fit in an int. This fixes
"this decimal constant is unsigned only in ISO C90"
warnings.

llvm-svn: 57668
 2008-10-17 04:40:39 +00:00
Dan Gohman
268cfea6bc Fun x86 encoding tricks: when adding an immediate value of 128, 
use a SUB instruction instead of an ADD, because -128 can be
encoded in an 8-bit signed immediate field, while +128 can't be.
This avoids the need for a 32-bit immediate field in this case.

A similar optimization applies to 64-bit adds with 0x80000000,
with the 32-bit signed immediate field.

To support this, teach tablegen how to handle 64-bit constants.

llvm-svn: 57663
 2008-10-17 01:33:43 +00:00
Dan Gohman
1bf4053aa8 Add support for having multiple predicates on a TreePatternNode. 
This will allow predicates to be composed, which will allow the
predicate definitions to become less redundant, and eventually
will allow DAGISelEmitter.cpp to emit less redundant code.

llvm-svn: 57562
 2008-10-15 06:17:21 +00:00
Duncan Sands
8f296a3788 Add <cstdio> include where needed by gcc-4.4. 
Patch by Samuel Tardieu.

llvm-svn: 57291
 2008-10-08 07:23:46 +00:00
Chris Lattner
44997d0e3c Fix shift overflow bug that would occur when a field was a full 32-bits 
in tblgen.  This is PR2827, thanks to Waldemar Knorr for tracking this
down.

llvm-svn: 57124
 2008-10-05 18:31:58 +00:00
Dale Johannesen
dbd7b1bd33 Handle some 64-bit atomics on x86-32, some of the time. 
llvm-svn: 56963
 2008-10-02 18:53:47 +00:00
Dan Gohman
19530c810d Move the primary fast-isel top-level comments to FastISel.cpp, where 
they'll be a little more visible. Also, update and reword them a bit.

llvm-svn: 56877
 2008-09-30 20:48:29 +00:00
Dan Gohman
ac7d848c4b Move the code that handles DAGISel error conditions into 
helper functions instead of duplicating it inline each time
it is needed. This eliminates a few hundred or so copies
of this code in each target.

llvm-svn: 56759
 2008-09-27 23:53:14 +00:00
Dan Gohman
989db64c93 Rename ConstantSDNode's getSignExtended to getSExtValue, for 
consistancy with ConstantInt, and re-implement it in terms
of ConstantInt's getSExtValue.

llvm-svn: 56700
 2008-09-26 21:54:37 +00:00
Devang Patel
64dd7a2e89 Large mechanical patch. 
s/ParamAttr/Attribute/g
s/PAList/AttrList/g
s/FnAttributeWithIndex/AttributeWithIndex/g
s/FnAttr/Attribute/g

This sets the stage 
- to implement function notes as function attributes and 
- to distinguish between function attributes and return value attributes.

This requires corresponding changes in llvm-gcc and clang.

llvm-svn: 56622
 2008-09-25 21:00:45 +00:00
Mikhail Glushenkov
cf04ed88af Move llvmc2 header files under include/llvm/CompilerDriver 
llvm-svn: 56466
 2008-09-22 20:50:40 +00:00
Mikhail Glushenkov
3895eee874 Plugin support for llvmc2 (a-la opt). 
llvm-svn: 56465
 2008-09-22 20:49:34 +00:00
Mikhail Glushenkov
e412a69526 Make comments a little bit more clear. 
llvm-svn: 56463
 2008-09-22 20:48:22 +00:00
Mikhail Glushenkov
72e4c4e976 Get rid of GlobalLanguageMap. Global state is evil. 
llvm-svn: 56462
 2008-09-22 20:47:46 +00:00
Mikhail Glushenkov
7afbd753b7 Add a (forward_as) option property 
llvm-svn: 56459
 2008-09-22 20:46:19 +00:00
Mikhail Glushenkov
54297e6546 Delete the file llvmc2/doc/LLVMC-Enhancements.rst + some minor language/spelling fixes. 
llvm-svn: 56458
 2008-09-22 20:45:17 +00:00
Oscar Fuentes
0f25988689 Initial support for the CMake build system. 
llvm-svn: 56419
 2008-09-22 01:08:49 +00:00
Evan Cheng
b3923fd86f Add instruction names as comments to InstBits entries. 
llvm-svn: 56275
 2008-09-17 06:29:52 +00:00
Bill Wendling
932818c75a Reverting r56249. On further investigation, this functionality isn't needed. 
Apologies for the thrashing.

llvm-svn: 56251
 2008-09-16 21:48:12 +00:00
Bill Wendling
1a240c8033 - Change "ExternalSymbolSDNode" to "SymbolSDNode". 
- Add linkage to SymbolSDNode (default to external).
- Change ISD::ExternalSymbol to ISD::Symbol.
- Change ISD::TargetExternalSymbol to ISD::TargetSymbol

These changes pave the way to allowing SymbolSDNodes with non-external linkage.

llvm-svn: 56249
 2008-09-16 21:12:30 +00:00
Dan Gohman
082879cfde Change ConstantSDNode and ConstantFPSDNode to use ConstantInt* and 
ConstantFP* instead of APInt and APFloat directly.

This reduces the amount of time to create ConstantSDNode
and ConstantFPSDNode nodes when ConstantInt* and ConstantFP*
respectively are already available, as is the case in
SelectionDAGBuild.cpp. Also, it reduces the amount of time
to legalize constants into constant pools, and the amount of
time to add ConstantFP operands to MachineInstrs, due to
eliminating ConstantInt::get and ConstantFP::get calls.

It increases the amount of work needed to create new constants
in cases where the client doesn't already have a ConstantInt*
or ConstantFP*, such as legalize expanding 64-bit integer constants
to 32-bit constants. And it adds a layer of indirection for the
accessor methods. But these appear to be outweight by the benefits
in most cases.

It will also make it easier to make ConstantSDNode and
ConstantFPNode more consistent with ConstantInt and ConstantFP.

llvm-svn: 56162
 2008-09-12 18:08:03 +00:00
Dan Gohman
89660301e3 Rename ConstantSDNode::getValue to getZExtValue, for consistency 
with ConstantInt. This led to fixing a bug in TargetLowering.cpp
using getValue instead of getAPIntValue.

llvm-svn: 56159
 2008-09-12 16:56:44 +00:00
Evan Cheng
2d51d1299e Indentation. 
llvm-svn: 56107
 2008-09-11 17:31:12 +00:00
Jim Grosbach
f53af44e09 lib/Target/SubtargetFeature.cpp asserts that the FeatureKV[] table be sorted 
by its first field, but TableGen doesn't actually enforce creating it that 
way. TableGen sorts the records that will be used to create it by the names 
of the records, not the Name field of those records.

This patch corrects the sort to use the "Name" field of the record as the 
sort key.

llvm-svn: 56106
 2008-09-11 17:05:32 +00:00
Evan Cheng
aebadcd733 Change getSubReg semantics. It now returns zero if the specified register doesn't have a subreg of the specified index. 
llvm-svn: 56099
 2008-09-11 06:25:25 +00:00
Dan Gohman
84924c9ceb Fix typos in (generated) comments. 
llvm-svn: 55916
 2008-09-08 16:29:36 +00:00
Evan Cheng
f8d8287454 Correctly handle physical register inputs. They are not explicit input operands in the resulting machine instrs. 
llvm-svn: 55893
 2008-09-08 08:39:33 +00:00
Evan Cheng
8f1ac64bc9 Eliminate a compile time warning. 
llvm-svn: 55878
 2008-09-07 09:00:57 +00:00
Evan Cheng
018d570cb8 Fix indentation of generated code. 
llvm-svn: 55876
 2008-09-07 08:23:06 +00:00
Evan Cheng
4fb8cbebe4 Ignore multi-instruction patterns. e.g. 
def : Pat<(i8 (trunc GR32:$src)),
          (i8 (EXTRACT_SUBREG (MOV32to32_ GR32:$src), x86_subreg_8bit))>

llvm-svn: 55875
 2008-09-07 08:19:51 +00:00
Evan Cheng
43c7084625 Let tblgen only generate fastisel routines, not the class definition. This makes it easier for targets to define its own fastisel class. 
llvm-svn: 55679
 2008-09-03 00:03:49 +00:00
Evan Cheng
9817be2f96 Change getBinaryCodeForInstr prototype. First operand MachineInstr& should be const. Make corresponding changes. 
llvm-svn: 55623
 2008-09-02 06:51:36 +00:00
Owen Anderson
3aa3841da2 Add initial support for fast isel of instructions that have inputs pinned to physical registers. 
llvm-svn: 55545
 2008-08-29 17:45:56 +00:00
Dan Gohman
c7b8401b77 Add a target callback for FastISel. 
llvm-svn: 55512
 2008-08-28 23:21:34 +00:00
Gabor Greif
86c795a8ca erect abstraction boundaries for accessing SDValue members, rename Val -> Node to reflect semantics 
llvm-svn: 55504
 2008-08-28 21:40:38 +00:00
Owen Anderson
a5b87bf7e2 Add support for fast-isel of opcodes that require use of extract_subreg. Because of how extract_subreg is treated, it requires special case handling. 
llvm-svn: 55480
 2008-08-28 18:06:12 +00:00
Dan Gohman
378f477a02 Update a comment to reflect recent changes. 
llvm-svn: 55418
 2008-08-27 16:18:22 +00:00
Dan Gohman
5e5f1c9e8f Basic FastISel support for floating-point constants. 
llvm-svn: 55401
 2008-08-27 01:09:54 +00:00
Gabor Greif
4b86114f92 disallow direct access to SDValue::ResNo, provide a getter instead 
llvm-svn: 55394
 2008-08-26 22:36:50 +00:00
Dan Gohman
84d7f86244 Refactor a bunch of FastISelEmitter code into a helper class, and 
put each major step in a separate function. This makes the high
level sequence of events easier to follow.

llvm-svn: 55385
 2008-08-26 21:21:20 +00:00
Cedric Venet
62a65ed510 - small bug corrected: incorrect iterator type. 
- fix to please VS: add a return after an assert.

llvm-svn: 55380
 2008-08-26 19:49:04 +00:00
Owen Anderson
9e2381b77d We need to check that the return type is correct, even in cases where we don't 
have a return type that differs from the operand types.

llvm-svn: 55376
 2008-08-26 18:50:00 +00:00
Chris Lattner
1804f18b34 code simplification, no functionality change. 
llvm-svn: 55363
 2008-08-26 07:01:28 +00:00
Chris Lattner
006fc6636d stabilize more printing, this doesn't cause a problem 
in the example attached to PR2590, but is a problem in general.

llvm-svn: 55361
 2008-08-26 06:50:46 +00:00
Chris Lattner
6adb1b1b26 stablize SubRegsSet printing, part of PR2590 
llvm-svn: 55360
 2008-08-26 06:49:06 +00:00
Chris Lattner
e589d360a1 Stabilize 'getDwarfRegNumFull' output to not depend on random memory 
orders, part of PR2590

llvm-svn: 55359
 2008-08-26 06:43:25 +00:00
Owen Anderson
9c207563a1 Throw the switch to allow FastISel to emit instructions whose return types different from their inputs. Next step: adding lowering pattens in FastISel that actually use these newly available opcodes. 
llvm-svn: 55349
 2008-08-26 01:22:59 +00:00
Owen Anderson
7e677167d6 Enhance TableGen to emit code for FastISel of opcodes with variadic return types without slowing down opcodes that are not variadic. No such opcodes are currently generated, but in theory it should be a matter of just hitting the switch. 
llvm-svn: 55347
 2008-08-26 00:42:26 +00:00
Owen Anderson
9264f41ef2 Add a RetVT parameter to emitted FastISel methods, so that we will be able to pass the desired return 
type down.  This is not currently used.

llvm-svn: 55345
 2008-08-25 23:58:18 +00:00