Asaf Badouh
f3f551dd7e
revert rev. 252153 due to build failure on ubuntu
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[X86][AVX512] add comi with Sae
llvm-svn: 252154
2015-11-05 08:55:54 +00:00
Asaf Badouh
c9c8bfa4c4
[X86][AVX512] add comi with Sae
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add builtin_ia32_vcomisd and builtin_ia32_vcomisd
Differential Revision: http://reviews.llvm.org/D14331
llvm-svn: 252153
2015-11-05 08:45:06 +00:00
Igor Breger
dd070c17bb
AVX512: Implemented encoding and intrinsics for VBROADCASTI32x2 and VBROADCASTF32x2 instructions.
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Differential Revision: http://reviews.llvm.org/D14216
llvm-svn: 251781
2015-11-02 07:39:36 +00:00
Benjamin Kramer
7ae7c7fe44
Remove CRLF line endings.
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llvm-svn: 251594
2015-10-29 02:33:05 +00:00
Asaf Badouh
2110df5fda
[X86][AVX512] [X86][AVX512] add convert float to half
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convert float to half with mask/maskz for the reg to reg version and mask for the reg to mem version (there is no maskz version for reg to mem).
Differential Revision: http://reviews.llvm.org/D14113
llvm-svn: 251409
2015-10-27 15:37:17 +00:00
Asaf Badouh
99f2354837
[X86][AVX512] extend vcvtph2ps to support xmm/ymm and sae versions
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Differential Revision: http://reviews.llvm.org/D13945
llvm-svn: 251018
2015-10-22 14:01:16 +00:00
Igor Breger
c385abd09d
AVX512: Implemented encoding and intrinsics for VPBROADCASTB/W/D/Q instructions.
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Differential Revision: http://reviews.llvm.org/D13884
llvm-svn: 250819
2015-10-20 11:56:42 +00:00
Benjamin Kramer
170c107663
Remove CRLF newlines. NFC.
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llvm-svn: 250698
2015-10-19 13:05:25 +00:00
Asaf Badouh
381b11d5f2
[X86][AVX512DQ] add scalar fpclass
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Differential Revision: http://reviews.llvm.org/D13769
llvm-svn: 250650
2015-10-18 11:04:38 +00:00
Simon Pilgrim
a6b49e0950
[X86][XOP] Add VPROT instruction opcodes
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Added X86ISD opcodes for VPROT vector rotate by variable and by immediate.
llvm-svn: 250620
2015-10-17 19:04:24 +00:00
Igor Breger
6e29702ee8
AVX512: Implemented encoding and intrinsics for vpternlogd/q.
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Differential Revision: http://reviews.llvm.org/D13768
llvm-svn: 250396
2015-10-15 12:33:24 +00:00
Simon Pilgrim
ebc177d6ad
[X86][XOP] Added support for the lowering of 128-bit vector integer comparisons to XOP PCOM/PCOMU instructions.
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The XOP vector integer comparisons can deal with all signed/unsigned comparison cases directly and can be easily commuted as well (D7646).
llvm-svn: 249976
2015-10-11 14:15:17 +00:00
Igor Breger
38dd6d8710
AVX512: Implemented encoding and intrinsics for VPERMILPS/PD instructions.
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Added tests for intrinsics and encoding.
Differential Revision: http://reviews.llvm.org/D12690
llvm-svn: 249261
2015-10-04 07:20:41 +00:00
Simon Pilgrim
d3e938c0f5
[X86][XOP] Added support for the lowering of 128-bit vector shifts to XOP shift instructions
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The XOP shifts just have logical/arithmetic versions and the left/right shifts are controlled by whether the value is positive/negative. Because of this I've added new X86ISD nodes instead of trying to force them to use the existing shift nodes.
Additionally Excavator cores (bdver4) support XOP and AVX2 - meaning that it should use the AVX2 shifts when it can and fall back to XOP in other cases.
Differential Revision: http://reviews.llvm.org/D8690
llvm-svn: 248878
2015-09-30 08:17:50 +00:00
Simon Pilgrim
838c618b88
[X86][SSE] Replace 128-bit SSE41 PMOVSX intrinsics with native IR
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This patches removes the x86.sse41.pmovsx* intrinsics, provides a suitable upgrade path and updates relevant tests to sign extend a subvector instead.
LLVM counterpart to D12835
Differential Revision: http://reviews.llvm.org/D13002
llvm-svn: 248368
2015-09-23 08:48:33 +00:00
Asaf Badouh
8011b4b495
[X86][AVX512] add masked version for RSQRT14 & RCP14 Scalar FP
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Differential Revision: http://reviews.llvm.org/D12524
llvm-svn: 248147
2015-09-21 10:23:53 +00:00
Igor Breger
a833017e0d
AVX512: Implemented encoding and intrinsics for vcmpss/sd.
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Added tests for intrinsics and encoding.
Differential Revision: http://reviews.llvm.org/D12593
llvm-svn: 248121
2015-09-20 15:15:10 +00:00
Asaf Badouh
4ce11a0a36
[X86][AVX512] extend support in Scalar conversion
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add scalar FP to Int conversion with truncation intrinsics
add scalar conversion FP32 from/to FP64 intrinsics
add rounding mode and SAE mode encoding for these intrinsics
Differential Revision: http://reviews.llvm.org/D12665
llvm-svn: 248117
2015-09-20 14:31:19 +00:00
Igor Breger
6c78cd17ac
AVX512: vsqrtss/sd encoding and intrinsics implementation.
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Added tests for intrinsics and encoding.
Differential Revision: http://reviews.llvm.org/D12102
llvm-svn: 248116
2015-09-20 09:13:41 +00:00
Asaf Badouh
981ab82bef
[X86][AVX512DQ] Add fpclass instruction
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Differential Revision: http://reviews.llvm.org/D12931
llvm-svn: 248115
2015-09-20 08:46:07 +00:00
Igor Breger
5be1c75e87
AVX512: Implemented intrinsics for vshuff32x4, vshuff64x2, vshufi64x2, vshufi32x4
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Added tests for intrinsics.
Differential Revision: http://reviews.llvm.org/D12525
llvm-svn: 248113
2015-09-20 07:18:53 +00:00
Igor Breger
43e0d98a01
AVX512: Implement instructions encoding, lowering and intrinsics
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vinserti64x4, vinserti64x2, vinserti32x8, vinserti32x4, vinsertf64x4, vinsertf64x2, vinsertf32x8, vinsertf32x4
Added tests for encoding, lowering and intrinsics.
Differential Revision: http://reviews.llvm.org/D11893
llvm-svn: 248111
2015-09-20 06:52:42 +00:00
Igor Breger
63fab329a2
AVX512: Implemented encoding and intrinsics for vplzcntq, vplzcntd, vpconflictq, vpconflictd
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Added tests for intrinsics and encoding.
Differential Revision: http://reviews.llvm.org/D11931
llvm-svn: 246750
2015-09-03 09:05:31 +00:00
Asaf Badouh
70ff5c87a7
[X86][AVX512VLBW] add support in byte shift and SAD
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add byte shift left/right
add SAD - compute sum of absolute differences
Differential Revision: http://reviews.llvm.org/D12479
llvm-svn: 246654
2015-09-02 14:21:54 +00:00
Igor Breger
8e7d569bab
AVX512: Implemented encoding and intrinsics for VGETMANTPD/S , VGETMANTSD/S instructions
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Added tests for intrinsics and encoding.
Differential Revision: http://reviews.llvm.org/D11593
llvm-svn: 246642
2015-09-02 11:18:55 +00:00
Igor Breger
dc46fb3351
AVX512: Implemented encoding and intrinsics for vshufps/d.
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Added tests for intrinsics and encoding.
Differential Revision: http://reviews.llvm.org/D11709
llvm-svn: 246640
2015-09-02 10:50:58 +00:00
Igor Breger
f74213b572
AVX512: Implemented intrinsics for valign.
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Differential Revision: http://reviews.llvm.org/D12526
llvm-svn: 246551
2015-09-01 15:27:18 +00:00
Igor Breger
2ff3c16585
AVX512: Implemented encoding and intrinsics for vdbpsadbw
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Added tests for intrinsics and encoding.
Differential Revision: http://reviews.llvm.org/D12491
llvm-svn: 246436
2015-08-31 13:09:30 +00:00
Igor Breger
c6e71f91ab
AVX512: Implemented encoding and intrinsics for vpalignr
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Added tests for intrinsics and encoding.
Differential Revision: http://reviews.llvm.org/D12270
llvm-svn: 246428
2015-08-31 11:14:02 +00:00
Igor Breger
28223d1ba3
AVX512: Implemented encoding and intrinsics for VGETEXPSS/D instructions
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Added tests for intrinsics and encoding.
Differential Revision: http://reviews.llvm.org/D11528
llvm-svn: 243390
2015-07-28 06:53:28 +00:00
Igor Breger
255a11f9b8
Implemented encoding and intrinsics of the following instructions
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vunpckhps/pd, vunpcklps/pd,
vpunpcklbw, vpunpckhbw, vpunpcklwd, vpunpckhwd, vpunpckldq, vpunpckhdq, vpunpcklqdq, vpunpckhqdq
Added tests for intrinsics and encoding.
Differential Revision: http://reviews.llvm.org/D11509
llvm-svn: 243246
2015-07-26 14:41:44 +00:00
Igor Breger
7ea6c4cce1
AVX-512: Implemented encoding , DAG lowering and intrinsics for Integer Truncate with/without saturation
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Added tests for DAG lowering ,encoding and intrinsic
Differential Revision: http://reviews.llvm.org/D11218
llvm-svn: 243122
2015-07-24 17:24:15 +00:00
Chandler Carruth
3b9bc26920
Revert r242990: "AVX-512: Implemented encoding , DAG lowering and ..."
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This commit broke the build. Numerous build bots broken, and it was
blocking my progress so reverting.
It should be trivial to reproduce -- enable the BPF backend and it
should fail when running llvm-tblgen.
llvm-svn: 242992
2015-07-23 08:03:44 +00:00
Igor Breger
8ded9931fe
AVX-512: Implemented encoding , DAG lowering and intrinsics for Integer Truncate with/without saturation
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Added tests for DAG lowering ,encoding and intrinsic
Differential Revision: http://reviews.llvm.org/D11218
llvm-svn: 242990
2015-07-23 07:39:21 +00:00
Asaf Badouh
7feb9eaba0
[X86][AVX512] add reduce/range/scalef/rndScale
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include encoding and intrinsics
Differential Revision: http://reviews.llvm.org/D11222
llvm-svn: 242896
2015-07-22 12:00:43 +00:00
Elena Demikhovsky
be2ecab469
AVX-512: Added intrinsics for VCVT* instructions.
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All SKX forms. All VCVT instructions for float/double/int/long types.
Differential Revision: http://reviews.llvm.org/D11343
llvm-svn: 242877
2015-07-22 08:56:00 +00:00
Igor Breger
5441f451cc
AVX512 : Implemented VPMADDUBSW and VPMADDWD instruction ,
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Added tests for intrinsics and encoding.
Differential Revision: http://reviews.llvm.org/D11351
llvm-svn: 242761
2015-07-21 07:11:28 +00:00
Simon Pilgrim
385bee8c59
[X86][SSE4A] Shuffle lowering using SSE4A EXTRQ/INSERTQ instructions
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This patch adds support for v8i16 and v16i8 shuffle lowering using the immediate versions of the SSE4A EXTRQ and INSERTQ instructions. Although rather limited (they can only act on the lower 64-bits of the source vectors, leave the upper 64-bits of the result vector undefined and don't have VEX encoded variants), the instructions are still useful for the zero extension of any lane (EXTRQ) or inserting a lane into another vector (INSERTQ). Testing demonstrated that it wasn't typically worth it to use these instructions for v2i64 or v4i32 vector shuffles although they are capable of it.
As well as adding specific pattern matching for the shuffles, the patch uses EXTRQ for zero extension cases where SSE41 isn't available and its more efficient than the SSE2 'unpack' default approach. It also adds shuffle decode support for the EXTRQ / INSERTQ cases when the instructions are handling full byte-sized extractions / insertions.
From this foundation, future patches will be able to make use of the instructions for situations that use their ability to extract/insert at the bit level.
Differential Revision: http://reviews.llvm.org/D10146
llvm-svn: 241508
2015-07-06 20:46:41 +00:00
Simon Pilgrim
af8901c21c
[X86][SSE] Use the general SMAX/SMIN/UMAX/UMIN opcodes and remove the X86 implementation
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With the completion of D9746 there is now a common implementation of integer signed/unsigned min/max nodes, removing the need for the equivalent X86 specific implementations.
This patch removes the old X86ISD nodes, legalizes the relevant SSE2/SSE41/AVX2/AVX512 instructions for the ISD versions and converts the small amount of existing X86 code.
Differential Revision: http://reviews.llvm.org/D10947
llvm-svn: 241506
2015-07-06 20:30:47 +00:00
Asaf Badouh
a51b8d0d5b
[X86][AVX512] Multiply Packed Unsigned Integers with Round and Scale
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pmulhrsw
review:
http://reviews.llvm.org/D10948
llvm-svn: 241443
2015-07-06 14:03:40 +00:00
Asaf Badouh
7e53a288e3
[x86][AVX512] add Multiply High Op
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include encoding and intrinsics tests.
review
http://reviews.llvm.org/D10896
llvm-svn: 241406
2015-07-05 12:23:20 +00:00
Elena Demikhovsky
12bde41e5a
AVX-512: all forms of SCATTER instruction on SKX,
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encoding, intrinsics and tests.
llvm-svn: 240936
2015-06-29 12:14:24 +00:00
Igor Breger
7ca2ee2eb1
AVX-512: Implemented missing encoding and intrinsics for FMA instructions
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Added tests for DAG lowering ,encoding and intrinsics
Differential Revision: http://reviews.llvm.org/D10796
llvm-svn: 240926
2015-06-29 09:10:00 +00:00
NAKAMURA Takumi
ebf43b6005
Whitespace.
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llvm-svn: 240924
2015-06-29 04:50:09 +00:00
Asaf Badouh
732e3b5425
[x86][AVX512]
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Add vscalef support
include encoding and intrinsics
review:
http://reviews.llvm.org/D10730
llvm-svn: 240906
2015-06-28 14:30:39 +00:00
Elena Demikhovsky
02169f53d0
AVX-512: Added all SKX forms of GATHER instructions.
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Added intrinsics.
Added encoding and tests.
llvm-svn: 240905
2015-06-28 10:53:29 +00:00
Elena Demikhovsky
1df83908be
AVX-512: Added all forms of VPABS instruction
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Added all intrinsics, tests for encoding, tests for intrinsics.
llvm-svn: 240386
2015-06-23 08:19:46 +00:00
Elena Demikhovsky
0d6489273b
AVX-512: added VPSHUFB instruction - all SKX forms
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Added intrinsics and encoding tests.
llvm-svn: 240277
2015-06-22 13:00:42 +00:00
Elena Demikhovsky
9ebb2c82d0
AVX-512: Added intrinsics for VPERMT2W/D/Q/PS/PD and
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VPERMI2W/D/Q/PS/PD instructions.
Added tests.
llvm-svn: 240256
2015-06-22 06:45:48 +00:00
Asaf Badouh
6e78caf9ff
[AVX512]
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add instructions: VPAVGB and VPAVGW
review
http://reviews.llvm.org/D10504
llvm-svn: 240012
2015-06-18 12:30:53 +00:00