RPCS3/llvm-mirror
1
0
Fork 0
mirror of https://github.com/RPCS3/llvm-mirror.git synced 2024-10-20 03:23:01 +02:00
Code Issues Projects Releases Wiki Activity
47,370 Commits 4 Branches 5 Tags 704 MiB
e950c375ea
Commit Graph

10202 Commits

Author SHA1 Message Date
Evan Cheng
e950c375ea Minor reorg. 
llvm-svn: 73948
 2009-06-23 05:25:29 +00:00
Evan Cheng
92a49d75e4 Replace isTwoAddress with operand constraint. 
llvm-svn: 73947
 2009-06-23 05:23:49 +00:00
Owen Anderson
b571916820 Guard the layout info object. 
llvm-svn: 73928
 2009-06-23 00:21:15 +00:00
Bob Wilson
6db76aaf10 Add support for ARM's Advanced SIMD (NEON) instruction set. 
This is still a work in progress but most of the NEON instruction set
is supported.

llvm-svn: 73919
 2009-06-22 23:27:02 +00:00
Bob Wilson
48de87abcb Add explicit types for shift count constants. This is in preparation for 
another change that makes the types ambiguous (at least as far as tablegen
is concerned).

llvm-svn: 73909
 2009-06-22 22:08:29 +00:00
Bob Wilson
6e81f12950 Use thumb2 for ARM architectures V6T2 and later. Fix a bug in checking 
for "thumb" and add a check for V6T2.

llvm-svn: 73905
 2009-06-22 21:28:22 +00:00
Bob Wilson
0c2c5f65e2 For Darwin on ARMv6 and newer, make register r9 available for use as a 
caller-saved register.

llvm-svn: 73901
 2009-06-22 21:01:46 +00:00
Bruno Cardoso Lopes
7b196ba30e Add more methods to gather target specific elf stuff 
Support for .text relocations, implementing TargetELFWriter overloaded methods for x86/x86_64.
Use a map to track global values to their symbol table indexes
Code cleanup and small fixes

llvm-svn: 73894
 2009-06-22 19:16:16 +00:00
Evan Cheng
b37e7e24d0 hasFP should return true if frame address is taken. 
llvm-svn: 73893
 2009-06-22 18:38:48 +00:00
Bob Wilson
c859e1c6bb Fix llvm-gcc build for armv6t2 and later architectures. The hasV6T2Ops 
predicate does not check if Thumb mode is enabled, and when in ARM mode
there are still some checks for constant-pool use that need to run.

llvm-svn: 73887
 2009-06-22 17:29:13 +00:00
Rafael Espindola
373c6bdbc5 Fix PR4185. 
Handle FpSET_ST0_80 being used when ST0 is still alive.

llvm-svn: 73850
 2009-06-21 12:02:51 +00:00
Chris Lattner
06e180b758 simplify closing paren and (rip) printing. 
llvm-svn: 73841
 2009-06-21 02:22:53 +00:00
Chris Lattner
e358de060d indentation fix 
llvm-svn: 73840
 2009-06-21 02:22:34 +00:00
Chris Lattner
481746a193 remove #if 0 code 
llvm-svn: 73837
 2009-06-21 01:48:49 +00:00
Chris Lattner
5ef06d833d cosmetic changes. 
llvm-svn: 73836
 2009-06-21 01:27:55 +00:00
Chris Lattner
580eecebbd change TLS_ADDR lowering to lower to a real mem operand, instead of matching as 
a global with that gets printed with the :mem modifier.  All operands to lea's 
should be handled with the lea32mem operand kind, and this allows the TLS stuff
to do this.  There are several better ways to do this, but I went for the minimal
change since I can't really test this (beyond make check).

This also makes the use of EBX explicit in the operand list in the 32-bit, 
instead of implicit in the instruction.

llvm-svn: 73834
 2009-06-20 20:38:48 +00:00
Chris Lattner
f1510099c3 remove dead code, the main codepath never has to deal 
with MBB's.

llvm-svn: 73830
 2009-06-20 19:34:47 +00:00
Chris Lattner
12ba79a2b7 eliminate the "call" operand modifier from the asm descriptions, modeling 
it as a pcrel immediate instead.  This gets pc-rel weirdness out of the
main printoperand codepath.

llvm-svn: 73829
 2009-06-20 19:34:09 +00:00
Chris Lattner
b0324ab35a fix edit-o 
llvm-svn: 73824
 2009-06-20 08:13:12 +00:00
Chris Lattner
3ffae2f77e some comments and cleanup 
llvm-svn: 73818
 2009-06-20 07:59:10 +00:00
Chris Lattner
7b43ca847d implement support for lowering subregs when preparing to print 
LEA64_32r, eliminating a bunch of modifier logic stuff on addr modes.

Implement support for printing mbb labels as operands.

llvm-svn: 73817
 2009-06-20 07:03:18 +00:00
Devang Patel
a011b501a0 Remove unused field. 
llvm-svn: 73815
 2009-06-20 01:07:54 +00:00
Devang Patel
7003004d00 Initialize MMI 
llvm-svn: 73813
 2009-06-20 01:00:07 +00:00
Chris Lattner
18485eef13 hook up printMemReference. 
llvm-svn: 73811
 2009-06-20 00:50:32 +00:00
Chris Lattner
19fc691c16 Start implementing translation of MachineInstr to MCInst. Next 
step is to make tblgen generate something more appropriate for MCInst,
and generate calls to operand translation routines where needed.
This includes a bunch of #if 0 code which will slowly be refactored into
something sensible.

llvm-svn: 73810
 2009-06-20 00:49:26 +00:00
Chris Lattner
2e95d43f24 stub out some hacky code for wiring up the new asmprinter interfaces 
on X86.  Not useful yet.

llvm-svn: 73799
 2009-06-19 23:59:57 +00:00
Devang Patel
e8b5c14209 DwarfWriter is used to emit EH info also. 
llvm-svn: 73792
 2009-06-19 23:21:20 +00:00
Evan Cheng
f18de63563 Enable arm pre-allocation load / store multiple optimization pass. 
llvm-svn: 73791
 2009-06-19 23:17:27 +00:00
Devang Patel
e2b1c9a530 mv CodeGen/DebugLoc.h Support/DebugLoc.h 
llvm-svn: 73786
 2009-06-19 22:08:58 +00:00
Devang Patel
35810cd07b Move up dwarf writer initialization in common AsmPrinter class. 
llvm-svn: 73784
 2009-06-19 21:54:26 +00:00
Anton Korobeynikov
ff313dba2f Unbreak cyclic deps 
llvm-svn: 73781
 2009-06-19 19:36:55 +00:00
Chris Lattner
91740476a3 fix the sparc codegen to not depend on the sparc asmprinter. 
llvm-svn: 73767
 2009-06-19 15:48:10 +00:00
Evan Cheng
706927c96a Add comments. 
llvm-svn: 73761
 2009-06-19 07:06:07 +00:00
Eli Friedman
5cccb60bad Fix for PR2484: add an SSE1 pattern for a shuffle we normally prefer to 
handle with an SSE2 instruction.

llvm-svn: 73760
 2009-06-19 07:00:55 +00:00
Evan Cheng
8f613095de Should be using Bcc (average) latency to determine if-conversion threshold, not BL. 
llvm-svn: 73759
 2009-06-19 06:56:26 +00:00
Eli Friedman
b2688e9b73 Misc tweaks to Intel asm printing to make it more compatible with MASM. 
Patch by Benedict Gaster.

llvm-svn: 73753
 2009-06-19 04:48:38 +00:00
Evan Cheng
667924dc46 Transfer dead markers when a ldrd is changed into a ldm or a pair of ldr. 
llvm-svn: 73749
 2009-06-19 01:59:04 +00:00
Evan Cheng
f671ce4eba Latency information for ARM v6. It's rough and not yet hooked up. Right now we are only using branch latency to determine if-conversion limits. 
llvm-svn: 73747
 2009-06-19 01:51:50 +00:00
Eli Friedman
003abaa60d Mark a few Thumb instructions commutable; just happened to spot this 
while experimenting.  I'm reasonably sure this is correct, but please 
tell me if these instructions have some strange property which makes this
change unsafe.

llvm-svn: 73746
 2009-06-19 01:43:08 +00:00
Chris Lattner
f077552a99 add a file I missed, this goes with r73743 
llvm-svn: 73744
 2009-06-19 00:47:59 +00:00
Chris Lattner
3624754e23 Add some scaffolding for a new experimental asmprinter 
implementation.  The idea is that we want asmprinting to
work by converting MachineInstrs into a new MCInst class,
then the per-instruction asmprinter works on MCInst.  MCInst
and the new asmprinters will not depend on most of the 
llvm code generators.  This allows building diassemblers
that don't link in the whole llvm code generator.  This is
step #1 of many.

llvm-svn: 73743
 2009-06-19 00:47:33 +00:00
Chris Lattner
c2b0fd0304 merge the common darwin settings from the X86/PPC/ARM targets 
into DarwinTargetAsmInfo.cpp.  The remaining differences should
be evaluated.  It seems strange that x86/arm has .zerofill but ppc
doesn't, etc.

llvm-svn: 73742
 2009-06-19 00:08:39 +00:00
Chris Lattner
6cd267dcc5 move mangler quote handling from asm printers to TargetAsmInfo. 
llvm-svn: 73738
 2009-06-18 23:41:35 +00:00
Chris Lattner
fea7aa45b7 minor cleanup 
llvm-svn: 73737
 2009-06-18 23:33:13 +00:00
Chris Lattner
ea0ea2f4bc simplify macro debug info directive handling. 
llvm-svn: 73736
 2009-06-18 23:31:37 +00:00
Evan Cheng
7426d278ae Remove UseThumbBacktraces. Just check if subtarget is darwin. 
llvm-svn: 73734
 2009-06-18 23:14:30 +00:00
Evan Cheng
6c1c55f942 On Darwin, ams printer should output a second label before a jump table so the linker knows it's a new atom. But this is only needed if the jump table is put in a separate section from the function body. 
llvm-svn: 73720
 2009-06-18 20:37:15 +00:00
Evan Cheng
82a8ab8a8e - Update register allocation hint after coalescing. This is done by the target since the hint is target dependent. This is important for ARM register pair hints. 
- Register allocator should resolve the second part of the hint (register number) before passing it to the target since it knows virtual register to physical register mapping.
- More fixes to get ARM load / store double word working.

llvm-svn: 73671
 2009-06-18 02:04:01 +00:00
Dale Johannesen
6bffdac70a It looks like nobody is working on PR 4158, so I'm 
adding a check to catch this case at compile time
instead of quietly generating incorrect code.
That will at least let us identify CBE failures
that are not due to this problem.

llvm-svn: 73668
 2009-06-18 01:07:23 +00:00
Bob Wilson
1866500851 ARM unified syntax is not specific to ELF; use it for Darwin, too. 
llvm-svn: 73665
 2009-06-18 00:36:17 +00:00