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3239 Commits

Author SHA1 Message Date
Chris Lattner
0304b82f80 Fix a ton of comment typos found by codespell. Patch by 
Luis Felipe Strano Moraes!

llvm-svn: 129558
 2011-04-15 05:18:47 +00:00
Bill Wendling
500b41a7a5 Add an option to not print the alias of an instruction. It defaults to "print 
the alias".

llvm-svn: 129485
 2011-04-13 23:36:21 +00:00
Johnny Chen
443a6902bf Thumb disassembler was erroneously rejecting "blx sp" instruction. 
rdar://problem/9267838

llvm-svn: 129320
 2011-04-11 23:33:30 +00:00
NAKAMURA Takumi
0e00d1971e TableGen: Keep the order of DECL_CONTEXT() for DeclNodes.td. RecordVector may be used instead of RecordSet. 
The result of DeclNodes.inc was unstable on msys, Windows 7 x64.

llvm-svn: 129317
 2011-04-11 23:20:28 +00:00
Daniel Dunbar
a01ae2f598 build: Add support for a SHOW_DIAGNOSTICS build variable. 
If enabled, this will attempt to use the CC_LOG_DIAGNOSTICS feature I dropped
into Clang to print a log of all the diagnostics generated during an individual
build (from the top-level). Not sure if this will actually be useful, but for
now it is handy for testing the option.

llvm-svn: 129312
 2011-04-11 22:37:39 +00:00
Chris Lattner
9308e08aad fix PR9629 - We were lowering regexes like a{{b|c}}d into ab|cd, which 
is substantially different than a(b|c)d.  Form the latter regex instead.
This found a few problems in the testsuite, which serves as its test.

llvm-svn: 129196
 2011-04-09 06:37:03 +00:00
Chris Lattner
9b791ceb9b various cleanups, no functionality change. 
llvm-svn: 129192
 2011-04-09 06:18:02 +00:00
Bill Wendling
fafa0c2509 Only emit the AvailableFeatures variable if it's used. 
llvm-svn: 129124
 2011-04-08 04:08:57 +00:00
Bill Wendling
342ba5c4b6 Replace the old algorithm that emitted the "print the alias for an instruction" 
with the newer, cleaner model. It uses the IAPrinter class to hold the
information that is needed to match an instruction with its alias. This also
takes into account the available features of the platform.

There is one bit of ugliness. The way the logic determines if a pattern is
unique is O(N**2), which is gross. But in reality, the number of items it's
checking against isn't large. So while it's N**2, it shouldn't be a massive time
sink.

llvm-svn: 129110
 2011-04-07 21:20:06 +00:00
Joerg Sonnenberger
1cbd300346 Add support for the VIA PadLock instructions. 
llvm-svn: 128826
 2011-04-04 16:58:13 +00:00
Joerg Sonnenberger
aedfaff262 Use array_lengthof 
llvm-svn: 128823
 2011-04-04 16:25:38 +00:00
Joerg Sonnenberger
4acf601864 Change loops to derive the number of tables automatically 
llvm-svn: 128818
 2011-04-04 14:42:22 +00:00
Daniel Dunbar
7e8cb9fc5e tlbgen/MC: StringRef's to temporary objects considered harmful. 
llvm-svn: 128735
 2011-04-01 20:23:52 +00:00
Andrew Trick
5d212b6374 Add annotations to tablegen-generated processor itineraries, or replace them with something meaningful. I want to be able to read and debug the generated tables. 
llvm-svn: 128703
 2011-04-01 02:22:47 +00:00
Andrew Trick
ee4b7e695a whitespace 
llvm-svn: 128701
 2011-04-01 01:56:55 +00:00
Nick Lewycky
6429481136 Fix typo in generated HTML. 
llvm-svn: 128594
 2011-03-31 00:23:57 +00:00
Bob Wilson
5e30c4c931 Use intrinsics for Neon vmull operations. Radar 9208957. 
llvm-svn: 128591
 2011-03-31 00:09:35 +00:00
Argyrios Kyrtzidis
bea6ccf737 ClangSAEmClangSACheckersEmitter, emit info about groups. 
llvm-svn: 128515
 2011-03-30 00:22:00 +00:00
Matt Beaumont-Gay
bf215beedb Quiet a gcc warning about changed name lookup rules 
llvm-svn: 128497
 2011-03-29 22:25:36 +00:00
Argyrios Kyrtzidis
e923f22a2e In ClangSACheckersEmitter: 
- Also emit a list of packages and groups sorted by name
  - Avoid iterating over DenseSet so that the output of the arrays is deterministic.

llvm-svn: 128489
 2011-03-29 21:16:19 +00:00
Argyrios Kyrtzidis
71261edb9b For ClangSACheckersEmitter, allow a package to belong to checker group, in which all its checkers will go into the group. 
llvm-svn: 128474
 2011-03-29 18:53:00 +00:00
Devang Patel
ce52d006e1 Remove scripts used by TEST=dbg from here. They now live inside llvm test suite. 
llvm-svn: 128425
 2011-03-28 20:28:30 +00:00
Duncan Sands
c9b450fae7 Partially revert commit 127155: I think it is much more convenient 
to have structured log files rather than one big file produced by
piping output.

llvm-svn: 128378
 2011-03-27 13:52:32 +00:00
Douglas Gregor
88d8c14766 Extend Clang's TableGen emitter for attributes to support bool arguments. 
llvm-svn: 128330
 2011-03-26 03:40:01 +00:00
Duncan Sands
4d240b1e9e Useful script for finding regressions in the nightly testsuite. 
I think it was written by Pawel Worach.

llvm-svn: 128268
 2011-03-25 07:17:44 +00:00
Johnny Chen
a4f73530a5 delegate the disassembly of t2ADR to the more generic t2ADDri12/t2SUBri12 instructions, and add a test case for that. 
llvm-svn: 128249
 2011-03-25 00:17:42 +00:00
Johnny Chen
4a55a733b8 The opcode names ("tLDM", "tLDM_UPD") used for conflict resolution have been stale since 
the change to ("tLDMIA", "tLDMIA_UPD").  Update the conflict resolution code and add
test cases for that.

llvm-svn: 128247
 2011-03-24 23:42:31 +00:00
Johnny Chen
6345e6a882 The ARM disassembler was confused with the 16-bit tSTMIA instruction. 
According to A8.6.189 STM/STMIA/STMEA (Encoding T1), there's only tSTMIA_UPD available.
Ignore tSTMIA for the decoder emitter and add a test case for that.

llvm-svn: 128246
 2011-03-24 23:21:14 +00:00
Bruno Cardoso Lopes
a5de5df6d8 Add asm parsing support w/ testcases for strex/ldrex family of instructions 
llvm-svn: 128236
 2011-03-24 21:04:58 +00:00
Johnny Chen
ae5d27987a ADR was added with the wrong encoding for inst{24-21}, and the ARM decoder was fooled. 
Set the encoding bits to {0,?,?,0}, not 0.  Plus delegate the disassembly of ADR to
the more generic ADDri/SUBri instructions, and add a test case for that.

llvm-svn: 128234
 2011-03-24 20:42:48 +00:00
Douglas Gregor
d11c0d2ab8 Update the Clang attribute emitter to handle attributes of 'version' 
kind, and fix serialization/deserialization of IdentifierInfo
attributes. These are requires for the new 'availability' attribute.

llvm-svn: 128130
 2011-03-23 01:05:46 +00:00
Bill Wendling
52c4596a0f Call static functions so that they aren't left unused. 
llvm-svn: 128020
 2011-03-21 21:08:27 +00:00
Bill Wendling
9adf1c9edd A WIP commit of the InstAlias printing cleanup. This code will soon replace the 
code below it. Even though it looks very similar, it will match more precisely
and geneate better functions in the long run.

llvm-svn: 127991
 2011-03-21 08:59:17 +00:00
Bill Wendling
4cdb29548b Add the IAPrinter class. 
This is a helper class that will make it easier to say which InstAliases can be
printed and which cannot (because of ambiguity).

llvm-svn: 127990
 2011-03-21 08:40:31 +00:00
Bill Wendling
e3b0820ad4 * Add classes that support the "feature" information. 
* Move the code that emits the reg in reg class matching into its own function.

llvm-svn: 127988
 2011-03-21 08:31:53 +00:00
Owen Anderson
c23c6e0c1a Thumb2 PC-relative loads require a fixup rather than just an immediate. 
llvm-svn: 127888
 2011-03-18 17:42:55 +00:00
NAKAMURA Takumi
cdd69c874f raw_ostream: [PR6745] Tweak formatting (double)%e for Windows hosts. 
On MSVCRT and compatible, output of %e is incompatible to Posix by default. Number of exponent digits should be at least 2. "%+03d"

FIXME: Implement our formatter in future!
llvm-svn: 127872
 2011-03-18 09:30:10 +00:00
NAKAMURA Takumi
82c316b78a lit/ProgressBar.py: [PR7919] Improve line wrap for XN-incapable terminals. 
On Win32 console, emitting char to col#79 causes linefeed, and the cursor will not return to col#79 upper line with backspace.

llvm-svn: 127696
 2011-03-15 21:07:44 +00:00
Evan Cheng
14eff5d627 - Add "Bitcast" target instruction property for instructions which perform 
nothing more than a bitcast.
- Teach tablegen to automatically infer "Bitcast" property.

llvm-svn: 127667
 2011-03-15 05:09:26 +00:00
Sean Callanan
5a51ccdc0f X86 table-generator and disassembler support for the AVX 
instruction set.  This code adds support for the VEX prefix
and for the YMM registers accessible on AVX-enabled
architectures.  Instruction table support that enables AVX
instructions for the disassembler is in an upcoming patch.

llvm-svn: 127644
 2011-03-15 01:23:15 +00:00
Owen Anderson
49965661d5 Ignore isCodeGenOnly instructions when generating diassembly tables. 
llvm-svn: 127619
 2011-03-14 20:58:49 +00:00
Jim Grosbach
973ab94013 Trailing whitespace. 
llvm-svn: 127592
 2011-03-14 17:32:49 +00:00
Francois Pichet
0e434150f9 Correct small comment order typo. 
llvm-svn: 127575
 2011-03-14 02:30:32 +00:00
Jim Grosbach
a87f223848 Remove no-longer-correct special case for disasm of ARM BL instructions. 
llvm-svn: 127517
 2011-03-12 01:05:29 +00:00
Jim Grosbach
daffeb06fb Pseudo-ize the ARM 'B' instruction. 
llvm-svn: 127510
 2011-03-11 23:24:15 +00:00
Jim Grosbach
2226dfbea2 Remove dead code. These ARM instruction definitions no longer exist. 
llvm-svn: 127509
 2011-03-11 23:15:02 +00:00
Jim Grosbach
01a937ac07 Remove dead code. These ARM instruction definitions no longer exist. 
llvm-svn: 127508
 2011-03-11 23:11:41 +00:00
Jim Grosbach
009af69d6d Pseudo-ize VMOVDcc and VMOVScc. 
llvm-svn: 127506
 2011-03-11 23:09:50 +00:00
Jim Grosbach
b480da2317 Remove dead code. These ARM instruction definitions don't exist. 
llvm-svn: 127491
 2011-03-11 20:51:07 +00:00
Jim Grosbach
ee6075cda5 ARM VDUPfd and VDUPfq can just be patterns. The instruction is the same 
as for VDUP32d and VDUP32q, respectively.

llvm-svn: 127489
 2011-03-11 20:44:08 +00:00