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2 Commits

Author SHA1 Message Date
Oliver Stannard
d5cdc39fe7 [ARM] Allow selecting VRINT[APMXZR] and VCVT[BT] instructions for FPv5 
Currently, we only codegen the VRINT[APMXZR] and VCVT[BT] instructions
when targeting ARMv8, but they are actually present on any target with
FP-ARMv8. Note that FP-ARMv8 is called FPv5 when is is part of an
M-profile core, but they have the same instructions so we model them
both as FPARMv8 in the ARM backend.

llvm-svn: 218763
 2014-10-01 13:13:18 +00:00
Chad Rosier
e4076eb345 [AArch32] Add support for FP rounding operations for ARMv8/AArch32. 
Phabricator Revision: http://reviews.llvm.org/D4935

llvm-svn: 215772
 2014-08-15 21:38:16 +00:00