Matt Arsenault
b88ff2e112
AMDGPU: Pattern match ffbh pattern to instruction.
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The hardware instruction's output on 0 is -1 rather than 32.
Eliminate a test and select to -1. This removes an extra instruction
from the compatability function with HSAIL's firstbit instruction.
llvm-svn: 257352
2016-01-11 17:02:00 +00:00
Matt Arsenault
3ca8d64e75
AMDGPU: Use generic bitreverse intrinsic
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Also fix bug in vector legalization for bitreverse.
llvm-svn: 255512
2015-12-14 17:25:38 +00:00
Tom Stellard
3f1708598e
R600 -> AMDGPU rename
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llvm-svn: 239657
2015-06-13 03:28:10 +00:00
Tom Stellard
39f7e52397
Revert "AMDGPU: Add core backend files for R600/SI codegen v6"
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This reverts commit 4ea70107c5e51230e9e60f0bf58a0f74aa4885ea.
llvm-svn: 160303
2012-07-16 18:19:53 +00:00
Tom Stellard
9f326179fc
AMDGPU: Add core backend files for R600/SI codegen v6
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llvm-svn: 160270
2012-07-16 14:17:08 +00:00
