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Author SHA1 Message Date
Chris Lattner
1f9360318d Nuke PowerPCInstrFormats.h, its contents are dead. Remove the definitions 
from the .td file that correspond to it

llvm-svn: 23736
 2005-10-14 22:44:13 +00:00
Nate Begeman
3b6c2df603 Properly split f32 and f64 into separate register classes for scalar sse fp 
fixing a bunch of nasty hackery

llvm-svn: 23735
 2005-10-14 22:06:00 +00:00
Nate Begeman
27cce12802 Remove an unnecsesary file. PPC32 and PPC64 share architected registers. 
We will decide with subtarget support whether we ever use an i64 register
class.

llvm-svn: 23734
 2005-10-14 18:58:46 +00:00
Chris Lattner
664dd0c80e add the integer truncate/extension operations 
llvm-svn: 23733
 2005-10-14 06:40:20 +00:00
Chris Lattner
19cff97f32 Make sure targets depend on TargetSelectionDAG.td 
llvm-svn: 23732
 2005-10-14 06:31:58 +00:00
Chris Lattner
102b6e76e6 These are now autogenerated 
llvm-svn: 23731
 2005-10-14 06:26:29 +00:00
Chris Lattner
3aa7a188b9 Now that we have int/fp lattice values, implement the SDTCisOpSmallerThanOp 
type constraint.  This lets tblgen realize that it doesn't need any dynamic
type checks for fextend/fround on PPC (and many other targets), because there
are only two fp types.

llvm-svn: 23730
 2005-10-14 06:25:00 +00:00
Chris Lattner
28621890d9 Fairly serious rework of the typing code to add new int/fp lattice values. 
Overall, no functionality change yet though.

llvm-svn: 23729
 2005-10-14 06:12:03 +00:00
Chris Lattner
c5dbaceaee simplify the code a bit 
llvm-svn: 23728
 2005-10-14 05:08:37 +00:00
Chris Lattner
35002513b5 Add patterns for FP round/extend 
llvm-svn: 23727
 2005-10-14 04:55:50 +00:00
Chris Lattner
1a001d068a add a new SDTCisOpSmallerThanOp type constraint, and implement fround/fextend in terms of it 
llvm-svn: 23726
 2005-10-14 04:55:10 +00:00
Chris Lattner
d83bbd0f14 Add basic support for recognizing a new SDTCisOpSmallerThanOp type constraint 
llvm-svn: 23725
 2005-10-14 04:53:53 +00:00
Chris Lattner
81047cdfc0 Implement a couple of new (important) features. 
1. If an operation has to be int or fp and the target only supports one
   int or fp type, relize that the op has to have that type.
2. If a target has operations on multiple types, do not emit matching code
   for patterns involving those operators, since we do not emit the code to
   check for them yet.  This prevents PPC from generating FP ops currently.

Also move some code around into more logical places.

llvm-svn: 23724
 2005-10-14 04:11:13 +00:00
Chris Lattner
ee8c8e4562 Do not let getLegalValueTypes return a list with duplicates in it 
llvm-svn: 23723
 2005-10-14 03:54:49 +00:00
Nate Begeman
9c6b86dcb4 fold sext_in_reg, sext_in_reg where both have the same VT. This was 
popping up in Fourinarow.

llvm-svn: 23722
 2005-10-14 01:29:07 +00:00
Chris Lattner
99b65b821a Allow $ 
llvm-svn: 23721
 2005-10-14 01:28:34 +00:00
Nate Begeman
c206a2a32a Relax the checking on zextload generation a bit, since as sabre pointed out 
you could be AND'ing with the result of a shift that shifts out all the
bits you care about, in addition to a constant.

Also, move over an add/sub_parts fold from legalize to the dag combiner,
where it works for things other than constants.  Woot!

llvm-svn: 23720
 2005-10-14 01:12:21 +00:00
Chris Lattner
26f6c4de3d Fix errors when compiling with -pedantic 
llvm-svn: 23719
 2005-10-14 00:33:05 +00:00
Chris Lattner
b2db3f50f2 Fix the trunc(load) case, finally allowing crafty and povray to pass 
llvm-svn: 23718
 2005-10-13 22:10:05 +00:00
Chris Lattner
2563394c27 Fix some bugs in (sext (load x)) 
llvm-svn: 23717
 2005-10-13 21:52:31 +00:00
Chris Lattner
3fd6d9358e When ExpandOp'ing a [SZ]EXTLOAD, make sure to remember that the chain 
is also legal.  Add support for ExpandOp'ing raw EXTLOADs too.

llvm-svn: 23716
 2005-10-13 21:44:47 +00:00
Chris Lattner
dc6e47231b Implement PromoteOp for *EXTLOAD, allowing MallocBench/gs to Legalize 
llvm-svn: 23715
 2005-10-13 20:07:41 +00:00
Nate Begeman
d155f7f1c2 Fix the remaining DAGCombiner issues pointed out by sabre. This should fix 
the remainder of the failures introduced by my patch last night.

llvm-svn: 23714
 2005-10-13 18:34:58 +00:00
Chris Lattner
75447d2f8e Fix a minor bug in the dag combiner that broke pcompress2 and some other 
tests.

llvm-svn: 23713
 2005-10-13 18:16:34 +00:00
Patrick Meredith
120fb3b9ad Updated to be less restrictive on what is matched 
llvm-svn: 23712
 2005-10-13 17:31:30 +00:00
Nate Begeman
9a08d6fb43 Add support to Legalize for expanding i64 sextload/zextload into hi and lo 
parts. This should fix the crafty and signed long long unit test failure
on x86 last night.

llvm-svn: 23711
 2005-10-13 17:15:37 +00:00
Jim Laskey
2d23e75ac5 Inhibit instructions from being pushed before function calls. This will 
minimize unnecessary spilling.

llvm-svn: 23710
 2005-10-13 16:44:00 +00:00
Chris Lattner
11f7589eaa apparently one of the makefile changes changed libprofile.so to profile.so 
llvm-svn: 23709
 2005-10-13 16:34:24 +00:00
Patrick Meredith
ea6da36ab2 This script is used to remove nodes with the label %tmp(.#)* and all 
edges associated with said node from the dot files produced by
DSA.

llvm-svn: 23708
 2005-10-13 16:26:50 +00:00
Chris Lattner
d8ed29bb67 Nate implemented this :) 
llvm-svn: 23707
 2005-10-13 06:04:34 +00:00
Nate Begeman
c7e7c94db5 Move some Legalize functionality over to the DAGCombiner where it belongs. 
Kill some dead code.

llvm-svn: 23706
 2005-10-13 03:11:28 +00:00
Nate Begeman
b49e7aa166 SimplifySelectCC is dead 
llvm-svn: 23705
 2005-10-13 03:10:46 +00:00
Nate Begeman
b1d64c386b Fix a potential bug with two combine-to's back to back that chris pointed 
out, where after the first CombineTo() call, the node the second CombineTo
wishes to replace may no longer exist.

Fix a very real bug with the truncated load optimization on little endian
targets, which do not need a byte offset added to the load.

llvm-svn: 23704
 2005-10-12 23:18:53 +00:00
Nate Begeman
d97bb9d084 More cool stuff for the dag combiner. We can now finally handle things 
like turning:

_foo:
        fctiwz f0, f1
        stfd f0, -8(r1)
        lwz r2, -4(r1)
        rlwinm r3, r2, 0, 16, 31
        blr

into
_foo:
        fctiwz f0,f1
        stfd f0,-8(r1)
        lhz r3,-2(r1)
        blr

Also removed an unncessary constraint from sra -> srl conversion, which
should take care of hte only reason we would ever need to handle sra in
MaskedValueIsZero, AFAIK.

llvm-svn: 23703
 2005-10-12 20:40:40 +00:00
Jim Laskey
2fe279f783 Finally committing to the new scheduler. Still -sched=none by default. 
llvm-svn: 23702
 2005-10-12 18:29:35 +00:00
Jim Laskey
84b96c93e4 Added graphviz/gv support for MF. 
llvm-svn: 23700
 2005-10-12 12:09:05 +00:00
Chris Lattner
2beb0862d5 this passes with the change in predicate 
llvm-svn: 23699
 2005-10-11 18:42:26 +00:00
Chris Lattner
23ecce5c82 Fix (hopefully the last) issue where LSR is nondeterminstic. When pulling 
out CSE's of base expressions it could build a result whose order was
nondet.

llvm-svn: 23698
 2005-10-11 18:41:04 +00:00
Chris Lattner
7effc54496 Fix another problem where LSR was being nondeterminstic. Also remove elements 
from the end of a vector instead of the beginning

llvm-svn: 23697
 2005-10-11 18:30:57 +00:00
Chris Lattner
862a6ea0ac lsr doesn't emit gep instructions anymore 
llvm-svn: 23696
 2005-10-11 18:28:48 +00:00
Chris Lattner
1ec477da8f Fix another lsr-is-nondeterministic case 
llvm-svn: 23695
 2005-10-11 18:17:57 +00:00
Chris Lattner
21c3cf756f Fix a powerpc crash on CodeGen/Generic/llvm-ct-intrinsics.ll 
llvm-svn: 23694
 2005-10-11 17:56:34 +00:00
Chris Lattner
e6fcb88ad1 Add a canonicalization that got lost, fixing PowerPC/fold-li.ll:SUB 
llvm-svn: 23693
 2005-10-11 06:07:15 +00:00
Chris Lattner
1441e42e56 clean up some corner cases 
llvm-svn: 23692
 2005-10-10 23:00:08 +00:00
Chris Lattner
5308a566ba Implement trivial DSE. If two stores are neighbors and store to the same 
location, replace them with a new store of the last value.  This occurs
in the same neighborhood in 197.parser, speeding it up about 1.5%

llvm-svn: 23691
 2005-10-10 22:31:19 +00:00
Chris Lattner
1c60abe065 Add support for CombineTo, allowing the dag combiner to replace nodes with 
multiple results.

Use this support to implement trivial store->load forwarding, implementing
CodeGen/PowerPC/store-load-fwd.ll.  Though this is the most simple case and
can be extended in the future, it is still useful.  For example, it speeds
up 197.parser by 6.2% by avoiding an LSU reject in xalloc:

        stw r6, lo16(l5_end_of_array)(r2)
        addi r2, r5, -4
        stwx r5, r4, r2
-       lwzx r5, r4, r2
-       rlwinm r5, r5, 0, 0, 30
        stwx r5, r4, r2
        lwz r2, -4(r4)
        ori r2, r2, 1

llvm-svn: 23690
 2005-10-10 22:04:48 +00:00
Chris Lattner
8290d31c12 new testcase 
llvm-svn: 23689
 2005-10-10 21:57:37 +00:00
Nate Begeman
703c8f57d6 Teach the DAGCombiner several new tricks, teaching it how to turn 
sext_inreg into zext_inreg based on the signbit (fires a lot), srem into
urem, etc.

llvm-svn: 23688
 2005-10-10 21:26:48 +00:00
Chris Lattner
e4634f54f1 A testcase sitting in my tree 
llvm-svn: 23687
 2005-10-10 21:21:36 +00:00
Chris Lattner
caed5bc79b Fix comment 
llvm-svn: 23686
 2005-10-10 16:52:03 +00:00