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14205 Commits

Author SHA1 Message Date
Chris Lattner
474e1b7ef3 Comment out dead variables 
llvm-svn: 28252
 2006-05-12 17:57:54 +00:00
Reid Spencer
ea509eb3ac When reading the symbol table, make sure to delete the ArchiveMember 
created by reading the symbol table.

llvm-svn: 28251
 2006-05-12 17:56:20 +00:00
Chris Lattner
90527550c1 Remove dead var 
llvm-svn: 28250
 2006-05-12 17:50:35 +00:00
Chris Lattner
9930cf948e Remove dead variable 
llvm-svn: 28249
 2006-05-12 17:41:45 +00:00
Chris Lattner
9789688d36 remove dead variable. 
llvm-svn: 28248
 2006-05-12 17:33:59 +00:00
Chris Lattner
2c316c91e8 Remove dead variable. 
llvm-svn: 28247
 2006-05-12 17:31:21 +00:00
Chris Lattner
db5b91f6a8 Compile: 
%tmp152 = setgt uint %tmp144, %tmp149           ; <bool> [#uses=1]
        %tmp159 = setlt uint %tmp144, %tmp149           ; <bool> [#uses=1]
        %bothcond2 = or bool %tmp152, %tmp159           ; <bool> [#uses=1]

To setne, not setune, which causes an assertion fault.

llvm-svn: 28244
 2006-05-12 17:03:46 +00:00
Chris Lattner
bcd2c4f32d Fix PowerPC/2006-05-12-rlwimi-crash.ll 
Nate, please verify that if InsertMask is 0, rlwimi shouldn't be used.
This fixes the crash and causes no PPC testsuite regressions.

llvm-svn: 28243
 2006-05-12 16:29:37 +00:00
Owen Anderson
1245bd420e Add a method to generate a string representation from a TargetData. 
This continues the work on PR 761.

llvm-svn: 28239
 2006-05-12 07:01:44 +00:00
Owen Anderson
29e4d70aed Refactor a bunch of includes so that TargetMachine.h doesn't have to include 
TargetData.h.  This should make recompiles a bit faster with my current
TargetData tinkering.

llvm-svn: 28238
 2006-05-12 06:33:49 +00:00
Owen Anderson
a0a9e4584a Fix some tabbing issues. 
llvm-svn: 28237
 2006-05-12 06:06:55 +00:00
Evan Cheng
f3d7bb7a9e Backing out fix for PR770. Need to re-apply it after live range splitting is possible 
llvm-svn: 28236
 2006-05-12 06:06:34 +00:00
Evan Cheng
c24d0f281c Duh. That could take a long time. 
llvm-svn: 28235
 2006-05-12 06:05:18 +00:00
Owen Anderson
30ffff31f2 Add a new constructor to TargetData that builds a TargetData from its 
string representation.

This is part of PR 761.

llvm-svn: 28234
 2006-05-12 05:49:47 +00:00
Chris Lattner
a500852895 Two simplifications for token factor nodes: simplify tf(x,x) -> x. 
simplify tf(x,y,y,z) -> tf(x,y,z).

llvm-svn: 28233
 2006-05-12 05:01:37 +00:00
Evan Cheng
0b8e4bca80 Add capability to scheduler to commute nodes for profit. 
If a two-address code whose first operand has uses below, it should be commuted
when possible.

llvm-svn: 28230
 2006-05-12 01:58:24 +00:00
Evan Cheng
eb67c0f664 Typo! How did we commute nodes before?! 
llvm-svn: 28229
 2006-05-12 01:46:26 +00:00
Chris Lattner
14cdcc59b8 For extra sanity checking, fill free'd memory with garbage so we know that 
people aren't reusing machine code buffers at all.

llvm-svn: 28228
 2006-05-12 00:03:12 +00:00
Chris Lattner
ecc6d6f334 Fix some bugs in the freelist manipulation code. 
Finally, implement ExecutionEngine::freeMachineCodeForFunction.

llvm-svn: 28227
 2006-05-11 23:56:57 +00:00
Evan Cheng
cb2a0f392c Refactor scheduler code. Move register-reduction list scheduler to a 
separate file. Added an initial implementation of top-down register pressure
reduction list scheduler.

llvm-svn: 28226
 2006-05-11 23:55:42 +00:00
Chris Lattner
81a3c90080 Significantly revamp allocation of machine code to use free lists, real 
allocation policies and much more.  All this complexity, and we have no
functionality change, woo! :)

llvm-svn: 28225
 2006-05-11 23:08:08 +00:00
Chris Lattner
3fad520c62 Refactor some code, making it simpler. 
When doing the initial pass of constant folding, if we get a constantexpr,
simplify the constant expr like we would do if the constant is folded in the
normal loop.

This fixes the missed-optimization regression in
Transforms/InstCombine/getelementptr.ll last night.

llvm-svn: 28224
 2006-05-11 17:11:52 +00:00
Evan Cheng
6a08dd641a Add MOV16_rm / MOV32_rm and MOV16_mr / MOV32_mr to isLoadFromStackSlot and isStoreToStackSlot 
llvm-svn: 28223
 2006-05-11 07:33:49 +00:00
Evan Cheng
7028ff2e25 Set weight of zero length intervals to infinite to prevent them from being 
spilled.

llvm-svn: 28220
 2006-05-11 07:29:24 +00:00
Evan Cheng
da04c3aab4 Backing out previous check-in. 
llvm-svn: 28219
 2006-05-11 07:28:16 +00:00
Evan Cheng
03fa9eb65e If the live interval legnth is essentially zero, i.e. in every live range 
the use follows def immediately, it doesn't make sense to spill it and
hope it will be easier to allocate for this LI.

llvm-svn: 28217
 2006-05-10 22:30:41 +00:00
Chris Lattner
e8fe3f2a08 Two changes: 
1. Implement InstCombine/deadcode.ll by not adding instructions in unreachable
   blocks (due to constants in conditional branches/switches) to the worklist.
   This causes them to be deleted before instcombine starts up, leading to
   better optimization.

2. In the prepass over instructions, do trivial constprop/dce as we go.  This
   has the effect of improving the effectiveness of #1.  In addition, it
   *significantly* speeds up instcombine on test cases with large amounts of
   constant folding code (for example, that produced by code specialization
   or partial evaluation).  In one example, it speeds up instcombine from
   0.0589s to 0.0224s with a release build (a 2.6x speedup).

llvm-svn: 28215
 2006-05-10 19:00:36 +00:00
Chris Lattner
085cfba0ca Fix the PowerPC JIT-only failure on UnitTests/Vector/sumarray-dbl, which is 
really a bad codegen bug that LLC happens to get lucky with. I must chat with
Nate for the proper fix.

llvm-svn: 28213
 2006-05-10 06:38:32 +00:00
Evan Cheng
9f269c1bef Templatify RegReductionPriorityQueue 
llvm-svn: 28212
 2006-05-10 06:16:44 +00:00
Chris Lattner
32ddb45079 Add an assertion for a common error 
llvm-svn: 28210
 2006-05-10 04:32:43 +00:00
Nate Begeman
3af196c9b2 Fix PR773 
llvm-svn: 28207
 2006-05-09 18:20:51 +00:00
Chris Lattner
486e0660b7 Fix a regression in my patch from last night that broke the llvmgcc4 build on 
ppc

llvm-svn: 28205
 2006-05-09 16:41:59 +00:00
Chris Lattner
56680711dc Indent .data/.text in the .s file 
llvm-svn: 28204
 2006-05-09 16:15:00 +00:00
Evan Cheng
1a8feb189e Add pseudo dependency to force a def&use operand to be scheduled last (unless 
the distance between the def and another use is much longer). This is under
option control for now "-sched-lower-defnuse".

llvm-svn: 28201
 2006-05-09 07:13:34 +00:00
Evan Cheng
3f72d2121b Debugging info 
llvm-svn: 28200
 2006-05-09 06:55:15 +00:00
Evan Cheng
1f5c530d04 Remove a completed entry. 
llvm-svn: 28199
 2006-05-09 06:54:05 +00:00
Evan Cheng
aad3fe008e PR 770 - permit coallescing of registers in subset register classes. 
llvm-svn: 28197
 2006-05-09 06:37:48 +00:00
Chris Lattner
b7152b0b42 Implement MASM sections correctly, without a "has masm sections flag" and a bunch of special case code. 
llvm-svn: 28194
 2006-05-09 05:33:48 +00:00
Chris Lattner
28fe830b3b Oh yeah, there are two of these now, unify both. 
llvm-svn: 28192
 2006-05-09 05:24:50 +00:00
Chris Lattner
d2aea9851e Setting SwitchToSectionDirective properly in the MASM backend permits a bunch 
of code to be unified.

llvm-svn: 28191
 2006-05-09 05:23:12 +00:00
Chris Lattner
85032c8c5c MASM doesn't have one of these. 
llvm-svn: 28190
 2006-05-09 05:21:47 +00:00
Chris Lattner
830bed591e Don't prefix section directives with a tab. Doing so causes blank lines to 
be emitted to the .s file.

llvm-svn: 28189
 2006-05-09 05:19:59 +00:00
Chris Lattner
baefeb1e09 Make the masm codepath work like the normal code path. 
llvm-svn: 28188
 2006-05-09 05:15:58 +00:00
Chris Lattner
8301da3ffe Preserve prior behavior 
llvm-svn: 28187
 2006-05-09 05:15:24 +00:00
Chris Lattner
6ede576b55 The MASM asmprinter has been fixed, these hacks are no longer needed. 
llvm-svn: 28186
 2006-05-09 05:13:34 +00:00
Chris Lattner
0c4a1e56f4 Fix the MASM asmprinter's lies. It does not want to emit code to .text/.data 
it wants it emitted to _text/_data.

llvm-svn: 28185
 2006-05-09 05:12:53 +00:00
Chris Lattner
f45b6d5c08 Split SwitchSection into SwitchTo{Text|Data}Section methods. 
llvm-svn: 28184
 2006-05-09 04:59:56 +00:00
Chris Lattner
71c68064f9 Some notes and thoughts to myself 
llvm-svn: 28182
 2006-05-09 04:58:46 +00:00
Chris Lattner
f49a22d601 Patch to make some xforms preserve each other. Patch contributed by 
Domagoj Babic!

llvm-svn: 28181
 2006-05-09 04:13:41 +00:00
Chris Lattner
6e58d3a317 Move some methods out of line so that MutexGuard.h isn't needed in a public header. 
llvm-svn: 28179
 2006-05-08 22:00:52 +00:00
Chris Lattner
5609ba71a5 Another bad case I noticed 
llvm-svn: 28177
 2006-05-08 21:39:45 +00:00
Chris Lattner
4f3345f1f1 add a note 
llvm-svn: 28176
 2006-05-08 21:24:21 +00:00
Chris Lattner
eed10e837c Make the case I just checked in stronger. Now we compile this: 
short test2(short X, short x) {
  int Y = (short)(X+x);
  return Y >> 1;
}

to:

_test2:
        add r2, r3, r4
        extsh r2, r2
        srawi r3, r2, 1
        blr

instead of:

_test2:
        add r2, r3, r4
        extsh r2, r2
        srwi r2, r2, 1
        extsh r3, r2
        blr

llvm-svn: 28175
 2006-05-08 21:18:59 +00:00
Chris Lattner
7b8a0cfff3 Implement and_sext.ll:test3, generating: 
_test4:
        srawi r3, r3, 16
        blr

instead of:

_test4:
        srwi r2, r3, 16
        extsh r3, r2
        blr

for:

short test4(unsigned X) {
  return (X >> 16);
}

llvm-svn: 28174
 2006-05-08 20:59:41 +00:00
Nate Begeman
db854c6772 Yet more readme updating 
llvm-svn: 28172
 2006-05-08 20:54:02 +00:00
Chris Lattner
4f66de151c Compile this: 
short test4(unsigned X) {
  return (X >> 16);
}

to:

_test4:
        movl 4(%esp), %eax
        sarl $16, %eax
        ret

instead of:

_test4:
        movl $-65536, %eax
        andl 4(%esp), %eax
        sarl $16, %eax
        ret

llvm-svn: 28171
 2006-05-08 20:51:54 +00:00
Nate Begeman
1ff4d8f2fe New note about something bad happening in target independent optimizers 
llvm-svn: 28170
 2006-05-08 20:08:28 +00:00
Nate Begeman
b8fa6337df Proving once again that I am not as smart as the compiler 
llvm-svn: 28169
 2006-05-08 19:09:24 +00:00
Nate Begeman
a706539a72 Fold more shifts into inserts, and update the README 
llvm-svn: 28168
 2006-05-08 17:38:32 +00:00
Chris Lattner
bbe4393bc4 Fold shifts with undef operands. 
llvm-svn: 28167
 2006-05-08 17:29:49 +00:00
Chris Lattner
6cac867da1 When tracking demanded bits, if any bits from the sext of an SRA are demanded, 
then so is the input sign bit.  This fixes mediabench/g721 on X86.

llvm-svn: 28166
 2006-05-08 17:22:53 +00:00
Nate Begeman
1f359b07de Make emission of jump tables a bit less conservative; they are now required 
to be only 31.25% dense, rather than 75% dense.

llvm-svn: 28165
 2006-05-08 16:51:36 +00:00
Evan Cheng
0fb3fc3626 Fixing truncate. Previously we were emitting truncate from r16 to r8 as 
movw. That is we promote the destination operand to r16. So
        %CH = TRUNC_R16_R8 %BP
is emitted as
        movw %bp, %cx.

This is incorrect. If %cl is live, it would be clobbered.
Ideally we want to do the opposite, that is emitted it as
        movb ??, %ch
But this is not possible since %bp does not have a r8 sub-register.

We are now defining a new register class R16_ which is a subclass of R16
containing only those 16-bit registers that have r8 sub-registers (i.e.
AX - DX). We isel the truncate to two instructions, a MOV16to16_ to copy the
value to the R16_ class, followed by a TRUNC_R16_R8.

Due to bug 770, the register colaescer is not going to coalesce between R16 and
R16_. That will be fixed later so we can eliminate the MOV16to16_. Right now, it
can only be eliminated if we are lucky that source and destination registers are
the same.

llvm-svn: 28164
 2006-05-08 08:01:26 +00:00
Nate Begeman
591488077e Update some stuff now that the new rlwimi code has gone in 
llvm-svn: 28162
 2006-05-08 02:52:38 +00:00
Nate Begeman
b8e351aec5 Fix PR772 
llvm-svn: 28161
 2006-05-08 01:35:01 +00:00
Evan Cheng
698b0517b5 Typo's 
llvm-svn: 28158
 2006-05-07 10:10:20 +00:00
Jeff Cohen
44ece070c7 Unlike Unix, Windows won't let a file be implicitly replaced via renaming without explicit permission. 
llvm-svn: 28157
 2006-05-07 02:51:51 +00:00
Nate Begeman
dc94b738d0 New rlwimi implementation, which is superior to the old one. There are 
still a couple missed optimizations, but we now generate all the possible
rlwimis for multiple inserts into the same bitfield.  More regression tests
to come.

llvm-svn: 28156
 2006-05-07 00:23:38 +00:00
Chris Lattner
5c9c9f0eb6 Use ComputeMaskedBits to determine # sign bits as a fallback. This allows us 
to handle all kinds of stuff, including silly things like:
sextinreg(setcc,i16) -> setcc.

llvm-svn: 28155
 2006-05-06 23:48:13 +00:00
Chris Lattner
8b8093dea2 Add some more sign propagation cases 
llvm-svn: 28154
 2006-05-06 23:40:29 +00:00
Jeff Cohen
37413e2c29 Apply bug fix supplied by Greg Pettyjohn for a bug he found: '<invalid>' is not a legal path on Windows. 
llvm-svn: 28153
 2006-05-06 23:25:53 +00:00
Chris Lattner
f76c0b6662 Simplify some code, add a couple minor missed folds 
llvm-svn: 28152
 2006-05-06 23:06:26 +00:00
Chris Lattner
4a4cbde0bb constant fold sign_extend_inreg 
llvm-svn: 28151
 2006-05-06 23:05:41 +00:00
Chris Lattner
3d5d01a74b remove cases handled elsewhere 
llvm-svn: 28150
 2006-05-06 22:43:44 +00:00
Chris Lattner
1fce346023 Add some more simple sign bit propagation cases. 
llvm-svn: 28149
 2006-05-06 22:39:59 +00:00
Jeff Cohen
248e133255 Fix some loose ends in MASM support. 
llvm-svn: 28148
 2006-05-06 21:27:14 +00:00
Chris Lattner
ca06e2522e Use the new TargetLowering::ComputeNumSignBits method to eliminate 
sign_extend_inreg operations.  Though ComputeNumSignBits is still rudimentary,
this is enough to compile this:

short test(short X, short x) {
  int Y = X+x;
  return (Y >> 1);
}
short test2(short X, short x) {
  int Y = (short)(X+x);
  return Y >> 1;
}

into:

_test:
        add r2, r3, r4
        srawi r3, r2, 1
        blr
_test2:
        add r2, r3, r4
        extsh r2, r2
        srawi r3, r2, 1
        blr

instead of:

_test:
        add r2, r3, r4
        srawi r2, r2, 1
        extsh r3, r2
        blr
_test2:
        add r2, r3, r4
        extsh r2, r2
        srawi r2, r2, 1
        extsh r3, r2
        blr

llvm-svn: 28146
 2006-05-06 09:30:03 +00:00
Chris Lattner
3a77411d76 Add some really really simple code for computing sign-bit propagation. 
This will certainly be enhanced in the future.

llvm-svn: 28145
 2006-05-06 09:27:13 +00:00
Chris Lattner
02d3258820 When inserting casts, be careful of where we put them. We cannot insert 
a cast immediately before a PHI node.

This fixes Regression/CodeGen/Generic/2006-05-06-GEP-Cast-Sink-Crash.ll

llvm-svn: 28143
 2006-05-06 09:10:37 +00:00
Chris Lattner
7661770087 Move some code around. 
Make the "fold (and (cast A), (cast B)) -> (cast (and A, B))" transformation
only apply when both casts really will cause code to be generated.  If one or
both doesn't, then this xform doesn't remove a cast.

This fixes Transforms/InstCombine/2006-05-06-Infloop.ll

llvm-svn: 28141
 2006-05-06 09:00:16 +00:00
Chris Lattner
89fa42b51e Teach the X86 backend about non-i32 inline asm register classes. 
llvm-svn: 28139
 2006-05-06 00:29:37 +00:00
Chris Lattner
fd1923bfa6 Fold (trunc (srl x, c)) -> (srl (trunc x), c) 
llvm-svn: 28138
 2006-05-06 00:11:52 +00:00
Chris Lattner
32e96402c0 Fold trunc(any_ext). This gives stuff like: 
27,28c27
<       movzwl %di, %edi
<       movl %edi, %ebx
---
>       movw %di, %bx

llvm-svn: 28137
 2006-05-05 22:56:26 +00:00
Chris Lattner
c912cf0b07 Shrink shifts when possible. 
llvm-svn: 28136
 2006-05-05 22:53:17 +00:00
Chris Lattner
2f0d27a72a Implement ComputeMaskedBits/SimplifyDemandedBits for ISD::TRUNCATE 
llvm-svn: 28135
 2006-05-05 22:32:12 +00:00
Chris Lattner
daae9ee503 Print a grouping around inline asm blocks so that we can tell when we are 
using them.

llvm-svn: 28134
 2006-05-05 21:50:04 +00:00
Chris Lattner
12bb901c93 Print *some* grouping around inline asm blocks so we know where they are. 
llvm-svn: 28133
 2006-05-05 21:48:50 +00:00
Chris Lattner
06cb36074a Indent multiline asm strings more nicely 
llvm-svn: 28132
 2006-05-05 21:47:05 +00:00
Chris Lattner
a03676690b Teach the code generator to use cvtss2sd as extload f32 -> f64 
llvm-svn: 28131
 2006-05-05 21:35:18 +00:00
Chris Lattner
4b581e4167 Fold (fpext (load x)) -> (extload x) 
llvm-svn: 28130
 2006-05-05 21:34:35 +00:00
Chris Lattner
229d3e3c2d More aggressively sink GEP offsets into loops. For example, before we 
generated:

        movl 8(%esp), %eax
        movl %eax, %edx
        addl $4316, %edx
        cmpb $1, %cl
        ja LBB1_2       #cond_false
LBB1_1: #cond_true
        movl L_QuantizationTables720$non_lazy_ptr, %ecx
        movl %ecx, (%edx)
        movl L_QNOtoQuantTableShift720$non_lazy_ptr, %edx
        movl %edx, 4460(%eax)
        ret
...

Now we generate:

        movl 8(%esp), %eax
        cmpb $1, %cl
        ja LBB1_2       #cond_false
LBB1_1: #cond_true
        movl L_QuantizationTables720$non_lazy_ptr, %ecx
        movl %ecx, 4316(%eax)
        movl L_QNOtoQuantTableShift720$non_lazy_ptr, %ecx
        movl %ecx, 4460(%eax)
        ret

... which uses one fewer register.

llvm-svn: 28129
 2006-05-05 21:17:49 +00:00
Chris Lattner
73bfc4c2ea Fix an infinite loop compiling oggenc last night. 
llvm-svn: 28128
 2006-05-05 20:51:30 +00:00
Evan Cheng
0e9ec8d566 Need extload patterns after Chris' DAG combiner changes 
llvm-svn: 28127
 2006-05-05 08:23:07 +00:00
Chris Lattner
95637c4889 Implement InstCombine/cast.ll:test29 
llvm-svn: 28126
 2006-05-05 06:39:07 +00:00
Chris Lattner
d7637651b6 Fold some common code. 
llvm-svn: 28124
 2006-05-05 06:32:04 +00:00
Chris Lattner
584874682a Implement: 
// fold (and (sext x), (sext y)) -> (sext (and x, y))
  // fold (or  (sext x), (sext y)) -> (sext (or  x, y))
  // fold (xor (sext x), (sext y)) -> (sext (xor x, y))
  // fold (and (aext x), (aext y)) -> (aext (and x, y))
  // fold (or  (aext x), (aext y)) -> (aext (or  x, y))
  // fold (xor (aext x), (aext y)) -> (aext (xor x, y))

llvm-svn: 28123
 2006-05-05 06:31:05 +00:00
Chris Lattner
bec98440f4 Pull and through and/or/xor. This compiles some bitfield code to: 
mov EAX, DWORD PTR [ESP + 4]
        mov ECX, DWORD PTR [EAX]
        mov EDX, ECX
        add EDX, EDX
        or EDX, ECX
        and EDX, -2147483648
        and ECX, 2147483647
        or EDX, ECX
        mov DWORD PTR [EAX], EDX
        ret

instead of:

        sub ESP, 4
        mov DWORD PTR [ESP], ESI
        mov EAX, DWORD PTR [ESP + 8]
        mov ECX, DWORD PTR [EAX]
        mov EDX, ECX
        add EDX, EDX
        mov ESI, ECX
        and ESI, -2147483648
        and EDX, -2147483648
        or EDX, ESI
        and ECX, 2147483647
        or EDX, ECX
        mov DWORD PTR [EAX], EDX
        mov ESI, DWORD PTR [ESP]
        add ESP, 4
        ret

llvm-svn: 28122
 2006-05-05 06:10:43 +00:00
Chris Lattner
02bb78abd3 Implement a variety of simplifications for ANY_EXTEND. 
llvm-svn: 28121
 2006-05-05 05:58:59 +00:00
Chris Lattner
53e8cbbb83 Factor some code, add these transformations: 
// fold (and (trunc x), (trunc y)) -> (trunc (and x, y))
  // fold (or  (trunc x), (trunc y)) -> (trunc (or  x, y))
  // fold (xor (trunc x), (trunc y)) -> (trunc (xor x, y))

llvm-svn: 28120
 2006-05-05 05:51:50 +00:00
Evan Cheng
84612a59c2 Better implementation of truncate. ISel matches it to a pseudo instruction 
that gets emitted as movl (for r32 to i16, i8) or a movw (for r16 to i8). And
if the destination gets allocated a subregister of the source operand, then
the instruction will not be emitted at all.

llvm-svn: 28119
 2006-05-05 05:40:20 +00:00
Chris Lattner
4978a4f2f4 New note, Nate, please check to see if I'm full of it :) 
llvm-svn: 28118
 2006-05-05 05:36:15 +00:00
Jeff Cohen
953baf0494 Fix VC++ compilation error. 
llvm-svn: 28117
 2006-05-05 01:47:05 +00:00
Chris Lattner
56694d0bb0 Sink noop copies into the basic block that uses them. This reduces the number 
of cross-block live ranges, and allows the bb-at-a-time selector to always
coallesce these away, at isel time.

This reduces the load on the coallescer and register allocator.  For example
on a codec on X86, we went from:

   1643 asm-printer           - Number of machine instrs printed
    419 liveintervals         - Number of loads/stores folded into instructions
   1144 liveintervals         - Number of identity moves eliminated after coalescing
   1022 liveintervals         - Number of interval joins performed
    282 liveintervals         - Number of intervals after coalescing
   1304 liveintervals         - Number of original intervals
     86 regalloc              - Number of times we had to backtrack
1.90232 regalloc              - Ratio of intervals processed over total intervals
     40 spiller               - Number of values reused
    182 spiller               - Number of loads added
    121 spiller               - Number of stores added
    132 spiller               - Number of register spills
      6 twoaddressinstruction - Number of instructions commuted to coalesce
    360 twoaddressinstruction - Number of two-address instructions

to:

   1636 asm-printer           - Number of machine instrs printed
    403 liveintervals         - Number of loads/stores folded into instructions
   1155 liveintervals         - Number of identity moves eliminated after coalescing
   1033 liveintervals         - Number of interval joins performed
    279 liveintervals         - Number of intervals after coalescing
   1312 liveintervals         - Number of original intervals
     76 regalloc              - Number of times we had to backtrack
1.88998 regalloc              - Ratio of intervals processed over total intervals
      1 spiller               - Number of copies elided
     41 spiller               - Number of values reused
    191 spiller               - Number of loads added
    114 spiller               - Number of stores added
    128 spiller               - Number of register spills
      4 twoaddressinstruction - Number of instructions commuted to coalesce
    356 twoaddressinstruction - Number of two-address instructions

On this testcase, this change provides a modest reduction in spill code,
regalloc iterations, and total instructions emitted.  It increases the number
of register coallesces.

llvm-svn: 28115
 2006-05-05 01:04:50 +00:00
Chris Lattner
bf8f91715e Adjust to use proper TargetData copy ctor 
llvm-svn: 28112
 2006-05-04 21:18:40 +00:00
Chris Lattner
db888e7880 Final pass of minor cleanups for MachineInstr 
llvm-svn: 28110
 2006-05-04 19:36:09 +00:00
Evan Cheng
ceb7645d40 Initial support for register pressure aware scheduling. The register reduction 
scheduler can go into a "vertical mode" (i.e. traversing up the two-address
chain, etc.) when the register pressure is low.
This does seem to reduce the number of spills in the cases I've looked at. But
with x86, it's no guarantee the performance of the code improves.
It can be turned on with -sched-vertically option.

llvm-svn: 28108
 2006-05-04 19:16:39 +00:00
Chris Lattner
32adc4592f Remove redundancy and a level of indirection when creating machine operands 
llvm-svn: 28107
 2006-05-04 19:14:44 +00:00
Chris Lattner
075404adaa Remove and simplify some more machineinstr/machineoperand stuff. 
llvm-svn: 28105
 2006-05-04 18:16:01 +00:00
Chris Lattner
eb41c99161 Rename MO_VirtualRegister -> MO_Register. Clean up immediate handling. 
llvm-svn: 28104
 2006-05-04 18:05:43 +00:00
Chris Lattner
685568510a Move some methods out of MachineInstr into MachineOperand 
llvm-svn: 28102
 2006-05-04 17:52:23 +00:00
Chris Lattner
55938f67ae Fix Transforms/InstCombine/2006-05-04-DemandedBitCrash.ll 
llvm-svn: 28101
 2006-05-04 17:33:35 +00:00
Chris Lattner
97f1af2f14 There shalt be only one "immediate" operand type! 
llvm-svn: 28099
 2006-05-04 17:21:20 +00:00
Chris Lattner
51b0cac238 Change "value" in MachineOperand to be a GlobalValue, as that is the only 
thing that can be in it.  Remove a dead method.

llvm-svn: 28098
 2006-05-04 17:02:51 +00:00
Chris Lattner
20affbd29a Revert Nate's CR patch from last night, which caused many regressions (e.g. fhourstones). 
Loading and storing off R0 isn't what we wanted.  Also, taking some CR's out of
CRRC seems to cause failures as well.  Further investigation is required.

llvm-svn: 28097
 2006-05-04 16:56:45 +00:00
Jeff Cohen
097cc5d00b Make external globals public; other minor cleanup. 
llvm-svn: 28096
 2006-05-04 16:20:22 +00:00
Jeff Cohen
a954c15ea1 Make Intel syntax the default when LLVM is built with VC++. 
llvm-svn: 28095
 2006-05-04 16:19:27 +00:00
Chris Lattner
a39a7f900f Remove a bunch more dead V9 specific stuff 
llvm-svn: 28094
 2006-05-04 01:26:39 +00:00
Chris Lattner
c779fca289 Remove a bunch more SparcV9 specific stuff 
llvm-svn: 28093
 2006-05-04 01:15:02 +00:00
Chris Lattner
ed58ec2a57 Remove some more V9-specific stuff. 
llvm-svn: 28092
 2006-05-04 00:49:59 +00:00
Chris Lattner
0f89e6b11d Remove some more unused stuff from MachineInstr that was leftover from V9. 
llvm-svn: 28091
 2006-05-04 00:44:25 +00:00
Chris Lattner
b14a767a3e Simplify handling of relocations 
llvm-svn: 28090
 2006-05-04 00:42:08 +00:00
Evan Cheng
ef2fbe7460 Use movsd to shuffle in the lowest two elements of a v4f32 / v4i32 vector when 
movlps cannot be used (e.g. when load from m64 has multiple uses).

llvm-svn: 28089
 2006-05-03 20:32:03 +00:00
Chris Lattner
f89e1162ad Change from using MachineRelocation ctors to using static methods 
in MachineRelocation to create Relocations.

llvm-svn: 28088
 2006-05-03 20:30:20 +00:00
Chris Lattner
326eedfa77 minor cleanups, no functionality change 
llvm-svn: 28087
 2006-05-03 18:55:56 +00:00
Chris Lattner
87fa1cef04 inline a simple method 
llvm-svn: 28083
 2006-05-03 17:21:32 +00:00
Chris Lattner
d36b66d6dc Suck block address tracking out of targets into the JIT Emitter. This 
simplifies the MachineCodeEmitter interface just a little bit and makes
BasicBlocks work like constant pools and jump tables.

llvm-svn: 28082
 2006-05-03 17:10:41 +00:00
Chris Lattner
b12bd9d7a7 Fix a bug in Owen's checkin that broke the CBE on all non sparc v9 platforms. 
llvm-svn: 28081
 2006-05-03 05:48:41 +00:00
Nate Begeman
a4ea552058 Teach the x86 jit how to handle jump tables not directly used by a jump 
instruction.

llvm-svn: 28080
 2006-05-03 04:52:47 +00:00
Nate Begeman
95a4f191e0 Finish up the initial jump table implementation by allowing jump tables to 
not be 100% dense.  Increase the minimum threshold for the number of cases
in a switch statement from 4 to 6 in order to create a jump table.

llvm-svn: 28079
 2006-05-03 03:48:02 +00:00
Evan Cheng
2922daab4b Bottom up register pressure reduction work: clean up some hacks and enhanced 
the heuristic to further reduce spills for several test cases. (Note, it may
not necessarily translate to runtime win!)

llvm-svn: 28076
 2006-05-03 02:10:45 +00:00
Owen Anderson
71bc529dfa Refactor TargetMachine, pushing handling of TargetData into the target-specific subclasses. This has one caller-visible change: getTargetData() now returns a pointer instead of a reference. 
This fixes PR 759.

llvm-svn: 28074
 2006-05-03 01:29:57 +00:00
Chris Lattner
be9958e6f7 Align function bodies correctly. 
llvm-svn: 28073
 2006-05-03 01:03:20 +00:00
Chris Lattner
c43d309514 Simplify some code. Don't add memory blocks to the Blocks list twice. 
llvm-svn: 28071
 2006-05-03 00:54:49 +00:00
Chris Lattner
95f75d0506 Add assertions that verify that the actual arguments to a call or invoke match 
the prototype of the called function.

llvm-svn: 28070
 2006-05-03 00:48:22 +00:00
Chris Lattner
06ccac43d7 Change the BasicBlockAddrs map to be a vector, indexed by MBB number. 
llvm-svn: 28069
 2006-05-03 00:32:55 +00:00
Chris Lattner
28ac95615b Keep the alpha JIT similar to the PPC/X86 jits 
llvm-svn: 28068
 2006-05-03 00:31:21 +00:00
Chris Lattner
be23568cea Simplify some code 
llvm-svn: 28066
 2006-05-03 00:13:06 +00:00
Chris Lattner
2bf37af52d Several related changes: 
1. Change several methods in the MachineCodeEmitter class to be pure virtual.
2. Suck emitConstantPool/initJumpTableInfo into startFunction, removing them
   from the MachineCodeEmitter interface, and reducing the amount of target-
   specific code.
3. Change the JITEmitter so that it allocates constantpools and jump tables
   *right* next to the functions that they belong to, instead of in a separate
   pool of memory.  This makes all memory for a function be contiguous, and
   means the JITEmitter only tracks one block of memory now.

llvm-svn: 28065
 2006-05-02 23:22:24 +00:00
Nate Begeman
d9438bedaa Remove some stuff from the README 
llvm-svn: 28063
 2006-05-02 22:43:31 +00:00
Chris Lattner
8054cd3830 Do not make the JIT memory manager manage the memory for globals. Instead 
just have the JIT malloc them.

llvm-svn: 28062
 2006-05-02 21:57:51 +00:00
Chris Lattner
41cc593fc3 Minor cleanups, no functionality change. 
llvm-svn: 28061
 2006-05-02 21:44:14 +00:00
Chris Lattner
d100478886 Fix a purely hypothetical problem (for now): emitWord emits in the host 
byte format.  This doesn't work when using the code emitter in a cross target
environment.  Since the code emitter is only really used by the JIT, this
isn't a current problem, but if we ever start emitting .o files, it would be.

llvm-svn: 28060
 2006-05-02 19:14:47 +00:00
Chris Lattner
055baf5c7b Refactor the machine code emitter interface to pull the pointers for the current 
code emission location into the base class, instead of being in the derived classes.

This change means that low-level methods like emitByte/emitWord now are no longer
virtual (yaay for speed), and we now have a framework to support growable code
segments.  This implements feature request #1 of PR469.

llvm-svn: 28059
 2006-05-02 18:27:26 +00:00
Nate Begeman
d7b4d2a743 Since we don't handle callee-save CRs right yet, don't allocate them. Also 
don't step on R11 in the middle of a function when saving and restoring CRs

llvm-svn: 28058
 2006-05-02 17:37:31 +00:00
Nate Begeman
2a81b6be22 Print function number instead of name 
llvm-svn: 28057
 2006-05-02 17:36:46 +00:00
Nate Begeman
fa83cee567 Hooray, everyone now uses the same printBasicBlockLabel implementation 
llvm-svn: 28056
 2006-05-02 17:34:51 +00:00
Chris Lattner
5c1abc2b94 Remove dead method 
llvm-svn: 28055
 2006-05-02 17:20:28 +00:00
Chris Lattner
c11eac5284 There is no reason to use a virtual method to store this word. 
llvm-svn: 28053
 2006-05-02 17:16:20 +00:00
Chris Lattner
bb8c8b5d9d Remove the debug machine code emitter. The "FilePrinterEmitter" is more 
useful for debugging.

llvm-svn: 28051
 2006-05-02 16:59:24 +00:00
Nate Begeman
05174045df Extend printBasicBlockLabel a bit so that it can be used to print all 
basic block labels, consolidating the code to do so in one place for each
target.

llvm-svn: 28050
 2006-05-02 05:37:32 +00:00
Nate Begeman
82a6c0c66c Update the PPC compilation callback code to not need weird abi-violating 
prologs and epilogs, keep all the asm in one place, and remove use of
compiler builtin functions.

llvm-svn: 28049
 2006-05-02 04:50:05 +00:00
Chris Lattner
1275941193 Add pass ID's for various passes, so they can be AddRequiredID. Patch by 
Domagoj Babic!

llvm-svn: 28048
 2006-05-02 04:24:36 +00:00
Jeff Cohen
a35a8a5f9c De-virtualize SwitchSection. 
llvm-svn: 28047
 2006-05-02 03:58:45 +00:00
Jeff Cohen
b257253098 De-virtualize EmitZeroes. 
llvm-svn: 28046
 2006-05-02 03:46:13 +00:00
Jeff Cohen
5c2e201a63 Finish support for Microsoft ML/MASM. May still be a few rough edges. 
llvm-svn: 28045
 2006-05-02 03:11:50 +00:00
Jeff Cohen
ec0f5808a1 Make Intel syntax mode friendlier to Microsoft ML assembler (still needs more work). 
llvm-svn: 28044
 2006-05-02 01:16:28 +00:00
Chris Lattner
c2914c8ac5 Fix a latent bug that my spiller patch last week exposed: we were leaving 
instructions in the virtregfolded map that were deleted.  Because they
were deleted, newly allocated instructions could end up at the same address,
magically finding themselves in the map.  The solution is to remove entries
from the map when we delete the instructions.

llvm-svn: 28041
 2006-05-01 22:03:24 +00:00
Chris Lattner
a9f3c7c50a When promoting a load to a reg-reg copy, where the load was a previous 
instruction folded with spill code, make sure the remove the load from
the virt reg folded map.

llvm-svn: 28040
 2006-05-01 21:17:10 +00:00
Chris Lattner
befcd1e76d Remove previous patch, which wasn't quite right. 
llvm-svn: 28039
 2006-05-01 21:16:03 +00:00
Chris Lattner
8456272509 Put PHI/INLINEASM into the correct namespace. 
llvm-svn: 28037
 2006-05-01 17:00:49 +00:00
Evan Cheng
44e851f6ec Dis-favor stores more 
llvm-svn: 28035
 2006-05-01 09:20:44 +00:00
Evan Cheng
494e47d755 Bottom up register-pressure reduction scheduler now pushes store operations 
up the schedule. This helps code that looks like this:

loads ...
computations (first set) ...
stores (first set) ...
loads
computations (seccond set) ...
stores (seccond set) ...

Without this change, the stores and computations are more likely to
interleave:

loads ...
loads ...
computations (first set) ...
computations (second set) ...
computations (first set) ...
stores (first set) ...
computations (second set) ...
stores (stores set) ...

This can increase the number of spills if we are unlucky.

llvm-svn: 28033
 2006-05-01 09:14:40 +00:00
Evan Cheng
94264c7c90 Didn't mean ScheduleDAGList.cpp to make the last checkin. 
llvm-svn: 28030
 2006-05-01 08:56:34 +00:00
Evan Cheng
ef706b77c4 Remove temp. option -spiller-check-liveout, it didn't cause any failure nor performance regressions. 
llvm-svn: 28029
 2006-05-01 08:54:57 +00:00
Chris Lattner
fe8f858ec0 Remove %'s from register names when in intel mode. 
llvm-svn: 28027
 2006-05-01 05:53:50 +00:00
Chris Lattner
bce271e829 Format #APP lines a bit nicer 
llvm-svn: 28026
 2006-05-01 04:11:03 +00:00
Evan Cheng
02e72f8f55 Local spiller kills a store if the folded restore is turned into a copy. 
But this is incorrect if the spilled value live range extends beyond the
current BB.
It is currently controlled by a temporary option -spiller-check-liveout.

llvm-svn: 28024
 2006-04-30 08:41:47 +00:00
Jeff Cohen
1b3f7b8b48 Mingw32 patches supplied by Anton Korobeynikov. 
llvm-svn: 28023
 2006-04-29 18:41:44 +00:00
Chris Lattner
6ce6942d21 Remove a bogus transformation. This fixes SingleSource/UnitTests/2006-01-23-InitializedBitField.c 
with some changes I have to the new CFE.

llvm-svn: 28022
 2006-04-28 23:33:20 +00:00
Evan Cheng
a7ee4891c5 I can't spell: Register, not Regsiter. 
llvm-svn: 28021
 2006-04-28 23:19:39 +00:00
Evan Cheng
516164744a Implemented x86 inline asm b, h, w, k modifiers. 
llvm-svn: 28020
 2006-04-28 23:11:40 +00:00
Chris Lattner
4c79d3b238 Fix InstCombine/2006-04-28-ShiftShiftLongLong.ll 
llvm-svn: 28019
 2006-04-28 22:21:41 +00:00
Chris Lattner
e3de67fae2 Fix CodeGen/Generic/2006-04-28-Sign-extend-bool.ll 
llvm-svn: 28017
 2006-04-28 21:56:10 +00:00
Evan Cheng
a33feb51db Initial caller side support (for CCC only, not FastCC) of 128-bit vector 
passing by value.

llvm-svn: 28015
 2006-04-28 21:29:37 +00:00
Evan Cheng
a8b295feb2 Bare-bone X86 inline asm printer support. 
llvm-svn: 28014
 2006-04-28 21:19:05 +00:00
Evan Cheng
9f21c2daf4 Remove the temporary option: -no-isel-fold-inflight 
llvm-svn: 28012
 2006-04-28 18:54:11 +00:00
Evan Cheng
d577ce4c4a Implement four-wide shuffle with 2 shufps if no more than two elements come 
from each vector. e.g.
        shuffle(G1, G2, 7, 1, 5, 2)
==>
        movaps _G2, %xmm0
        shufps $151, _G1, %xmm0
        shufps $216, %xmm0, %xmm0

llvm-svn: 28011
 2006-04-28 07:03:38 +00:00
Chris Lattner
a297ad27db Fix PR743: emit -help output of a tool to cout, not cerr. 
llvm-svn: 28010
 2006-04-28 05:36:25 +00:00
Evan Cheng
f843942504 TargetLowering::LowerArguments should return a VBIT_CONVERT of 
FORMAL_ARGUMENTS SDOperand in the return result vector.

llvm-svn: 28009
 2006-04-28 05:25:15 +00:00
Chris Lattner
4e783a3101 Mapping of physregs can make it so that the designated and input physregs are 
the same.  In this case, don't emit a noop copy.

llvm-svn: 28008
 2006-04-28 04:43:18 +00:00
Chris Lattner
2118062b9c Fix Transforms/Reassociate/2006-04-27-ReassociateVector.ll 
llvm-svn: 28007
 2006-04-28 04:14:49 +00:00
Evan Cheng
37af498015 Use movaps instead of movapd for spill / restore. 
llvm-svn: 28005
 2006-04-28 02:23:35 +00:00
Evan Cheng
ff5a88b62e Added a temporary option -no-isel-fold-inflight to control whether a "inflight" 
node can be folded.

llvm-svn: 28003
 2006-04-28 02:09:19 +00:00
Chris Lattner
85a24e23a2 When we have a two-address instruction where the input cannot be clobbered 
and is already available, instead of falling back to emitting a load, fall
back to emitting a reg-reg copy.  This generates significantly better code
for some SSE testcases, as SSE has lots of two-address instructions and
none of them are read/modify/write.  As one example, this change does:

        pshufd %XMM5, XMMWORD PTR [%ESP + 84], 255
        xorps %XMM2, %XMM5
        cmpltps %XMM1, %XMM0
-       movaps XMMWORD PTR [%ESP + 52], %XMM0
-       movapd %XMM6, XMMWORD PTR [%ESP + 52]
+       movaps %XMM6, %XMM0
        cmpltps %XMM6, XMMWORD PTR [%ESP + 68]
        movapd XMMWORD PTR [%ESP + 52], %XMM6
        movaps %XMM6, %XMM0
        cmpltps %XMM6, XMMWORD PTR [%ESP + 36]
        cmpltps %XMM3, %XMM0
-       movaps XMMWORD PTR [%ESP + 20], %XMM0
-       movapd %XMM7, XMMWORD PTR [%ESP + 20]
+       movaps %XMM7, %XMM0
        cmpltps %XMM7, XMMWORD PTR [%ESP + 4]
        movapd XMMWORD PTR [%ESP + 20], %XMM7
        cmpltps %XMM4, %XMM0

... which is far better than a store followed by a load!

llvm-svn: 28001
 2006-04-28 01:46:50 +00:00
Chris Lattner
65291785c8 Add a note 
llvm-svn: 27999
 2006-04-28 00:04:05 +00:00
Chris Lattner
53275cb616 Add a note 
llvm-svn: 27998
 2006-04-27 21:40:57 +00:00
Chris Lattner
3f6a151e2d Add support for inserting undef into a vector. This implements 
Transforms/InstCombine/vec_insert_to_shuffle.ll

llvm-svn: 27997
 2006-04-27 21:14:21 +00:00
Evan Cheng
11e3cec8bd Make x86 isel lowering produce tailcall nodes. They are match to normal calls 
for now.

Patch contributed by Alexander Friedman.

llvm-svn: 27994
 2006-04-27 08:40:39 +00:00
Evan Cheng
efbc112b7c A couple of new entries. 
llvm-svn: 27993
 2006-04-27 08:31:33 +00:00
Evan Cheng
24795120e1 Support for passing 128-bit vector arguments via XMM registers. 
llvm-svn: 27992
 2006-04-27 08:31:10 +00:00
Evan Cheng
a6081bc674 Insert a VBIT_CONVERT between a FORMAL_ARGUMENT node and its vector uses 
(VAND, VADD, etc.). Legalizer will assert otherwise.

llvm-svn: 27991
 2006-04-27 08:29:42 +00:00
Evan Cheng
1e065ae594 Oops 
llvm-svn: 27989
 2006-04-27 05:44:50 +00:00
Evan Cheng
a0e0eabc07 Bug fix: not updating NumIntRegs. 
llvm-svn: 27988
 2006-04-27 05:35:28 +00:00
Chris Lattner
3b27c1bd33 Fix Regression/CodeGen/Generic/2006-04-26-SetCCAnd.ll and 
PR748.

llvm-svn: 27987
 2006-04-27 05:01:07 +00:00
Evan Cheng
a1f9f34f35 - Clean up formal argument lowering code. Prepare for vector pass by value work. 
- Fixed vararg support.

llvm-svn: 27985
 2006-04-27 01:32:22 +00:00
Chris Lattner
be67e21327 Fix some nondeterminstic behavior in the mem2reg pass that (in addition to 
nondeterminism being bad) could cause some trivial missed optimizations (dead
phi nodes being left around for later passes to clean up).

With this, llvm-gcc4 now bootstraps and correctly compares.  I don't know
why I never tried to do it before... :)

llvm-svn: 27984
 2006-04-27 01:14:43 +00:00
Chris Lattner
b42f17a66a Implement Transforms/IndVarsSimplify/complex-scev.ll, a case where we didn't 
recognize some simple affine IV's.

llvm-svn: 27982
 2006-04-26 18:34:07 +00:00
Evan Cheng
3abec16563 Fix fastcc failures. 
llvm-svn: 27980
 2006-04-26 18:21:31 +00:00
Evan Cheng
58d4133b60 Switching over FORMAL_ARGUMENTS mechanism to lower call arguments. 
llvm-svn: 27975
 2006-04-26 01:20:17 +00:00
Evan Cheng
b54140b0d6 Don't forget return void. 
llvm-svn: 27974
 2006-04-25 23:03:35 +00:00