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Commit Graph

97557 Commits

Author SHA1 Message Date
Peter Zotov
7bb25c41d3 [OCaml] Properly tag the custom operations of Llvm.llbuilder
All other custom operations tags have LLVM prefix.

llvm-svn: 194058
2013-11-05 09:13:46 +00:00
Peter Zotov
615991b419 [OCaml] Llvm_linker: do not use external in module interface
Workaround for an OCaml bug:
http://caml.inria.fr/mantis/view.php?id=4166

llvm-svn: 194057
2013-11-05 09:13:39 +00:00
Reed Kotler
787735b38c Fix r194019 as requested by Eric Christopher.
Submit the basic port of the rest of ARM constant islands code to Mips. 
Two test cases are added which reflect the next level of functionality:
constants getting moved to water areas that are out of range from the
initial placement at the end of the function and basic blocks being split to
create water when none exists that can be used. There is a bunch of this
code that is not complete and has been marked with IN_PROGRESS. I will
finish cleaning this all up during the next week or two and submit the
rest of the test cases. I have elminated some code for dealing with
inline assembly because to me it unecessarily complicates things and
some of the newer features of llvm like function attributies and builtin
assembler give me better tools to solve the alignment issues created
there. Also, for Mips16 I even have the option of not doing constant
islands in the present of inline assembler if I chose. When everything
has been completed I will summarize the port and notify people that
are knowledgable regarding the ARM Constant Islands code so they can
review it in it's entirety if they wish.

llvm-svn: 194053
2013-11-05 08:14:14 +00:00
Alp Toker
cbc0307300 Fix symbol defines in config.h.cmake
These were incorrectly pointing to HAVE_LOG despite being checked for
correctly in config-ix.cmake.

Patch by James Lyon!

llvm-svn: 194051
2013-11-05 07:27:18 +00:00
Craig Topper
8a08a00b6c Lift alignment restrictions on load folding for a significant portion of AVX instructions.
llvm-svn: 194048
2013-11-05 06:31:43 +00:00
Hao Liu
386d8dd5a6 Implement AArch64 post-index vector load/store multiple N-element structure class SIMD(lselem-post).
Including following 14 instructions:
4 ld1 insts: post-index load multiple 1-element structure to sequential 1/2/3/4 registers.
ld2/ld3/ld4: post-index load multiple N-element structure to sequential N registers (N=2,3,4).
4 st1 insts: post-index store multiple 1-element structure from sequential 1/2/3/4 registers.
st2/st3/st4: post-index store multiple N-element structure from sequential N registers (N = 2,3,4).

llvm-svn: 194043
2013-11-05 03:39:32 +00:00
Kevin Qin
63fa5c1ef6 Implemented aarch64 neon intrinsic vcopy_lane with float type.
llvm-svn: 194041
2013-11-05 02:03:59 +00:00
Yuchen Wu
2ca00e3a3d Revert "llvm-cov: Added command-line option to change dir."
This reverts commit d8acf0078cf363252727acff00f85ae8074f95b3.

llvm-svn: 194040
2013-11-05 01:56:29 +00:00
Yuchen Wu
198f42bf02 Revert "Added basic unit test for llvm-cov."
This reverts commit 9cacd131c22b888303cb88e9a3235b2d7b2f19a1.

llvm-svn: 194039
2013-11-05 01:56:26 +00:00
Yuchen Wu
3e6842afdb Added basic unit test for llvm-cov.
This test compares the output of llvm-cov against a coverage file
generated by gcov.

llvm-svn: 194038
2013-11-05 01:56:23 +00:00
Yuchen Wu
f41fb5a06a llvm-cov: Added command-line option to change dir.
This will allow for much easier testing when the input files are in a
different folder from the test script.

llvm-svn: 194034
2013-11-05 01:20:41 +00:00
Yuchen Wu
ed0b7b997b Support for reading run counts in llvm-cov.
This patch enables llvm-cov to correctly output the run count stored in
the GCDA file. GCOVProfiling currently does not generate this
information, so the GCDA run data had to be hacked on from a GCDA file
generated by gcc. This is corrected by a subsequent patch.

With the run and program data included, both llvm-cov and gcov produced
the same output.

llvm-svn: 194033
2013-11-05 01:11:58 +00:00
Rafael Espindola
4e1620cfb1 Fix MSVC build by not putting an error_code directly in a union.
llvm-svn: 194032
2013-11-05 01:07:06 +00:00
Rafael Espindola
334fa3d8a8 Simplify ErrorOr.
ErrorOr had quiet a bit of complexity and indirection to be able to hold a user
type with the error.

That feature is not used anymore. This patch removes it, it will live in svn
history if we ever need it again.

If we do need it again, IMHO there is one thing that should be done
differently: Holding extra info in the error is not a property a function also
returning a value or not. The ability to hold extra info should be in the error
type and ErrorOr templated over it so that we don't need the funny looking
ErrorOr<void>.

llvm-svn: 194030
2013-11-05 00:28:01 +00:00
Hal Finkel
26ff1b7453 Add a runtime unrolling parameter to the LoopUnroll pass constructor
As with the other loop unrolling parameters (the unrolling threshold, partial
unrolling, etc.) runtime unrolling can now also be controlled via the
constructor. This will be necessary for moving non-trivial unrolling late in
the pass manager (after loop vectorization).

No functionality change intended.

llvm-svn: 194027
2013-11-05 00:08:03 +00:00
NAKAMURA Takumi
ed7f907202 Revert r194019 to r194021, "Submit the basic port of the rest of ARM constant islands code to Mips."
It broke -Asserts build.

llvm-svn: 194026
2013-11-04 23:14:36 +00:00
Tim Northover
96044852e0 ARM: remove unnecessary state-tracking during frame lowering.
ResolveFrameIndex had what appeared to be a very nasty hack for when the
frame-index referred to a callee-saved register. In this case it "adjusted" the
offset so that the address was correct if (and only if) the MachineInstr
immediately followed the respective push.

This "worked" for all forms of GPR & DPR but was only ever used to set the
frame pointer itself, and once this was put in a more sensible location the
entire state-tracking machinery it relied on became redundant. So I stripped
it.

The only wrinkle is that "add r7, sp, #0" might theoretically be slower (need
an actual ALU slot) compared to "mov r7, sp" so I added a micro-optimisation
that also makes emitARMRegUpdate and emitT2RegUpdate also work when NumBytes ==
0.

No test changes since there shouldn't be any functionality change.

llvm-svn: 194025
2013-11-04 23:04:15 +00:00
Tim Northover
6110ffc9ca AArch64: use default asm operand printing when modifier inapplicable
If an inline assembly operand has multiple constraints (e.g. "Ir" for immediate
or register) and an operand modifier (E.g. "w" for "print register as wN") then
we need to decide behaviour when the modifier doesn't apply to the constraint.

Previousely produced some combination of an assertion failure and a fatal
error. GCC's behaviour appears to be to ignore the modifier and print the
operand in the default way. This patch should implement that.

llvm-svn: 194024
2013-11-04 23:04:07 +00:00
Reed Kotler
e05ff1dcba Make sure we don't get a warning from this variable that is only used
when compiling with DEBUG.

llvm-svn: 194021
2013-11-04 22:42:17 +00:00
Reed Kotler
8033dbb5ef Add the test case that goes with the previous submission for constant
islands. I forgot to add it to svn on that patch. Ooops.

llvm-svn: 194020
2013-11-04 22:13:41 +00:00
Reed Kotler
a3f359c9c5 Submit the basic port of the rest of ARM constant islands code to Mips.
Two test cases are added which reflect the next level of functionality:
constants getting moved to water areas that are out of range from the
initial placement at the end of the function and basic blocks being split to
create water when none exists that can be used. There is a bunch of this
code that is not complete and has been marked with IN_PROGRESS. I will
finish cleaning this all up during the next week or two and submit the
rest of the test cases. I have elminated some code for dealing with
inline assembly because to me it unecessarily complicates things and
some of the newer features of llvm like function attributies and builtin
assembler give me better tools to solve the alignment issues created
there. Also, for Mips16 I even have the option of not doing constant
islands in the present of inline assembler if I chose.

llvm-svn: 194019
2013-11-04 22:11:25 +00:00
Shuxin Yang
08d2dc8405 Remove dead code
llvm-svn: 194017
2013-11-04 21:44:01 +00:00
Eric Christopher
a42eaab3a9 Check for both styles of clobbers, those produced by dragonegg and
those produced by clang for the inline asm bswap conversion.

Modified from a patch by Chris Smowton.

llvm-svn: 194016
2013-11-04 21:41:21 +00:00
Benjamin Kramer
9eaaead296 SLPVectorizer: Use properlyDominates to satisfy the irreflexivity of a strict weak ordering.
STL debug mode checks this.

llvm-svn: 194015
2013-11-04 21:34:55 +00:00
Matt Arsenault
6df23adcfc Fix another constant folding address space place I missed.
This fixes an assertion failure with a different sized address space.

llvm-svn: 194014
2013-11-04 20:46:52 +00:00
Matt Arsenault
1f521e921d Scalarize select vector arguments when extracted.
When the elements are extracted from a select on vectors
or a vector select, do the select on the extracted scalars
from the input if there is only one use.

llvm-svn: 194013
2013-11-04 20:36:06 +00:00
Sean Silva
f6760b61dc [docs] Add link to 32-bit ARM ELF supplement.
llvm-svn: 194011
2013-11-04 19:43:36 +00:00
Jakub Staszak
a0334b429e Use startswith_lower() where possible.
llvm-svn: 194007
2013-11-04 19:22:50 +00:00
Cameron McInally
02e4f56c18 Add support for AVX512 masked vector blend intrinsics.
llvm-svn: 194006
2013-11-04 19:14:56 +00:00
Manman Ren
65b6ebbeff Rename testing case to use - instead of _.
llvm-svn: 194001
2013-11-04 18:52:06 +00:00
Rafael Espindola
5205124829 Change BitcodeReader to use error_code instead of bool + string.
In order to create an ObjectFile implementation that uses bitcode files, we
need to propagate the bitcode errors to the ObjectFile interface, so we need
to convert it to use the same error handling as ObjectFile: error_code.

llvm-svn: 193996
2013-11-04 16:16:24 +00:00
Zoran Jovanovic
134add2b71 Support for microMIPS branch instructions.
llvm-svn: 193992
2013-11-04 14:53:22 +00:00
Elena Demikhovsky
9c41e95ef5 AVX-512: fixed a typo in builtin name
llvm-svn: 193988
2013-11-04 11:48:23 +00:00
Benjamin Kramer
2d870f327a X86: Add a description for AMD bdver3 aka Steamroller.
This is just bdver2 + FSGSBase.

llvm-svn: 193984
2013-11-04 10:29:20 +00:00
Filip Pizlo
0080a77e7a Make the pretty stack trace be an opt-in, rather than opt-out, facility. Enable pretty
stack traces by default if you use PrettyStackTraceProgram, so that existing LLVM-based 
tools will continue to get it without any changes.

llvm-svn: 193971
2013-11-04 02:22:25 +00:00
Peter Zotov
4b13ee5f62 [OCaml] implement Llvm_passmgr_builder, bindings for PassManagerBuilder
llvm-svn: 193968
2013-11-04 01:39:42 +00:00
Peter Zotov
23e94a56d9 [OCaml] Documentation
llvm-svn: 193967
2013-11-04 01:39:31 +00:00
Peter Zotov
22f34b9373 [OCaml] Implement missing LLVMCore APIs
llvm-svn: 193966
2013-11-04 01:39:26 +00:00
Peter Zotov
d01f123fa7 [OCaml] Formatting
llvm-svn: 193965
2013-11-04 01:39:18 +00:00
Elena Demikhovsky
841cd7d09e AVX-512: added VPCONFLICT instruction and intrinsics,
added EVEX_KZ to tablegen

llvm-svn: 193959
2013-11-03 13:46:31 +00:00
Benjamin Kramer
15ebc47438 SLPVectorizer: Add a missing pair of parens. No functionality change.
llvm-svn: 193958
2013-11-03 12:54:32 +00:00
Venkatraman Govindaraju
8ce290e5fa [SparcV9] Handle i64 <-> float conversions in sparcv9 mode.
llvm-svn: 193957
2013-11-03 12:28:40 +00:00
Benjamin Kramer
f45bcf5480 SLPVectorizer: When CSEing generated gathers only scan blocks containing them.
Instead of doing a RPO traversal of the whole function remember the blocks
containing gathers (typically <= 2) and scan them in dominator-first order.

The actual CSE is still quadratic, but I'm not confident that adding a
scoped hash table here is worth it as we're only looking at the generated
instructions and not arbitrary code.

llvm-svn: 193956
2013-11-03 12:27:52 +00:00
David Majnemer
2bbbbaaeee Revert "Inliner: Handle readonly attribute per argument when adding memcpy"
This reverts commit r193356, it caused PR17781.

A reduced test case covering this regression has been added to the test suite.

llvm-svn: 193955
2013-11-03 12:22:13 +00:00
David Majnemer
fbb2338856 Spell "Actual" correctly
llvm-svn: 193954
2013-11-03 11:09:39 +00:00
Peter Zotov
47beae7a65 [OCaml] Implement Llvm.MemoryBuffer.{of_string,as_string}
llvm-svn: 193953
2013-11-03 08:27:45 +00:00
Peter Zotov
57d8f2c2e9 [OCaml] Fix ABI incompatibility
OCaml's type unit is not compatible with C's type void.

llvm-svn: 193952
2013-11-03 08:27:37 +00:00
Peter Zotov
aa2a604cf0 [OCaml] Implement Llvm_linker, bindings for the IR linker
llvm-svn: 193951
2013-11-03 08:27:32 +00:00
Peter Zotov
2aba543196 [OCaml] Implement Llvm_vectorize bindings
llvm-svn: 193950
2013-11-03 08:27:22 +00:00
Peter Zotov
f087cf7094 [OCaml] Refactor Llvm_target tests
Llvm_target tests did not check for return values. This actually
caused them to miss a bug.

llvm-svn: 193949
2013-11-03 08:27:13 +00:00